From nobody Tue Feb 10 01:32:40 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1567011065; cv=none; d=zoho.com; s=zohoarc; b=JIwxQv4h9ys07XFdiDNXUFNsneXXWHY+Z0QwO2++Cot7wjRszMfUUj/P8B1HMnlDGbYlgUsw5qnsa+Dqc5wNehkyxx3qRJZ+c10OrOwgpoCUK0udb6X8PG7YTLR34t1iydBDBNa9my/uEXGZb6LhjgOJxcp6PFcQnRrVhP2kRLQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567011065; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=/BQlq8oCTa6grSYVAPMd0HzGhwn8JCEL1FH89IrQC5E=; b=jTrS2L02eW/ne3+TlaUJi/DiLnNM3Sbt9iZYQzwgxn/ADNx/DxGsAuzVYovL0SeROZJaSzJEwPipxDtOtCqNKS6G7bxP0FJ74K+m80xwYEwvocI4QS45mRSmVyUdxobZPySW5UqCsl+mivOwOhCidTGo1ZsvKXHYKCqLkDXOASo= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1567011065557416.801169331639; Wed, 28 Aug 2019 09:51:05 -0700 (PDT) Received: from localhost ([::1]:38556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i319z-0004dm-Ft for importer@patchew.org; Wed, 28 Aug 2019 12:51:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34813) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i30nF-0007HE-38 for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i30nC-0008EV-Vx for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:32 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:57967 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i30n9-00080R-1Q for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:29 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 0802F1A22C7; Wed, 28 Aug 2019 18:27:01 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 945871A22A9; Wed, 28 Aug 2019 18:27:00 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 28 Aug 2019 18:26:48 +0200 Message-Id: <1567009614-12438-25-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 24/30] target/mips: Clean up handling of CP0 register 25 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Clean up handling of CP0 register 25. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 64 ++++++++++++++++++++++++---------------------= ---- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 732b38d..df6aa9e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7466,35 +7466,35 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_25: switch (sel) { - case 0: + case CP0_REG25__PERFCTL0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0)); register_name =3D "Performance0"; break; - case 1: + case CP0_REG25__PERFCNT0: /* gen_helper_mfc0_performance1(arg); */ register_name =3D "Performance1"; goto cp0_unimplemented; - case 2: + case CP0_REG25__PERFCTL1: /* gen_helper_mfc0_performance2(arg); */ register_name =3D "Performance2"; goto cp0_unimplemented; - case 3: + case CP0_REG25__PERFCNT1: /* gen_helper_mfc0_performance3(arg); */ register_name =3D "Performance3"; goto cp0_unimplemented; - case 4: + case CP0_REG25__PERFCTL2: /* gen_helper_mfc0_performance4(arg); */ register_name =3D "Performance4"; goto cp0_unimplemented; - case 5: + case CP0_REG25__PERFCNT2: /* gen_helper_mfc0_performance5(arg); */ register_name =3D "Performance5"; goto cp0_unimplemented; - case 6: + case CP0_REG25__PERFCTL3: /* gen_helper_mfc0_performance6(arg); */ register_name =3D "Performance6"; goto cp0_unimplemented; - case 7: + case CP0_REG25__PERFCNT3: /* gen_helper_mfc0_performance7(arg); */ register_name =3D "Performance7"; goto cp0_unimplemented; @@ -8228,35 +8228,35 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_25: switch (sel) { - case 0: + case CP0_REG25__PERFCTL0: gen_helper_mtc0_performance0(cpu_env, arg); register_name =3D "Performance0"; break; - case 1: + case CP0_REG25__PERFCNT0: /* gen_helper_mtc0_performance1(arg); */ register_name =3D "Performance1"; goto cp0_unimplemented; - case 2: + case CP0_REG25__PERFCTL1: /* gen_helper_mtc0_performance2(arg); */ register_name =3D "Performance2"; goto cp0_unimplemented; - case 3: + case CP0_REG25__PERFCNT1: /* gen_helper_mtc0_performance3(arg); */ register_name =3D "Performance3"; goto cp0_unimplemented; - case 4: + case CP0_REG25__PERFCTL2: /* gen_helper_mtc0_performance4(arg); */ register_name =3D "Performance4"; goto cp0_unimplemented; - case 5: + case CP0_REG25__PERFCNT2: /* gen_helper_mtc0_performance5(arg); */ register_name =3D "Performance5"; goto cp0_unimplemented; - case 6: + case CP0_REG25__PERFCTL3: /* gen_helper_mtc0_performance6(arg); */ register_name =3D "Performance6"; goto cp0_unimplemented; - case 7: + case CP0_REG25__PERFCNT3: /* gen_helper_mtc0_performance7(arg); */ register_name =3D "Performance7"; goto cp0_unimplemented; @@ -8968,35 +8968,35 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_25: switch (sel) { - case 0: + case CP0_REG25__PERFCTL0: gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0)); register_name =3D "Performance0"; break; - case 1: + case CP0_REG25__PERFCNT0: /* gen_helper_dmfc0_performance1(arg); */ register_name =3D "Performance1"; goto cp0_unimplemented; - case 2: + case CP0_REG25__PERFCTL1: /* gen_helper_dmfc0_performance2(arg); */ register_name =3D "Performance2"; goto cp0_unimplemented; - case 3: + case CP0_REG25__PERFCNT1: /* gen_helper_dmfc0_performance3(arg); */ register_name =3D "Performance3"; goto cp0_unimplemented; - case 4: + case CP0_REG25__PERFCTL2: /* gen_helper_dmfc0_performance4(arg); */ register_name =3D "Performance4"; goto cp0_unimplemented; - case 5: + case CP0_REG25__PERFCNT2: /* gen_helper_dmfc0_performance5(arg); */ register_name =3D "Performance5"; goto cp0_unimplemented; - case 6: + case CP0_REG25__PERFCTL3: /* gen_helper_dmfc0_performance6(arg); */ register_name =3D "Performance6"; goto cp0_unimplemented; - case 7: + case CP0_REG25__PERFCNT3: /* gen_helper_dmfc0_performance7(arg); */ register_name =3D "Performance7"; goto cp0_unimplemented; @@ -9712,35 +9712,35 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_25: switch (sel) { - case 0: + case CP0_REG25__PERFCTL0: gen_helper_mtc0_performance0(cpu_env, arg); register_name =3D "Performance0"; break; - case 1: + case CP0_REG25__PERFCNT0: /* gen_helper_mtc0_performance1(cpu_env, arg); */ register_name =3D "Performance1"; goto cp0_unimplemented; - case 2: + case CP0_REG25__PERFCTL1: /* gen_helper_mtc0_performance2(cpu_env, arg); */ register_name =3D "Performance2"; goto cp0_unimplemented; - case 3: + case CP0_REG25__PERFCNT1: /* gen_helper_mtc0_performance3(cpu_env, arg); */ register_name =3D "Performance3"; goto cp0_unimplemented; - case 4: + case CP0_REG25__PERFCTL2: /* gen_helper_mtc0_performance4(cpu_env, arg); */ register_name =3D "Performance4"; goto cp0_unimplemented; - case 5: + case CP0_REG25__PERFCNT2: /* gen_helper_mtc0_performance5(cpu_env, arg); */ register_name =3D "Performance5"; goto cp0_unimplemented; - case 6: + case CP0_REG25__PERFCTL3: /* gen_helper_mtc0_performance6(cpu_env, arg); */ register_name =3D "Performance6"; goto cp0_unimplemented; - case 7: + case CP0_REG25__PERFCNT3: /* gen_helper_mtc0_performance7(cpu_env, arg); */ register_name =3D "Performance7"; goto cp0_unimplemented; --=20 2.7.4