From nobody Tue Feb 10 10:03:43 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1567010607; cv=none; d=zoho.com; s=zohoarc; b=Uh4nS+giHhda0uETbsaWsTl5WRRZ0HU0sBrM/pmwTyMrnO9atYYxQfF+K+hiS/QP1Jd8SlSJGylcVppNlv5w0bFKZStM2wsCBUP1GbGdrUQoyJ8z4MjR2y9EfA6Y64bf6MpqMVwvLdSQea1CdJS7J8IziTT/3aDsrHVj9cZU1HE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567010607; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=/NcOpX1H8jEroHn2MQnvk/MnTZfDb8KBsShHnj6Kblk=; b=O/d2ljajSS59UOW8ejggp+B/86K1qLvgtt4PzUv1l6nF1ITonyxy6Dm9bavMheZnUJTQtcdjLT0ioI97l2tGsEm5mBiAgRz16HwYRneuwge4ECnxUP9Am3WY6w63o7H/coKm9LBG3xK6rmYpNWCyFBxn0+gpCvjpYEsEBKe1830= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1567010607459528.9011814690579; Wed, 28 Aug 2019 09:43:27 -0700 (PDT) Received: from localhost ([::1]:38488 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i312b-0005wL-PE for importer@patchew.org; Wed, 28 Aug 2019 12:43:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34692) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i30n1-0007AV-D5 for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i30my-00082W-T0 for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:18 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:55624 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i30my-0007og-Ag for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:16 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 9C0321A22B0; Wed, 28 Aug 2019 18:27:00 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 62FDA1A22A5; Wed, 28 Aug 2019 18:27:00 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 28 Aug 2019 18:26:44 +0200 Message-Id: <1567009614-12438-21-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 register 19 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Clean up handling of CP0 register 19. Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 4 ++++ target/mips/translate.c | 64 ++++++++++++++++++++++++---------------------= ---- 2 files changed, 36 insertions(+), 32 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 6881e96..f809759 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -397,6 +397,10 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG19__WATCHHI1 1 #define CP0_REG19__WATCHHI2 2 #define CP0_REG19__WATCHHI3 3 +#define CP0_REG19__WATCHHI4 4 +#define CP0_REG19__WATCHHI5 5 +#define CP0_REG19__WATCHHI6 6 +#define CP0_REG19__WATCHHI7 7 /* CP0 Register 20 */ #define CP0_REG20__XCONTEXT 0 /* CP0 Register 21 */ diff --git a/target/mips/translate.c b/target/mips/translate.c index adc1049..20c90a7 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7371,14 +7371,14 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_19: switch (sel) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: + case CP0_REG19__WATCHHI0: + case CP0_REG19__WATCHHI1: + case CP0_REG19__WATCHHI2: + case CP0_REG19__WATCHHI3: + case CP0_REG19__WATCHHI4: + case CP0_REG19__WATCHHI5: + case CP0_REG19__WATCHHI6: + case CP0_REG19__WATCHHI7: CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(mfc0_watchhi, arg, sel); register_name =3D "WatchHi"; @@ -8111,14 +8111,14 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_19: switch (sel) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: + case CP0_REG19__WATCHHI0: + case CP0_REG19__WATCHHI1: + case CP0_REG19__WATCHHI2: + case CP0_REG19__WATCHHI3: + case CP0_REG19__WATCHHI4: + case CP0_REG19__WATCHHI5: + case CP0_REG19__WATCHHI6: + case CP0_REG19__WATCHHI7: CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchhi, arg, sel); register_name =3D "WatchHi"; @@ -8857,14 +8857,14 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_19: switch (sel) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: + case CP0_REG19__WATCHHI0: + case CP0_REG19__WATCHHI1: + case CP0_REG19__WATCHHI2: + case CP0_REG19__WATCHHI3: + case CP0_REG19__WATCHHI4: + case CP0_REG19__WATCHHI5: + case CP0_REG19__WATCHHI6: + case CP0_REG19__WATCHHI7: CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(dmfc0_watchhi, arg, sel); register_name =3D "WatchHi"; @@ -9579,14 +9579,14 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_19: switch (sel) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: + case CP0_REG19__WATCHHI0: + case CP0_REG19__WATCHHI1: + case CP0_REG19__WATCHHI2: + case CP0_REG19__WATCHHI3: + case CP0_REG19__WATCHHI4: + case CP0_REG19__WATCHHI5: + case CP0_REG19__WATCHHI6: + case CP0_REG19__WATCHHI7: CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchhi, arg, sel); register_name =3D "WatchHi"; --=20 2.7.4