From nobody Tue Feb 10 08:03:26 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1567009786; cv=none; d=zoho.com; s=zohoarc; b=jeJMr4WySsl/k36TsPfhae6NP+ljNeXvRwkKMM4rjf0bcqiMcCUvdwtYvvmH2HG9vgZXH79loTOQG0+O6OAcnaBt6FUWjhHkIgCrmlNNaIHxiD0jCakKQye+KnQBtj6IqR/tzIJNuYMvRwNd7tgikZgicuK/t1J+vPMkLNyS17Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1567009786; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=lJJ0ooLjcTL4f7MWrYZ2OF/aC0wlUjJu+vr7bdkvPC0=; b=a15IR+RT/NOWnPPw6HXyyGQ8WIszXS0LS8LJHAouW/nu5dXE5rTDJDmKzPmTjiSageQLqsCVyJfugSX2ziFZjgRreoAGSWsKYOuOzcTo5x1Q7lgDzQioQvGTUUZiL0MieHnVfa/1kCoji/6+g2XQFQ3ejBSiM1iBjZ6vArgTmpE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1567009786258831.4899812039092; Wed, 28 Aug 2019 09:29:46 -0700 (PDT) Received: from localhost ([::1]:38338 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i30pI-0000Mj-Sf for importer@patchew.org; Wed, 28 Aug 2019 12:29:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34460) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i30mo-0006ts-Su for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i30mn-0007oJ-1w for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:06 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:55288 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i30mm-0007mA-Ia for qemu-devel@nongnu.org; Wed, 28 Aug 2019 12:27:04 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 3EFD61A22A1; Wed, 28 Aug 2019 18:27:00 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id E92531A22A5; Wed, 28 Aug 2019 18:26:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 28 Aug 2019 18:26:33 +0200 Message-Id: <1567009614-12438-10-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1567009614-12438-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 09/30] target/mips: Clean up handling of CP0 register 8 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Clean up handling of CP0 register 8. Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/translate.c | 32 ++++++++++++++++---------------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 74a760e..68a2104 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -335,6 +335,7 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG08__BADVADDR 0 #define CP0_REG08__BADINSTR 1 #define CP0_REG08__BADINSTRP 2 +#define CP0_REG08__BADINSTRX 3 /* CP0 Register 09 */ #define CP0_REG09__COUNT 0 #define CP0_REG09__SAARI 6 diff --git a/target/mips/translate.c b/target/mips/translate.c index 1222241..cf8be8f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7142,22 +7142,22 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_08: switch (sel) { - case 0: + case CP0_REG08__BADVADDR: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAdd= r)); tcg_gen_ext32s_tl(arg, arg); register_name =3D "BadVAddr"; break; - case 1: + case CP0_REG08__BADINSTR: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr)); register_name =3D "BadInstr"; break; - case 2: + case CP0_REG08__BADINSTRP: CP0_CHECK(ctx->bp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); register_name =3D "BadInstrP"; break; - case 3: + case CP0_REG08__BADINSTRX: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX)); tcg_gen_andi_tl(arg, arg, ~0xffff); @@ -7883,19 +7883,19 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) break; case CP0_REGISTER_08: switch (sel) { - case 0: + case CP0_REG08__BADVADDR: /* ignored */ register_name =3D "BadVAddr"; break; - case 1: + case CP0_REG08__BADINSTR: /* ignored */ register_name =3D "BadInstr"; break; - case 2: + case CP0_REG08__BADINSTRP: /* ignored */ register_name =3D "BadInstrP"; break; - case 3: + case CP0_REG08__BADINSTRX: /* ignored */ register_name =3D "BadInstrX"; break; @@ -8633,21 +8633,21 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_08: switch (sel) { - case 0: + case CP0_REG08__BADVADDR: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAdd= r)); register_name =3D "BadVAddr"; break; - case 1: + case CP0_REG08__BADINSTR: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr)); register_name =3D "BadInstr"; break; - case 2: + case CP0_REG08__BADINSTRP: CP0_CHECK(ctx->bp); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); register_name =3D "BadInstrP"; break; - case 3: + case CP0_REG08__BADINSTRX: CP0_CHECK(ctx->bi); gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX)); tcg_gen_andi_tl(arg, arg, ~0xffff); @@ -9356,19 +9356,19 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, = int reg, int sel) break; case CP0_REGISTER_08: switch (sel) { - case 0: + case CP0_REG08__BADVADDR: /* ignored */ register_name =3D "BadVAddr"; break; - case 1: + case CP0_REG08__BADINSTR: /* ignored */ register_name =3D "BadInstr"; break; - case 2: + case CP0_REG08__BADINSTRP: /* ignored */ register_name =3D "BadInstrP"; break; - case 3: + case CP0_REG08__BADINSTRX: /* ignored */ register_name =3D "BadInstrX"; break; --=20 2.7.4