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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id j15sm14839344pfr.146.2019.08.27.07.59.16 (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 27 Aug 2019 07:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references; bh=nIJLB67fMjf3JVrvsxTrjVPXmzF4BcbsoumjXEkQX4M=; b=SPSwl+6FEb8CghA9OTTqWnC1R6rKXExNMamFx34rVjQBmM3+j7zlhJYgfGyNVMMMnR EF9itirMsEQI7ITV0KTDps5LBIzBabJ5wnPkSubO5aaBDOZquuZVGiXzcs2Gpt4IotrC GuJGTZvdfacKSLcVZ+DbVr1TUPj4aRaGHsAWusS2lsGgqboaCFOUoiqKTvIMUMUkgk5i VuwKR1u/cvFeAvagFQBQWKV6gETRY1dKWM/Vg8yxjliAqonceXybp1arNms0i1IEP/tU hDgr6LvcYN7paMlWgVk0jBDF6pexdPCtlPpRbw9ReuVqOU5ZCzG55heavjKbTFq0Op+z /tsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=nIJLB67fMjf3JVrvsxTrjVPXmzF4BcbsoumjXEkQX4M=; b=tKWjog1CMKfZkyr/pzwBBuXuMxgPRQ7afuYvg3THZeQolzeWJaXXg2/BrHqV/FjNxI doIIflTZ+at4YdL6npFoAzrvsqmWX0nMNKZ2UN7GVax6FDZboL6baY/v+3ycAW/LuPjL luYZEghMTtrG/B1g4pthFcnz9ehQZv9HQSQVYTc9bkxqsSXTa5YfZzgGMlsZWlGG2ssm YCwWSsz7XI3xManJNRTQ4ed94tH9qfEuFWBzPlkb1fdi5N/xn86ezKaSau0S2n7oFP9X T9yW5JU021Eoe0mOjbSo4wWZQ33VcUAcR08pEQ6558XsL0EYP8m1IyRsLJuwwBmN8BR6 tiDg== X-Gm-Message-State: APjAAAVq6nKjkkSOXfNOMySVsuL79HQOD2cmwOw6/ENsowNGJP52iaAO 4lPGh4gVKmyB8bOgC9fh4N8= X-Google-Smtp-Source: APXvYqwtTtgplIH6h5Y8YBJQBvK8ZsqoRMW4VvVa0hzk/wacMa7m9OetqmZK4pHjyw/rLB9jlRHI6w== X-Received: by 2002:a17:902:d24:: with SMTP id 33mr6090007plu.133.1566917957514; Tue, 27 Aug 2019 07:59:17 -0700 (PDT) From: Bin Meng To: Alistair Francis , Palmer Dabbelt , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Date: Tue, 27 Aug 2019 07:58:37 -0700 Message-Id: <1566917919-25381-29-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1566917919-25381-1-git-send-email-bmeng.cn@gmail.com> References: <1566917919-25381-1-git-send-email-bmeng.cn@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH v6 28/30] riscv: sifive_u: Fix broken GEM support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At present the GEM support in sifive_u machine is seriously broken. The GEM block register base was set to a weird number (0x100900FC), which for no way could work with the cadence_gem model in QEMU. Not like other GEM variants, the FU540-specific GEM has a management block to control 10/100/1000Mbps link speed changes, that is mapped to 0x100a0000. We can simply map it into MMIO space without special handling using create_unimplemented_device(). Update the GEM node compatible string to use the official name used by the upstream Linux kernel, and add the management block reg base & size to the property encoding. Tested with upstream U-Boot and Linux kernel MACB drivers. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis --- Changes in v6: None Changes in v5: - add the missing "local-mac-address" property in the ethernet node Changes in v4: None Changes in v3: None Changes in v2: - use create_unimplemented_device() to create the GEM management block instead of sifive_mmio_emulate() - add "phy-handle" property to the ethernet node hw/riscv/sifive_u.c | 24 ++++++++++++++++++++---- include/hw/riscv/sifive_u.h | 3 ++- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 516093e..a7225f9 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -3,6 +3,7 @@ * * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu * Copyright (c) 2017 SiFive, Inc. + * Copyright (c) 2019 Bin Meng * * Provides a board compatible with the SiFive Freedom U SDK: * @@ -11,6 +12,7 @@ * 2) PLIC (Platform Level Interrupt Controller) * 3) PRCI (Power, Reset, Clock, Interrupt) * 4) OTP (One-Time Programmable) memory with stored serial number + * 5) GEM (Gigabit Ethernet Controller) and management block * * This board currently generates devicetree dynamically that indicates at= least * two harts and up to five harts. @@ -38,6 +40,7 @@ #include "hw/sysbus.h" #include "hw/char/serial.h" #include "hw/cpu/cluster.h" +#include "hw/misc/unimp.h" #include "target/riscv/cpu.h" #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_plic.h" @@ -46,6 +49,7 @@ #include "hw/riscv/sifive_u.h" #include "hw/riscv/boot.h" #include "chardev/char.h" +#include "net/eth.h" #include "sysemu/arch_init.h" #include "sysemu/device_tree.h" #include "exec/address-spaces.h" @@ -67,7 +71,8 @@ static const struct MemmapEntry { [SIFIVE_U_UART1] =3D { 0x10011000, 0x1000 }, [SIFIVE_U_OTP] =3D { 0x10070000, 0x1000 }, [SIFIVE_U_DRAM] =3D { 0x80000000, 0x0 }, - [SIFIVE_U_GEM] =3D { 0x100900FC, 0x2000 }, + [SIFIVE_U_GEM] =3D { 0x10090000, 0x2000 }, + [SIFIVE_U_GEM_MGMT] =3D { 0x100a0000, 0x1000 }, }; =20 #define OTP_SERIAL 1 @@ -84,7 +89,7 @@ static void create_fdt(SiFiveUState *s, const struct Memm= apEntry *memmap, char ethclk_names[] =3D "pclk\0hclk"; uint32_t plic_phandle, prci_phandle, ethclk_phandle, phandle =3D 1; uint32_t uartclk_phandle; - uint32_t hfclk_phandle, rtcclk_phandle; + uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle; =20 fdt =3D s->fdt =3D create_device_tree(&s->fdt_size); if (!fdt) { @@ -254,21 +259,28 @@ static void create_fdt(SiFiveUState *s, const struct = MemmapEntry *memmap, ethclk_phandle =3D qemu_fdt_get_phandle(fdt, nodename); g_free(nodename); =20 + phy_phandle =3D phandle++; nodename =3D g_strdup_printf("/soc/ethernet@%lx", (long)memmap[SIFIVE_U_GEM].base); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string(fdt, nodename, "compatible", "cdns,macb"); + qemu_fdt_setprop_string(fdt, nodename, "compatible", + "sifive,fu540-c000-gem"); qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[SIFIVE_U_GEM].base, - 0x0, memmap[SIFIVE_U_GEM].size); + 0x0, memmap[SIFIVE_U_GEM].size, + 0x0, memmap[SIFIVE_U_GEM_MGMT].base, + 0x0, memmap[SIFIVE_U_GEM_MGMT].size); qemu_fdt_setprop_string(fdt, nodename, "reg-names", "control"); qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii"); + qemu_fdt_setprop_cell(fdt, nodename, "phy-handle", phy_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); qemu_fdt_setprop_cells(fdt, nodename, "clocks", prci_phandle, PRCI_CLK_GEMGXLPLL, prci_phandle, PRCI_CLK_GEMGXLPLL= ); qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names, sizeof(ethclk_names)); + qemu_fdt_setprop(fdt, nodename, "local-mac-address", + s->soc.gem.conf.macaddr.a, ETH_ALEN); qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 0); g_free(nodename); @@ -276,6 +288,7 @@ static void create_fdt(SiFiveUState *s, const struct Me= mmapEntry *memmap, nodename =3D g_strdup_printf("/soc/ethernet@%lx/ethernet-phy@0", (long)memmap[SIFIVE_U_GEM].base); qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_cell(fdt, nodename, "phandle", phy_phandle); qemu_fdt_setprop_cell(fdt, nodename, "reg", 0x0); g_free(nodename); =20 @@ -525,6 +538,9 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev= , Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem), 0, memmap[SIFIVE_U_GEM].base); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem), 0, plic_gpios[SIFIVE_U_GEM_IRQ]); + + create_unimplemented_device("riscv.sifive.u.gem-mgmt", + memmap[SIFIVE_U_GEM_MGMT].base, memmap[SIFIVE_U_GEM_MGMT].size); } =20 static void riscv_sifive_u_machine_init(MachineClass *mc) diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 7d9d901..d2b9d99 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -63,7 +63,8 @@ enum { SIFIVE_U_UART1, SIFIVE_U_OTP, SIFIVE_U_DRAM, - SIFIVE_U_GEM + SIFIVE_U_GEM, + SIFIVE_U_GEM_MGMT }; =20 enum { --=20 2.7.4