From nobody Sun Feb 8 19:21:07 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1566538884; cv=none; d=zoho.com; s=zohoarc; b=Vx935sRN79zMTgqdY7eB3rCW2KfXyGoZtNW9RFNS0Sd/fsFPRMkjO2b8p2Fc1Jpzc6S5eHbiLlIyGiD9Oqg3bneC9WDseDQVMmFwKA10UjSCKhNM6hpf61Yh+q1vzwpakLOu4j9WNax33N2UxeOb/B7FCmxeYdWKBw1fGFXbHpM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566538884; h=Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=uZnhRt/a8KcGf4XYGxFRz+b4gB42wHE04B0Zoew5Wcg=; b=iDe4VLwQrLLWIQX5uiUqz6wyUyp0uFWpCs7TLk8WyVSOMr08Gjun10ho8Hh36mBaT3tcCKbbIAztmaSjaAK/gJii8KN2tQidJndszgpJLuzFGMsCDckp50GAJKIFHMociuStmklwuwDtkz9XX27tmFM25eDTWgM2bkGenyPObSU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1566538884004101.95497228491342; Thu, 22 Aug 2019 22:41:24 -0700 (PDT) Received: from localhost ([::1]:51680 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i12KA-0001Eo-BV for importer@patchew.org; Fri, 23 Aug 2019 01:41:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45157) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i11rU-0004N0-7w for qemu-devel@nongnu.org; Fri, 23 Aug 2019 01:11:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i11rS-0002jP-12 for qemu-devel@nongnu.org; Fri, 23 Aug 2019 01:11:44 -0400 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:41450) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1i11rR-0002iq-PZ; Fri, 23 Aug 2019 01:11:41 -0400 Received: by mail-pl1-x644.google.com with SMTP id m9so4865966pls.8; Thu, 22 Aug 2019 22:11:41 -0700 (PDT) Received: from localhost.localdomain (unknown-224-80.windriver.com. [147.11.224.80]) by smtp.gmail.com with ESMTPSA id v189sm1122527pfv.176.2019.08.22.22.11.40 (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 22 Aug 2019 22:11:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references; bh=uZnhRt/a8KcGf4XYGxFRz+b4gB42wHE04B0Zoew5Wcg=; b=OYJt1okrdy2befdEd8v9tFPRDHeIhLeU45EYU7i0Lb/e6l93srTkBsAJsubogrUePT /UModCRhY3M483ohKGOfJf4jo3L5dZr0vxmyr4d/z/niRTMB2/A4JhLZhaYSFy8v94V5 5WmgLWz5HcXqEJ989YmRjQ7VCzanvt73fh/W5DVFG0ovQcvALbgWzjRuy2xJFLrVteDq W4oB4pTlxwv+YuJw+CjnXXNYfLf/4w8uE7PIeEovQJNHCaCeHcXsA3O2VHDEMGrxsbPJ Sv950ddQ2Enm7CFcZrJBMhWOjN/kKuyw0PG8xDwoqTHrsc5sIZ8zcKqol+hFe4KijhPu TfVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=uZnhRt/a8KcGf4XYGxFRz+b4gB42wHE04B0Zoew5Wcg=; b=nsMz/vcoMtPMe1eT4fQiBdI2/87dph16rLnQDU5n2dl0sr3B/bIrY3y04EhzRNnbrE bZA1pYpDeMR/zIdEf0ojhWf/ZhhErEnflNeHjnkOjBz0QxzfcoEui2BXmiCrXVOXQX07 GzusWgNBOQMzBPpuNTdzDw3cKij59lJt+V76KQevu4vqQuCD8leCRij3KlQAXkZmQbvk iZ/gB/Zfn/NlZFS29DV5JAIuXSKqQ0IZDcC8CoCP/XyXiQ+9JILdnErzN4qNUBxAlpFx QMUWZCkz0GwEveO0AkZ6DdUQ+abTz9KxryXEqNF9iiZhEQoVj/WUzGZUMAdSKUafxDhT Xw0w== X-Gm-Message-State: APjAAAUitJXkdbKh+LYN6UZRorZhw+smz1knL+ud2qvEHXUBu6mciXVS 2ZtIShOpPMbpyt+wWj+2z9Q= X-Google-Smtp-Source: APXvYqw9ugUqlzjZdkKKm+BBaDalO+kZ9+bNr5tgpT+0RzVxqWUsC6m59D+4ThZYQAgHS7tJikv4FQ== X-Received: by 2002:a17:902:d70a:: with SMTP id w10mr2476273ply.251.1566537101007; Thu, 22 Aug 2019 22:11:41 -0700 (PDT) From: Bin Meng To: Alistair Francis , Palmer Dabbelt , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Date: Thu, 22 Aug 2019 22:11:01 -0700 Message-Id: <1566537069-22741-23-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1566537069-22741-1-git-send-email-bmeng.cn@gmail.com> References: <1566537069-22741-1-git-send-email-bmeng.cn@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 Subject: [Qemu-devel] [PATCH v5 22/30] riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now that we have added a PRCI node, update existing UART and ethernet nodes to reference PRCI as their clock sources, to keep in sync with the Linux kernel device tree. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None hw/riscv/sifive_u.c | 7 ++++--- include/hw/riscv/sifive_u_prci.h | 10 ++++++++++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index c777d41..e0842ad 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -79,7 +79,7 @@ static void create_fdt(SiFiveUState *s, const struct Memm= apEntry *memmap, int cpu; uint32_t *cells; char *nodename; - char ethclk_names[] =3D "pclk\0hclk\0tx_clk"; + char ethclk_names[] =3D "pclk\0hclk"; uint32_t plic_phandle, prci_phandle, ethclk_phandle, phandle =3D 1; uint32_t uartclk_phandle; uint32_t hfclk_phandle, rtcclk_phandle; @@ -264,7 +264,7 @@ static void create_fdt(SiFiveUState *s, const struct Me= mmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); qemu_fdt_setprop_cells(fdt, nodename, "clocks", - ethclk_phandle, ethclk_phandle, ethclk_phandle); + prci_phandle, PRCI_CLK_GEMGXLPLL, prci_phandle, PRCI_CLK_GEMGXLPLL= ); qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names, sizeof(ethclk_names)); qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1); @@ -294,7 +294,8 @@ static void create_fdt(SiFiveUState *s, const struct Me= mmapEntry *memmap, qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[SIFIVE_U_UART0].base, 0x0, memmap[SIFIVE_U_UART0].size); - qemu_fdt_setprop_cell(fdt, nodename, "clocks", uartclk_phandle); + qemu_fdt_setprop_cells(fdt, nodename, "clocks", + prci_phandle, PRCI_CLK_TLCLK); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); =20 diff --git a/include/hw/riscv/sifive_u_prci.h b/include/hw/riscv/sifive_u_p= rci.h index 60a2eab..0a531fd 100644 --- a/include/hw/riscv/sifive_u_prci.h +++ b/include/hw/riscv/sifive_u_prci.h @@ -78,4 +78,14 @@ typedef struct SiFiveUPRCIState { uint32_t clkmuxstatus; } SiFiveUPRCIState; =20 +/* + * Clock indexes for use by Device Tree data and the PRCI driver. + * + * These values are from sifive-fu540-prci.h in the Linux kernel. + */ +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + #endif /* HW_SIFIVE_U_PRCI_H */ --=20 2.7.4