From nobody Tue Feb 10 13:17:15 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1566218085; cv=none; d=zoho.com; s=zohoarc; b=AFZTOkWVDvF6uz0wiyncGsszN2dFuWgwOroNrycXm4axFK9vWZVfE3t8m2FHCH08vKWbjxN+K3Yi5JKqARQAnyvJil+FxGLEzPg2Zn0rtxsafJdySlcnmVID8/Km2Qrwe5YpVScd0CI2IVyF+VwPjH4H88oeH6r2F8uIeELr1GA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566218085; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=cwEqMBsuQdZh8nuiJa/JX8gYWItipzfT/TDA5gA7xFU=; b=imRgr4z9cIqXC0xIyjoDiMHCn0J2ylMvxJbhWuW++dTSsnDS36REMJ5lZNM7EbE3pT381Z3KRHyKcdEWtkCTUkOqWz06ShCXAVckOAue2m48Fatu3VezmTcLpcFb9SO+eRztvkFPkyRUqim1IO1gQpsqQCBhouNGDNaDUlGfJtY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1566218085964117.24708116249076; Mon, 19 Aug 2019 05:34:45 -0700 (PDT) Received: from localhost ([::1]:49272 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzgs0-0001Pf-0b for importer@patchew.org; Mon, 19 Aug 2019 08:34:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36317) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hzgTo-0002A1-UI for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hzgTm-0002kp-HH for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:44 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:58060 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hzgTm-0002bm-5b for qemu-devel@nongnu.org; Mon, 19 Aug 2019 08:09:42 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 9ABA81A21B7; Mon, 19 Aug 2019 14:08:25 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id C73A81A218A; Mon, 19 Aug 2019 14:08:24 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 19 Aug 2019 14:08:03 +0200 Message-Id: <1566216496-17375-25-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566216496-17375-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1566216496-17375-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v8 24/37] target/mips: Clean up handling of CP0 register 10 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, philmd@redhat.com, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Clean up handling of CP0 register 10. Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/translate.c | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index c7fdf1d..5e08b78 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -341,6 +341,7 @@ typedef struct mips_def_t mips_def_t; #define CP0_REG10__ENTRYHI 0 #define CP0_REG10__GUESTCTL1 4 #define CP0_REG10__GUESTCTL2 5 +#define CP0_REG10__GUESTCTL3 6 /* CP0 Register 11 */ #define CP0_REG11__COMPARE 0 #define CP0_REG11__GUESTCTL0EXT 4 diff --git a/target/mips/translate.c b/target/mips/translate.c index c046a10..ac86655 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7202,7 +7202,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int= reg, int sel) break; case CP0_REGISTER_10: switch (sel) { - case 0: + case CP0_REG10__ENTRYHI: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi= )); tcg_gen_ext32s_tl(arg, arg); register_name =3D "EntryHi"; @@ -7923,7 +7923,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int= reg, int sel) break; case CP0_REGISTER_10: switch (sel) { - case 0: + case CP0_REG10__ENTRYHI: gen_helper_mtc0_entryhi(cpu_env, arg); register_name =3D "EntryHi"; break; @@ -8690,7 +8690,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) break; case CP0_REGISTER_10: switch (sel) { - case 0: + case CP0_REG10__ENTRYHI: tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi= )); register_name =3D "EntryHi"; break; @@ -9396,7 +9396,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) break; case CP0_REGISTER_10: switch (sel) { - case 0: + case CP0_REG10__ENTRYHI: gen_helper_mtc0_entryhi(cpu_env, arg); register_name =3D "EntryHi"; break; --=20 2.7.4