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boundary="===============8928803090933028431==" Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" --===============8928803090933028431== Content-Language: en-AU Content-Type: multipart/alternative; boundary="_000_156594069059052845btcom_" --_000_156594069059052845btcom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Temporarily no-op size_memop was introduced to aid the conversion of memory_region_dispatch_{read|write} operand "unsigned size" into "MemOp op". Now size_memop is implemented, again hard coded size but with MO_{8|16|32|64}. This is more expressive and avoids size_memop calls. Signed-off-by: Tony Nguyen Reviewed-by: Richard Henderson --- memory_ldst.inc.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c index 1e8a2fc..de658c4 100644 --- a/memory_ldst.inc.c +++ b/memory_ldst.inc.c @@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_internal, S= UFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(4), = attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, MO_32, attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap32(val); @@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_internal,= SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(8), = attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, MO_64, attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap64(val); @@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(1), = attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, MO_8, attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw_internal= , SUFFIX)(ARG1_DECL, release_lock |=3D prepare_mmio_access(mr); /* I/O case */ - r =3D memory_region_dispatch_read(mr, addr1, &val, size_memop(2), = attrs); + r =3D memory_region_dispatch_read(mr, addr1, &val, MO_16, attrs); #if defined(TARGET_WORDS_BIGENDIAN) if (endian =3D=3D DEVICE_LITTLE_ENDIAN) { val =3D bswap16(val); @@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL= , if (l < 4 || !memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, MO_32, attrs); } else { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); stl_p(ptr, val); @@ -346,7 +346,7 @@ static inline void glue(address_space_stl_internal, SUF= FIX)(ARG1_DECL, val =3D bswap32(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(4), = attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, MO_32, attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL, mr =3D TRANSLATE(addr, &addr1, &l, true, attrs); if (!memory_access_is_direct(mr, true)) { release_lock |=3D prepare_mmio_access(mr); - r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(1), = attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, MO_8, attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -451,7 +451,7 @@ static inline void glue(address_space_stw_internal, SUF= FIX)(ARG1_DECL, val =3D bswap16(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(2), = attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, MO_16, attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); @@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, SUFFIX)(AR= G1_DECL, val =3D bswap64(val); } #endif - r =3D memory_region_dispatch_write(mr, addr1, val, size_memop(8), = attrs); + r =3D memory_region_dispatch_write(mr, addr1, val, MO_64, attrs); } else { /* RAM case */ ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); -- 1.8.3.1 ? --_000_156594069059052845btcom_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

Temporarily no-op size_memop was intr= oduced to aid the conversion of
memory_region_dispatch_{read|write} operand "unsigned size" = into
"MemOp op".

Now size_memop is implemented, again hard coded size but with
MO_{8|16|32|64}. This is more expressive and avoids size_memop calls.<= /div>

Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 memory_ldst.inc.c | 18 ++++++++&= #43;---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index 1e8a2fc..de658c4 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -38,7 +38,7 @@ static inline uint32_t glue(address_space_ldl_in= ternal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, size_memop(4), attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, MO_32, attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap32(val);<= /div>
@@ -114,7 +114,7 @@ static inline uint64_t glue(address_space_ldq_= internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, size_memop(8), attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, MO_64, attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap64(val);<= /div>
@@ -188,7 +188,7 @@ uint32_t glue(address_space_ldub, SUFFIX)(ARG1= _DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, size_memop(1), attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, MO_8, attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -224,7 +224,7 @@ static inline uint32_t glue(address_space_lduw= _internal, SUFFIX)(ARG1_DECL,
         release_lock |=3D prepare_mmio_acces= s(mr);
 
         /* I/O case */
-        r =3D memory_region_dispatch_read(mr, add= r1, &val, size_memop(2), attrs);
+        r =3D memory_region_dispatch_read(mr,= addr1, &val, MO_16, attrs);
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian =3D=3D DEVICE_LITTLE_ENDI= AN) {
             val =3D bswap16(val);<= /div>
@@ -300,7 +300,7 @@ void glue(address_space_stl_notdirty, SUFFIX)(= ARG1_DECL,
     if (l < 4 || !memory_access_is_direct(mr, true)= ) {
         release_lock |=3D prepare_mmio_acces= s(mr);
 
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, size_memop(4), attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, MO_32, attrs);
     } else {
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
         stl_p(ptr, val);
@@ -346,7 +346,7 @@ static inline void glue(address_space_stl_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap32(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, size_memop(4), attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, MO_32, attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -408,7 +408,7 @@ void glue(address_space_stb, SUFFIX)(ARG1_DECL= ,
     mr =3D TRANSLATE(addr, &addr1, &l, true, a= ttrs);
     if (!memory_access_is_direct(mr, true)) {
         release_lock |=3D prepare_mmio_acces= s(mr);
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, size_memop(1), attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, MO_8, attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -451,7 +451,7 @@ static inline void glue(address_space_stw_inte= rnal, SUFFIX)(ARG1_DECL,
             val =3D bswap16(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, size_memop(2), attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, MO_16, attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
@@ -524,7 +524,7 @@ static void glue(address_space_stq_internal, S= UFFIX)(ARG1_DECL,
             val =3D bswap64(val);<= /div>
         }
 #endif
-        r =3D memory_region_dispatch_write(mr, ad= dr1, val, size_memop(8), attrs);
+        r =3D memory_region_dispatch_write(mr= , addr1, val, MO_64, attrs);
     } else {
         /* RAM case */
         ptr =3D qemu_map_ram_ptr(mr->ram_= block, addr1);
-- 
1.8.3.1

​

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