From nobody Mon Feb 9 19:53:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1562413279; cv=none; d=zoho.com; s=zohoarc; b=AOG0t2LWSz46PoeBhbO0avgq30WgUAPpVfk3YpXRhbJcB+frzbbAStOUhMxhS+wxxjqqykH1xZyhoYyuQnCq8zhrNoUFFMEu9NlJ7lWNjOwBkE0Wk5eCfjyP37u5fgKpFim+yggmc/fbGbiHD9FXFwVGr/OpdK3rjk4kUO11fME= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562413279; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=4HKNnlfXOlegrYpGBZyKPxSxcdIbW1v9/8lbjW9K1gY=; b=esqvKosqLqKJHrHEySezs9DMJSOq5UOTdlIUxK0xPuG8QMbiE3un9xJPXOUWGLYMvKb08nVKCqW5EeX/abzeC+QzkMw+COnasjVIk0gjlB//B3PriemaskSdFJlGwl3MZ5KP4KxllB3IsQvWPj2OPJbCdFi97t36mib48FYjtSw= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1562413279391138.94440279435423; Sat, 6 Jul 2019 04:41:19 -0700 (PDT) Received: from localhost ([::1]:58880 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjj3z-0003SF-F1 for importer@patchew.org; Sat, 06 Jul 2019 07:41:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52647) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjijX-0003Or-1a for qemu-devel@nongnu.org; Sat, 06 Jul 2019 07:20:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hjijU-0006IX-0T for qemu-devel@nongnu.org; Sat, 06 Jul 2019 07:19:58 -0400 Received: from mga14.intel.com ([192.55.52.115]:2989) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hjijT-00060B-Lh for qemu-devel@nongnu.org; Sat, 06 Jul 2019 07:19:55 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Jul 2019 04:19:38 -0700 Received: from yiliu-dev.bj.intel.com ([10.238.156.139]) by fmsmga005.fm.intel.com with ESMTP; 06 Jul 2019 04:19:36 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,458,1557212400"; d="scan'208";a="363355073" From: Liu Yi L To: qemu-devel@nongnu.org, mst@redhat.com, pbonzini@redhat.com, alex.williamson@redhat.com, peterx@redhat.com Date: Fri, 5 Jul 2019 19:01:50 +0800 Message-Id: <1562324511-2910-18-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1562324511-2910-1-git-send-email-yi.l.liu@intel.com> References: <1562324511-2910-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [RFC v1 17/18] intel_iommu: propagate PASID-based iotlb flush to host X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com, Yi Sun , kvm@vger.kernel.org, jun.j.tian@intel.com, eric.auger@redhat.com, yi.y.sun@intel.com, Jacob Pan , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Intel VT-d 3.0 supports nested translation in PASID granularity. For guest SVA support, nested translation is enabled for specific PASID. In such case, guest owns the GVA->GPA translation which is configured as first level page table in host side for a specific pasid, and host owns GPA->HPA translation. As guest owns first level translation table, guest's PASID-based IOTLB(piot= lb) flush should be propagated to host since host IOMMU will cache first level page table related mappings during DMA address translation. Cc: Kevin Tian Cc: Jacob Pan Cc: Peter Xu Cc: Yi Sun Signed-off-by: Liu Yi L --- hw/i386/intel_iommu.c | 68 ++++++++++++++++++++++++++++++++++++++= ++++ hw/i386/intel_iommu_internal.h | 7 +++++ 2 files changed, 75 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 7a778d8..e4286e5 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2516,15 +2516,83 @@ static bool vtd_process_pasid_desc(IntelIOMMUState = *s, return (ret =3D=3D 0) ? true : false; } =20 +static inline bool vtd_pasid_cache_valid(VTDAddressSpace *vtd_pasid_as) +{ + return (vtd_pasid_as->iommu_state->pasid_cache_gen && + (vtd_pasid_as->iommu_state->pasid_cache_gen + =3D=3D vtd_pasid_as->pasid_cache_entry.pasid_cache_gen)); +} + +static void vtd_flush_pasid_iotlb(gpointer key, gpointer value, + gpointer user_data) +{ + VTDPIOTLBInvInfo *piotlb_info =3D user_data; + VTDAddressSpace *vtd_pasid_as =3D value; + uint16_t did; + + /* + * Actually, needs to check whether the pasid entry cache stored in + * vtd_pasid_as is valid or not. "invalid" means the pasid cache + * has been flushed, thus host should have done such piotlb flush, + * no need to pass down piotlb flush to host. Only when pasid entry + * cache is "valid", should a piotlb flush pass down to host. Because + * In such case, it is due to mapping changes in guest, a piotlb flush + * in host is required. + */ + if (!vtd_pasid_as || !vtd_pasid_cache_valid(vtd_pasid_as)) { + return; + } + + did =3D vtd_pe_get_domain_id( + &(vtd_pasid_as->pasid_cache_entry.pasid_entry)); + /* + * vtd_pasid_as should be non-NULL and the pasid_cache_gen + * should be non-zero. If vtd_pasid_as management is clean, + * the vtd_pasid_as is non-NULL is enough. + */ + if ((piotlb_info->domain_id =3D=3D did) && + (piotlb_info->pasid =3D=3D vtd_pasid_as->pasid)) { + pci_device_flush_pasid_iotlb(vtd_pasid_as->bus, + vtd_pasid_as->devfn, &piotlb_info->tlb_info); + } +} + static void vtd_piotlb_pasid_invalidate(IntelIOMMUState *s, uint16_t domain_id, uint32_t pasid) { + VTDPIOTLBInvInfo piotlb_info; + struct iommu_cache_invalidate_info *inv_info =3D &piotlb_info.tlb_info; + + piotlb_info.domain_id =3D domain_id; + piotlb_info.pasid =3D pasid; + inv_info->version =3D IOMMU_CACHE_INVALIDATE_INFO_VERSION_1; + inv_info->cache =3D IOMMU_CACHE_INV_TYPE_IOTLB; + inv_info->granularity =3D IOMMU_INV_GRANU_PASID; + inv_info->pasid_info.pasid =3D pasid; + inv_info->pasid_info.flags =3D IOMMU_INV_PASID_FLAGS_PASID; + g_hash_table_foreach(s->vtd_pasid_as, vtd_flush_pasid_iotlb, &piotlb_i= nfo); } =20 static void vtd_piotlb_page_invalidate(IntelIOMMUState *s, uint16_t domain= _id, uint32_t pasid, hwaddr addr, uint8_t am, bool= ih) { + VTDPIOTLBInvInfo piotlb_info; + struct iommu_cache_invalidate_info *inv_info =3D &piotlb_info.tlb_info; + + piotlb_info.domain_id =3D domain_id; + piotlb_info.pasid =3D pasid; + inv_info->version =3D IOMMU_CACHE_INVALIDATE_INFO_VERSION_1; + inv_info->cache =3D IOMMU_CACHE_INV_TYPE_IOTLB; + inv_info->granularity =3D IOMMU_INV_GRANU_ADDR; + inv_info->addr_info.flags =3D IOMMU_INV_ADDR_FLAGS_PASID; + inv_info->addr_info.flags |=3D ih ? IOMMU_INV_ADDR_FLAGS_LEAF : 0; + inv_info->addr_info.pasid =3D pasid; + inv_info->addr_info.addr =3D addr; + inv_info->addr_info.granule_size =3D 1 << (12 + am); + inv_info->addr_info.nb_granules =3D 1; + + g_hash_table_foreach(s->vtd_pasid_as, vtd_flush_pasid_iotlb, &piotlb_i= nfo); } =20 static bool vtd_process_piotlb_desc(IntelIOMMUState *s, diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 69cd879..556ea8d 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -506,6 +506,13 @@ struct VTDPASIDCacheInfo { }; typedef struct VTDPASIDCacheInfo VTDPASIDCacheInfo; =20 +struct VTDPIOTLBInvInfo { + uint16_t domain_id; + uint32_t pasid; + struct iommu_cache_invalidate_info tlb_info; +}; +typedef struct VTDPIOTLBInvInfo VTDPIOTLBInvInfo; + /* Masks for struct VTDRootEntry */ #define VTD_ROOT_ENTRY_P 1ULL #define VTD_ROOT_ENTRY_CTP (~0xfffULL) --=20 2.7.4