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X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH 3/7] target/i386: expand feature words to 64 bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liran Alon , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" VMX requires 64-bit feature words for the IA32_VMX_EPT_VPID_CAP and IA32_VMX_BASIC MSRs. (The VMX control MSRs are 64-bit wide but actually have only 32 bits of information). Signed-off-by: Paolo Bonzini --- include/sysemu/kvm.h | 2 +- target/i386/cpu.c | 63 +++++++++++++++++++++++++++---------------------= ---- target/i386/cpu.h | 4 ++-- target/i386/kvm.c | 2 +- 4 files changed, 37 insertions(+), 34 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index acd90ae..f8157bc 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -463,7 +463,7 @@ int kvm_vm_check_extension(KVMState *s, unsigned int ex= tension); =20 uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, uint32_t index, int reg); -uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index); +uint64_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index); =20 =20 void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 412e834..4de44e4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -787,7 +787,7 @@ typedef struct FeatureWordInfo { * In cases of disagreement between feature naming conventions, * aliases may be added. */ - const char *feat_names[32]; + const char *feat_names[64]; union { /* If type=3D=3DCPUID_FEATURE_WORD */ struct { @@ -801,11 +801,11 @@ typedef struct FeatureWordInfo { uint32_t index; } msr; }; - uint32_t tcg_features; /* Feature flags supported by TCG */ - uint32_t unmigratable_flags; /* Feature flags known to be unmigratable= */ - uint32_t migratable_flags; /* Feature flags known to be migratable */ + uint64_t tcg_features; /* Feature flags supported by TCG */ + uint64_t unmigratable_flags; /* Feature flags known to be unmigratable= */ + uint64_t migratable_flags; /* Feature flags known to be migratable */ /* Features that shouldn't be auto-enabled by "-cpu host" */ - uint32_t no_autoenable_flags; + uint64_t no_autoenable_flags; } FeatureWordInfo; =20 static FeatureWordInfo feature_word_info[FEATURE_WORDS] =3D { @@ -1337,14 +1337,14 @@ const char *get_register_name_32(unsigned int reg) * Returns the set of feature flags that are supported and migratable by * QEMU, for a given FeatureWord. */ -static uint32_t x86_cpu_get_migratable_flags(FeatureWord w) +static uint64_t x86_cpu_get_migratable_flags(FeatureWord w) { FeatureWordInfo *wi =3D &feature_word_info[w]; - uint32_t r =3D 0; + uint64_t r =3D 0; int i; =20 - for (i =3D 0; i < 32; i++) { - uint32_t f =3D 1U << i; + for (i =3D 0; i < 64; i++) { + uint64_t f =3D 1ULL << i; =20 /* If the feature name is known, it is implicitly considered migra= table, * unless it is explicitly set in unmigratable_flags */ @@ -3059,7 +3059,7 @@ void x86_cpu_change_kvm_default(const char *prop, con= st char *value) assert(pv->prop); } =20 -static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, +static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, bool migratable_only); =20 static bool lmce_supported(void) @@ -3253,7 +3253,7 @@ static bool x86_cpu_have_filtered_features(X86CPU *cp= u) return false; } =20 -static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint32_t= mask, +static void mark_unavailable_features(X86CPU *cpu, FeatureWord w, uint64_t= mask, const char *prefix) { CPUX86State *env =3D &cpu->env; @@ -3268,8 +3268,8 @@ static void mark_unavailable_features(X86CPU *cpu, Fe= atureWord w, uint32_t mask, return; } =20 - for (i =3D 0; i < 32; ++i) { - if ((1UL << i) & mask) { + for (i =3D 0; i < 64; ++i) { + if ((1ULL << i) & mask) { feat_word_str =3D feature_word_description(f, i); warn_report("%s: %s%s%s [bit %d]", prefix, @@ -3512,7 +3512,7 @@ static void x86_cpu_get_feature_words(Object *obj, Vi= sitor *v, const char *name, void *opaque, Error **errp) { - uint32_t *array =3D (uint32_t *)opaque; + uint64_t *array =3D (uint64_t *)opaque; FeatureWord w; X86CPUFeatureWordInfo word_infos[FEATURE_WORDS] =3D { }; X86CPUFeatureWordInfoList list_entries[FEATURE_WORDS] =3D { }; @@ -3596,6 +3596,7 @@ static inline void feat2prop(char *s) /* Return the feature property name for a feature flag bit */ static const char *x86_cpu_feature_name(FeatureWord w, int bitnr) { + const char *name; /* XSAVE components are automatically enabled by other features, * so return the original feature name instead */ @@ -3609,9 +3610,11 @@ static const char *x86_cpu_feature_name(FeatureWord = w, int bitnr) } } =20 - assert(bitnr < 32); + assert(bitnr < 64); assert(w < FEATURE_WORDS); - return feature_word_info[w].feat_names[bitnr]; + name =3D feature_word_info[w].feat_names[bitnr]; + assert(bitnr < 32 || !(name && feature_word_info[w].type =3D=3D CPUID_= FEATURE_WORD)); + return name; } =20 /* Compatibily hack to maintain legacy +-feat semantic, @@ -3727,10 +3730,10 @@ static void x86_cpu_list_feature_names(FeatureWordA= rray features, strList **next =3D feat_names; =20 for (w =3D 0; w < FEATURE_WORDS; w++) { - uint32_t filtered =3D features[w]; + uint64_t filtered =3D features[w]; int i; - for (i =3D 0; i < 32; i++) { - if (filtered & (1UL << i)) { + for (i =3D 0; i < 64; i++) { + if (filtered & (1ULL << i)) { strList *new =3D g_new0(strList, 1); new->value =3D g_strdup(x86_cpu_feature_name(w, i)); *next =3D new; @@ -3866,7 +3869,7 @@ void x86_cpu_list(void) names =3D NULL; for (i =3D 0; i < ARRAY_SIZE(feature_word_info); i++) { FeatureWordInfo *fw =3D &feature_word_info[i]; - for (j =3D 0; j < 32; j++) { + for (j =3D 0; j < 64; j++) { if (fw->feat_names[j]) { names =3D g_list_append(names, (gpointer)fw->feat_names[j]= ); } @@ -3913,11 +3916,11 @@ CpuDefinitionInfoList *qmp_query_cpu_definitions(Er= ror **errp) return cpu_list; } =20 -static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w, +static uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, bool migratable_only) { FeatureWordInfo *wi =3D &feature_word_info[w]; - uint32_t r =3D 0; + uint64_t r =3D 0; =20 if (kvm_enabled()) { switch (wi->type) { @@ -4057,7 +4060,7 @@ static QDict *x86_cpu_static_props(void) for (w =3D 0; w < FEATURE_WORDS; w++) { FeatureWordInfo *fi =3D &feature_word_info[w]; int bit; - for (bit =3D 0; bit < 32; bit++) { + for (bit =3D 0; bit < 64; bit++) { if (!fi->feat_names[bit]) { continue; } @@ -5213,10 +5216,10 @@ static void x86_cpu_filter_features(X86CPU *cpu) : "TCG doesn't support requested feature"; =20 for (w =3D 0; w < FEATURE_WORDS; w++) { - uint32_t host_feat =3D + uint64_t host_feat =3D x86_cpu_get_supported_feature_word(w, false); - uint32_t requested_features =3D env->features[w]; - uint32_t unavailable_features =3D requested_features & ~host_feat; + uint64_t requested_features =3D env->features[w]; + uint64_t unavailable_features =3D requested_features & ~host_feat; mark_unavailable_features(cpu, w, unavailable_features, prefix); } =20 @@ -5512,7 +5515,7 @@ static void x86_cpu_unrealizefn(DeviceState *dev, Err= or **errp) =20 typedef struct BitProperty { FeatureWord w; - uint32_t mask; + uint64_t mask; } BitProperty; =20 static void x86_cpu_get_bit_prop(Object *obj, Visitor *v, const char *name, @@ -5520,7 +5523,7 @@ static void x86_cpu_get_bit_prop(Object *obj, Visitor= *v, const char *name, { X86CPU *cpu =3D X86_CPU(obj); BitProperty *fp =3D opaque; - uint32_t f =3D cpu->env.features[fp->w]; + uint64_t f =3D cpu->env.features[fp->w]; bool value =3D (f & fp->mask) =3D=3D fp->mask; visit_type_bool(v, name, &value, errp); } @@ -5573,7 +5576,7 @@ static void x86_cpu_register_bit_prop(X86CPU *cpu, { BitProperty *fp; ObjectProperty *op; - uint32_t mask =3D (1UL << bitnr); + uint64_t mask =3D (1ULL << bitnr); =20 op =3D object_property_find(OBJECT(cpu), prop_name, NULL); if (op) { @@ -5708,7 +5711,7 @@ static void x86_cpu_initfn(Object *obj) for (w =3D 0; w < FEATURE_WORDS; w++) { int bitnr; =20 - for (bitnr =3D 0; bitnr < 32; bitnr++) { + for (bitnr =3D 0; bitnr < 64; bitnr++) { x86_cpu_register_feature_bit_props(cpu, w, bitnr); } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 9334579..4e5dc30 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -501,7 +501,7 @@ typedef enum FeatureWord { FEATURE_WORDS, } FeatureWord; =20 -typedef uint32_t FeatureWordArray[FEATURE_WORDS]; +typedef uint64_t FeatureWordArray[FEATURE_WORDS]; =20 /* cpuid_features bits */ #define CPUID_FP87 (1U << 0) @@ -1438,7 +1438,7 @@ struct X86CPU { } mwait; =20 /* Features that were filtered out because of missing host capabilitie= s */ - uint32_t filtered_features[FEATURE_WORDS]; + FeatureWordArray filtered_features; =20 /* Enable PMU CPUID bits. This can't be enabled by default yet because * it doesn't have ABI stability guarantees, as it passes all PMU CPUID diff --git a/target/i386/kvm.c b/target/i386/kvm.c index e4b4f57..6801696 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -432,7 +432,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint= 32_t function, return ret; } =20 -uint32_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index) +uint64_t kvm_arch_get_supported_msr_feature(KVMState *s, uint32_t index) { struct { struct kvm_msrs info; --=20 1.8.3.1