From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550008; cv=none; d=zoho.com; s=zohoarc; b=lIRJhiXjt0HJdGQKgrPHE7JDdHIkxz6CKkbEkRbw7yl9TUcNFA68h7EegLMJobjSzN3crkbbXQTWqZFJbem+GF8RyAGUGwyeqQ4V93CdW7UD3UjE9iAFtIRyKbVzGCh3EZHXOuUqT6nTu9SXeQ90M0E+MyilQfHbU99HU0vcgCk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550008; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=lkrokEn8I4Uxkeypa6Se2Iob4vqi4O4893HAgNroJPU=; b=hE/Kn2lGTIRy4WiNSxVko+uxuZDiELB8HeLhad4ohjEbWyfeMqC5I5mkah4rLfVUHm48jL3i/rfMDIaQ43IF14G04jwHxvMmB2bJDfvWKx9v4X7DcapFqgtsQuCnfLlB3KZ+IGE2uMV1CI07nxmJrsr3FEbflvWmA31dm3s4/V4= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561550008645477.2894272237396; Wed, 26 Jun 2019 04:53:28 -0700 (PDT) Received: from localhost ([::1]:39062 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6UP-00070b-Lz for importer@patchew.org; Wed, 26 Jun 2019 07:53:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43623) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6NF-0001KA-Rh for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NE-0005t1-Dt for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:01 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60633 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NE-0005nW-1X for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8785F1A20B4; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 676131A2276; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:34 +0200 Message-Id: <1561549550-3501-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 01/17] hw/mips/gt64xxx_pci: Fix multiline comment syntax X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Since commit 8c06fbdf36b checkpatch.pl enforce a new multiline comment syntax. Since we'll move this code around, fix its style first. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-2-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 64 ++++++++++++++++++++++++++++-------------------= ---- 1 file changed, 35 insertions(+), 29 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index f707e59..c092464 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -248,10 +248,11 @@ typedef struct GT64120State { } GT64120State; =20 /* Adjust range to avoid touching space which isn't mappable via PCI */ -/* XXX: Hardcoded values for Malta: 0x1e000000 - 0x1f100000 - 0x1fc00000 - 0x1fd00000 */ -static void check_reserved_space (hwaddr *start, - hwaddr *length) +/* + * XXX: Hardcoded values for Malta: 0x1e000000 - 0x1f100000 + * 0x1fc00000 - 0x1fd00000 + */ +static void check_reserved_space(hwaddr *start, hwaddr *length) { hwaddr begin =3D *start; hwaddr end =3D *start + *length; @@ -650,8 +651,10 @@ static void gt64120_writel (void *opaque, hwaddr addr, case GT_SDRAM_B1: case GT_SDRAM_B2: case GT_SDRAM_B3: - /* We don't simulate electrical parameters of the SDRAM. - Accept, but ignore the values. */ + /* + * We don't simulate electrical parameters of the SDRAM. + * Accept, but ignore the values. + */ s->regs[saddr] =3D val; break; =20 @@ -674,8 +677,10 @@ static uint64_t gt64120_readl (void *opaque, =20 /* CPU Configuration */ case GT_MULTI: - /* Only one GT64xxx is present on the CPU bus, return - the initial value */ + /* + * Only one GT64xxx is present on the CPU bus, return + * the initial value. + */ val =3D s->regs[saddr]; break; =20 @@ -685,17 +690,18 @@ static uint64_t gt64120_readl (void *opaque, case GT_CPUERR_DATALO: case GT_CPUERR_DATAHI: case GT_CPUERR_PARITY: - /* Emulated memory has no error, always return the initial - values */ + /* Emulated memory has no error, always return the initial values.= */ val =3D s->regs[saddr]; break; =20 /* CPU Sync Barrier */ case GT_PCI0SYNC: case GT_PCI1SYNC: - /* Reading those register should empty all FIFO on the PCI - bus, which are not emulated. The return value should be - a random value that should be ignored. */ + /* + * Reading those register should empty all FIFO on the PCI + * bus, which are not emulated. The return value should be + * a random value that should be ignored. + */ val =3D 0xc000ffee; break; =20 @@ -705,8 +711,7 @@ static uint64_t gt64120_readl (void *opaque, case GT_ECC_MEM: case GT_ECC_CALC: case GT_ECC_ERRADDR: - /* Emulated memory has no error, always return the initial - values */ + /* Emulated memory has no error, always return the initial values.= */ val =3D s->regs[saddr]; break; =20 @@ -785,8 +790,10 @@ static uint64_t gt64120_readl (void *opaque, case GT_SDRAM_B1: case GT_SDRAM_B2: case GT_SDRAM_B3: - /* We don't simulate electrical parameters of the SDRAM. - Just return the last written value. */ + /* + * We don't simulate electrical parameters of the SDRAM. + * Just return the last written value. + */ val =3D s->regs[saddr]; break; =20 @@ -949,20 +956,20 @@ static int gt64120_pci_map_irq(PCIDevice *pci_dev, in= t irq_num) slot =3D (pci_dev->devfn >> 3); =20 switch (slot) { - /* PIIX4 USB */ - case 10: + /* PIIX4 USB */ + case 10: return 3; - /* AMD 79C973 Ethernet */ - case 11: + /* AMD 79C973 Ethernet */ + case 11: return 1; - /* Crystal 4281 Sound */ - case 12: + /* Crystal 4281 Sound */ + case 12: return 2; - /* PCI slot 1 to 4 */ - case 18 ... 21: + /* PCI slot 1 to 4 */ + case 18 ... 21: return ((slot - 18) + irq_num) & 0x03; - /* Unknown device, don't do any translation */ - default: + /* Unknown device, don't do any translation */ + default: return irq_num; } } @@ -980,8 +987,7 @@ static void gt64120_pci_set_irq(void *opaque, int irq_n= um, int level) /* XXX: optimize */ pic_irq =3D piix4_dev->config[0x60 + irq_num]; if (pic_irq < 16) { - /* The pic level is the logical OR of all the PCI irqs mapped - to it */ + /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ pic_level =3D 0; for (i =3D 0; i < 4; i++) { if (pic_irq =3D=3D piix4_dev->config[0x60 + i]) --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 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(Exim 4.71) (envelope-from ) id 1hg6NE-0005tA-EM for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:02 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60636 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NE-0005nd-1j for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 955841A4666; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 6FD2A1A457C; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:35 +0200 Message-Id: <1561549550-3501-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 02/17] hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Since we'll move this code around, fix its style first: ERROR: code indent should never use tabs Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-3-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 312 +++++++++++++++++++++++++---------------------= ---- 1 file changed, 156 insertions(+), 156 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index c092464..bbd719f 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -38,192 +38,192 @@ #define DPRINTF(fmt, ...) #endif =20 -#define GT_REGS (0x1000 >> 2) +#define GT_REGS (0x1000 >> 2) =20 /* CPU Configuration */ -#define GT_CPU (0x000 >> 2) -#define GT_MULTI (0x120 >> 2) +#define GT_CPU (0x000 >> 2) +#define GT_MULTI (0x120 >> 2) =20 /* CPU Address Decode */ -#define GT_SCS10LD (0x008 >> 2) -#define GT_SCS10HD (0x010 >> 2) -#define GT_SCS32LD (0x018 >> 2) -#define GT_SCS32HD (0x020 >> 2) -#define GT_CS20LD (0x028 >> 2) -#define GT_CS20HD (0x030 >> 2) -#define GT_CS3BOOTLD (0x038 >> 2) -#define GT_CS3BOOTHD (0x040 >> 2) -#define GT_PCI0IOLD (0x048 >> 2) -#define GT_PCI0IOHD (0x050 >> 2) -#define GT_PCI0M0LD (0x058 >> 2) -#define GT_PCI0M0HD (0x060 >> 2) -#define GT_PCI0M1LD (0x080 >> 2) -#define GT_PCI0M1HD (0x088 >> 2) -#define GT_PCI1IOLD (0x090 >> 2) -#define GT_PCI1IOHD (0x098 >> 2) -#define GT_PCI1M0LD (0x0a0 >> 2) -#define GT_PCI1M0HD (0x0a8 >> 2) -#define GT_PCI1M1LD (0x0b0 >> 2) -#define GT_PCI1M1HD (0x0b8 >> 2) -#define GT_ISD (0x068 >> 2) - -#define GT_SCS10AR (0x0d0 >> 2) -#define GT_SCS32AR (0x0d8 >> 2) -#define GT_CS20R (0x0e0 >> 2) -#define GT_CS3BOOTR (0x0e8 >> 2) - -#define GT_PCI0IOREMAP (0x0f0 >> 2) -#define GT_PCI0M0REMAP (0x0f8 >> 2) -#define GT_PCI0M1REMAP (0x100 >> 2) -#define GT_PCI1IOREMAP (0x108 >> 2) -#define GT_PCI1M0REMAP (0x110 >> 2) -#define GT_PCI1M1REMAP (0x118 >> 2) +#define GT_SCS10LD (0x008 >> 2) +#define GT_SCS10HD (0x010 >> 2) +#define GT_SCS32LD (0x018 >> 2) +#define GT_SCS32HD (0x020 >> 2) +#define GT_CS20LD (0x028 >> 2) +#define GT_CS20HD (0x030 >> 2) +#define GT_CS3BOOTLD (0x038 >> 2) +#define GT_CS3BOOTHD (0x040 >> 2) +#define GT_PCI0IOLD (0x048 >> 2) +#define GT_PCI0IOHD (0x050 >> 2) +#define GT_PCI0M0LD (0x058 >> 2) +#define GT_PCI0M0HD (0x060 >> 2) +#define GT_PCI0M1LD (0x080 >> 2) +#define GT_PCI0M1HD (0x088 >> 2) +#define GT_PCI1IOLD (0x090 >> 2) +#define GT_PCI1IOHD (0x098 >> 2) +#define GT_PCI1M0LD (0x0a0 >> 2) +#define GT_PCI1M0HD (0x0a8 >> 2) +#define GT_PCI1M1LD (0x0b0 >> 2) +#define GT_PCI1M1HD (0x0b8 >> 2) +#define GT_ISD (0x068 >> 2) + +#define GT_SCS10AR (0x0d0 >> 2) +#define GT_SCS32AR (0x0d8 >> 2) +#define GT_CS20R (0x0e0 >> 2) +#define GT_CS3BOOTR (0x0e8 >> 2) + +#define GT_PCI0IOREMAP (0x0f0 >> 2) +#define GT_PCI0M0REMAP (0x0f8 >> 2) +#define GT_PCI0M1REMAP (0x100 >> 2) +#define GT_PCI1IOREMAP (0x108 >> 2) +#define GT_PCI1M0REMAP (0x110 >> 2) +#define GT_PCI1M1REMAP (0x118 >> 2) =20 /* CPU Error Report */ -#define GT_CPUERR_ADDRLO (0x070 >> 2) -#define GT_CPUERR_ADDRHI (0x078 >> 2) -#define GT_CPUERR_DATALO (0x128 >> 2) /* GT-64120A only */ -#define GT_CPUERR_DATAHI (0x130 >> 2) /* GT-64120A only */ -#define GT_CPUERR_PARITY (0x138 >> 2) /* GT-64120A only */ +#define GT_CPUERR_ADDRLO (0x070 >> 2) +#define GT_CPUERR_ADDRHI (0x078 >> 2) +#define GT_CPUERR_DATALO (0x128 >> 2) /* GT-64120A only */ +#define GT_CPUERR_DATAHI (0x130 >> 2) /* GT-64120A only */ +#define GT_CPUERR_PARITY (0x138 >> 2) /* GT-64120A only */ =20 /* CPU Sync Barrier */ -#define GT_PCI0SYNC (0x0c0 >> 2) -#define GT_PCI1SYNC (0x0c8 >> 2) +#define GT_PCI0SYNC (0x0c0 >> 2) +#define GT_PCI1SYNC (0x0c8 >> 2) =20 /* SDRAM and Device Address Decode */ -#define GT_SCS0LD (0x400 >> 2) -#define GT_SCS0HD (0x404 >> 2) -#define GT_SCS1LD (0x408 >> 2) -#define GT_SCS1HD (0x40c >> 2) -#define GT_SCS2LD (0x410 >> 2) -#define GT_SCS2HD (0x414 >> 2) -#define GT_SCS3LD (0x418 >> 2) -#define GT_SCS3HD (0x41c >> 2) -#define GT_CS0LD (0x420 >> 2) -#define GT_CS0HD (0x424 >> 2) -#define GT_CS1LD (0x428 >> 2) -#define GT_CS1HD (0x42c >> 2) -#define GT_CS2LD (0x430 >> 2) -#define GT_CS2HD (0x434 >> 2) -#define GT_CS3LD (0x438 >> 2) -#define GT_CS3HD (0x43c >> 2) -#define GT_BOOTLD (0x440 >> 2) -#define GT_BOOTHD (0x444 >> 2) -#define GT_ADERR (0x470 >> 2) +#define GT_SCS0LD (0x400 >> 2) +#define GT_SCS0HD (0x404 >> 2) +#define GT_SCS1LD (0x408 >> 2) +#define GT_SCS1HD (0x40c >> 2) +#define GT_SCS2LD (0x410 >> 2) +#define GT_SCS2HD (0x414 >> 2) +#define GT_SCS3LD (0x418 >> 2) +#define GT_SCS3HD (0x41c >> 2) +#define GT_CS0LD (0x420 >> 2) +#define GT_CS0HD (0x424 >> 2) +#define GT_CS1LD (0x428 >> 2) +#define GT_CS1HD (0x42c >> 2) +#define GT_CS2LD (0x430 >> 2) +#define GT_CS2HD (0x434 >> 2) +#define GT_CS3LD (0x438 >> 2) +#define GT_CS3HD (0x43c >> 2) +#define GT_BOOTLD (0x440 >> 2) +#define GT_BOOTHD (0x444 >> 2) +#define GT_ADERR (0x470 >> 2) =20 /* SDRAM Configuration */ -#define GT_SDRAM_CFG (0x448 >> 2) -#define GT_SDRAM_OPMODE (0x474 >> 2) -#define GT_SDRAM_BM (0x478 >> 2) -#define GT_SDRAM_ADDRDECODE (0x47c >> 2) +#define GT_SDRAM_CFG (0x448 >> 2) +#define GT_SDRAM_OPMODE (0x474 >> 2) +#define GT_SDRAM_BM (0x478 >> 2) +#define GT_SDRAM_ADDRDECODE (0x47c >> 2) =20 /* SDRAM Parameters */ -#define GT_SDRAM_B0 (0x44c >> 2) -#define GT_SDRAM_B1 (0x450 >> 2) -#define GT_SDRAM_B2 (0x454 >> 2) -#define GT_SDRAM_B3 (0x458 >> 2) +#define GT_SDRAM_B0 (0x44c >> 2) +#define GT_SDRAM_B1 (0x450 >> 2) +#define GT_SDRAM_B2 (0x454 >> 2) +#define GT_SDRAM_B3 (0x458 >> 2) =20 /* Device Parameters */ -#define GT_DEV_B0 (0x45c >> 2) -#define GT_DEV_B1 (0x460 >> 2) -#define GT_DEV_B2 (0x464 >> 2) -#define GT_DEV_B3 (0x468 >> 2) -#define GT_DEV_BOOT (0x46c >> 2) +#define GT_DEV_B0 (0x45c >> 2) +#define GT_DEV_B1 (0x460 >> 2) +#define GT_DEV_B2 (0x464 >> 2) +#define GT_DEV_B3 (0x468 >> 2) +#define GT_DEV_BOOT (0x46c >> 2) =20 /* ECC */ -#define GT_ECC_ERRDATALO (0x480 >> 2) /* GT-64120A only */ -#define GT_ECC_ERRDATAHI (0x484 >> 2) /* GT-64120A only */ -#define GT_ECC_MEM (0x488 >> 2) /* GT-64120A only */ -#define GT_ECC_CALC (0x48c >> 2) /* GT-64120A only */ -#define GT_ECC_ERRADDR (0x490 >> 2) /* GT-64120A only */ +#define GT_ECC_ERRDATALO (0x480 >> 2) /* GT-64120A only */ +#define GT_ECC_ERRDATAHI (0x484 >> 2) /* GT-64120A only */ +#define GT_ECC_MEM (0x488 >> 2) /* GT-64120A only */ +#define GT_ECC_CALC (0x48c >> 2) /* GT-64120A only */ +#define GT_ECC_ERRADDR (0x490 >> 2) /* GT-64120A only */ =20 /* DMA Record */ -#define GT_DMA0_CNT (0x800 >> 2) -#define GT_DMA1_CNT (0x804 >> 2) -#define GT_DMA2_CNT (0x808 >> 2) -#define GT_DMA3_CNT (0x80c >> 2) -#define GT_DMA0_SA (0x810 >> 2) -#define GT_DMA1_SA (0x814 >> 2) -#define GT_DMA2_SA (0x818 >> 2) -#define GT_DMA3_SA (0x81c >> 2) -#define GT_DMA0_DA (0x820 >> 2) -#define GT_DMA1_DA (0x824 >> 2) -#define GT_DMA2_DA (0x828 >> 2) -#define GT_DMA3_DA (0x82c >> 2) -#define GT_DMA0_NEXT (0x830 >> 2) -#define GT_DMA1_NEXT (0x834 >> 2) -#define GT_DMA2_NEXT (0x838 >> 2) -#define GT_DMA3_NEXT (0x83c >> 2) -#define GT_DMA0_CUR (0x870 >> 2) -#define GT_DMA1_CUR (0x874 >> 2) -#define GT_DMA2_CUR (0x878 >> 2) -#define GT_DMA3_CUR (0x87c >> 2) +#define GT_DMA0_CNT (0x800 >> 2) +#define GT_DMA1_CNT (0x804 >> 2) +#define GT_DMA2_CNT (0x808 >> 2) +#define GT_DMA3_CNT (0x80c >> 2) +#define GT_DMA0_SA (0x810 >> 2) +#define GT_DMA1_SA (0x814 >> 2) +#define GT_DMA2_SA (0x818 >> 2) +#define GT_DMA3_SA (0x81c >> 2) +#define GT_DMA0_DA (0x820 >> 2) +#define GT_DMA1_DA (0x824 >> 2) +#define GT_DMA2_DA (0x828 >> 2) +#define GT_DMA3_DA (0x82c >> 2) +#define GT_DMA0_NEXT (0x830 >> 2) +#define GT_DMA1_NEXT (0x834 >> 2) +#define GT_DMA2_NEXT (0x838 >> 2) +#define GT_DMA3_NEXT (0x83c >> 2) +#define GT_DMA0_CUR (0x870 >> 2) +#define GT_DMA1_CUR (0x874 >> 2) +#define GT_DMA2_CUR (0x878 >> 2) +#define GT_DMA3_CUR (0x87c >> 2) =20 /* DMA Channel Control */ -#define GT_DMA0_CTRL (0x840 >> 2) -#define GT_DMA1_CTRL (0x844 >> 2) -#define GT_DMA2_CTRL (0x848 >> 2) -#define GT_DMA3_CTRL (0x84c >> 2) +#define GT_DMA0_CTRL (0x840 >> 2) +#define GT_DMA1_CTRL (0x844 >> 2) +#define GT_DMA2_CTRL (0x848 >> 2) +#define GT_DMA3_CTRL (0x84c >> 2) =20 /* DMA Arbiter */ -#define GT_DMA_ARB (0x860 >> 2) +#define GT_DMA_ARB (0x860 >> 2) =20 /* Timer/Counter */ -#define GT_TC0 (0x850 >> 2) -#define GT_TC1 (0x854 >> 2) -#define GT_TC2 (0x858 >> 2) -#define GT_TC3 (0x85c >> 2) -#define GT_TC_CONTROL (0x864 >> 2) +#define GT_TC0 (0x850 >> 2) +#define GT_TC1 (0x854 >> 2) +#define GT_TC2 (0x858 >> 2) +#define GT_TC3 (0x85c >> 2) +#define GT_TC_CONTROL (0x864 >> 2) =20 /* PCI Internal */ -#define GT_PCI0_CMD (0xc00 >> 2) -#define GT_PCI0_TOR (0xc04 >> 2) -#define GT_PCI0_BS_SCS10 (0xc08 >> 2) -#define GT_PCI0_BS_SCS32 (0xc0c >> 2) -#define GT_PCI0_BS_CS20 (0xc10 >> 2) -#define GT_PCI0_BS_CS3BT (0xc14 >> 2) -#define GT_PCI1_IACK (0xc30 >> 2) -#define GT_PCI0_IACK (0xc34 >> 2) -#define GT_PCI0_BARE (0xc3c >> 2) -#define GT_PCI0_PREFMBR (0xc40 >> 2) -#define GT_PCI0_SCS10_BAR (0xc48 >> 2) -#define GT_PCI0_SCS32_BAR (0xc4c >> 2) -#define GT_PCI0_CS20_BAR (0xc50 >> 2) -#define GT_PCI0_CS3BT_BAR (0xc54 >> 2) -#define GT_PCI0_SSCS10_BAR (0xc58 >> 2) -#define GT_PCI0_SSCS32_BAR (0xc5c >> 2) -#define GT_PCI0_SCS3BT_BAR (0xc64 >> 2) -#define GT_PCI1_CMD (0xc80 >> 2) -#define GT_PCI1_TOR (0xc84 >> 2) -#define GT_PCI1_BS_SCS10 (0xc88 >> 2) -#define GT_PCI1_BS_SCS32 (0xc8c >> 2) -#define GT_PCI1_BS_CS20 (0xc90 >> 2) -#define GT_PCI1_BS_CS3BT (0xc94 >> 2) -#define GT_PCI1_BARE (0xcbc >> 2) -#define GT_PCI1_PREFMBR (0xcc0 >> 2) -#define GT_PCI1_SCS10_BAR (0xcc8 >> 2) -#define GT_PCI1_SCS32_BAR (0xccc >> 2) -#define GT_PCI1_CS20_BAR (0xcd0 >> 2) -#define GT_PCI1_CS3BT_BAR (0xcd4 >> 2) -#define GT_PCI1_SSCS10_BAR (0xcd8 >> 2) -#define GT_PCI1_SSCS32_BAR (0xcdc >> 2) -#define GT_PCI1_SCS3BT_BAR (0xce4 >> 2) -#define GT_PCI1_CFGADDR (0xcf0 >> 2) -#define GT_PCI1_CFGDATA (0xcf4 >> 2) -#define GT_PCI0_CFGADDR (0xcf8 >> 2) -#define GT_PCI0_CFGDATA (0xcfc >> 2) +#define GT_PCI0_CMD (0xc00 >> 2) +#define GT_PCI0_TOR (0xc04 >> 2) +#define GT_PCI0_BS_SCS10 (0xc08 >> 2) +#define GT_PCI0_BS_SCS32 (0xc0c >> 2) +#define GT_PCI0_BS_CS20 (0xc10 >> 2) +#define GT_PCI0_BS_CS3BT (0xc14 >> 2) +#define GT_PCI1_IACK (0xc30 >> 2) +#define GT_PCI0_IACK (0xc34 >> 2) +#define GT_PCI0_BARE (0xc3c >> 2) +#define GT_PCI0_PREFMBR (0xc40 >> 2) +#define GT_PCI0_SCS10_BAR (0xc48 >> 2) +#define GT_PCI0_SCS32_BAR (0xc4c >> 2) +#define GT_PCI0_CS20_BAR (0xc50 >> 2) +#define GT_PCI0_CS3BT_BAR (0xc54 >> 2) +#define GT_PCI0_SSCS10_BAR (0xc58 >> 2) +#define GT_PCI0_SSCS32_BAR (0xc5c >> 2) +#define GT_PCI0_SCS3BT_BAR (0xc64 >> 2) +#define GT_PCI1_CMD (0xc80 >> 2) +#define GT_PCI1_TOR (0xc84 >> 2) +#define GT_PCI1_BS_SCS10 (0xc88 >> 2) +#define GT_PCI1_BS_SCS32 (0xc8c >> 2) +#define GT_PCI1_BS_CS20 (0xc90 >> 2) +#define GT_PCI1_BS_CS3BT (0xc94 >> 2) +#define GT_PCI1_BARE (0xcbc >> 2) +#define GT_PCI1_PREFMBR (0xcc0 >> 2) +#define GT_PCI1_SCS10_BAR (0xcc8 >> 2) +#define GT_PCI1_SCS32_BAR (0xccc >> 2) +#define GT_PCI1_CS20_BAR (0xcd0 >> 2) +#define GT_PCI1_CS3BT_BAR (0xcd4 >> 2) +#define GT_PCI1_SSCS10_BAR (0xcd8 >> 2) +#define GT_PCI1_SSCS32_BAR (0xcdc >> 2) +#define GT_PCI1_SCS3BT_BAR (0xce4 >> 2) +#define GT_PCI1_CFGADDR (0xcf0 >> 2) +#define GT_PCI1_CFGDATA (0xcf4 >> 2) +#define GT_PCI0_CFGADDR (0xcf8 >> 2) +#define GT_PCI0_CFGDATA (0xcfc >> 2) =20 /* Interrupts */ -#define GT_INTRCAUSE (0xc18 >> 2) -#define GT_INTRMASK (0xc1c >> 2) -#define GT_PCI0_ICMASK (0xc24 >> 2) -#define GT_PCI0_SERR0MASK (0xc28 >> 2) -#define GT_CPU_INTSEL (0xc70 >> 2) -#define GT_PCI0_INTSEL (0xc74 >> 2) -#define GT_HINTRCAUSE (0xc98 >> 2) -#define GT_HINTRMASK (0xc9c >> 2) -#define GT_PCI0_HICMASK (0xca4 >> 2) -#define GT_PCI1_SERR1MASK (0xca8 >> 2) +#define GT_INTRCAUSE (0xc18 >> 2) +#define GT_INTRMASK (0xc1c >> 2) +#define GT_PCI0_ICMASK (0xc24 >> 2) +#define GT_PCI0_SERR0MASK (0xc28 >> 2) +#define GT_CPU_INTSEL (0xc70 >> 2) +#define GT_PCI0_INTSEL (0xc74 >> 2) +#define GT_HINTRCAUSE (0xc98 >> 2) +#define GT_HINTRMASK (0xc9c >> 2) +#define GT_PCI0_HICMASK (0xca4 >> 2) +#define GT_PCI1_SERR1MASK (0xca8 >> 2) =20 #define PCI_MAPPING_ENTRY(regname) \ hwaddr regname ##_start; \ --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561549838; cv=none; d=zoho.com; s=zohoarc; b=R1uIW4OV+aE4yaz/8yAMbaohop/8eqb1Cm8/7fX00XPnU9mtb8Begokiq5OIQY2QCIeqFlKrnLxiJzzZZhsYXkqcVob2BDHRi2PZDvad33dIxteWqYcJF7AfllMPebkunaaDbJgBRcj1TCTC6WYsFw/74OiNCGyjN9x1BWnGdE8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561549838; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Vp3y92PclvyFxpRLoKs2S3l+IQr9pESjTKygUcpXB4U=; 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(Exim 4.71) (envelope-from ) id 1hg6NE-0005sR-9p for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:01 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60650 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NE-0005o5-1f for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 9F61F1A457C; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 7E9C81A4651; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:36 +0200 Message-Id: <1561549550-3501-4-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 03/17] hw/mips/gt64xxx_pci: Fix 'braces' coding style issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Since we'll move this code around, fix its style first: ERROR: braces {} are necessary for all arms of this statement Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-4-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index bbd719f..cfd4979 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -257,19 +257,25 @@ static void check_reserved_space(hwaddr *start, hwadd= r *length) hwaddr begin =3D *start; hwaddr end =3D *start + *length; =20 - if (end >=3D 0x1e000000LL && end < 0x1f100000LL) + if (end >=3D 0x1e000000LL && end < 0x1f100000LL) { end =3D 0x1e000000LL; - if (begin >=3D 0x1e000000LL && begin < 0x1f100000LL) + } + if (begin >=3D 0x1e000000LL && begin < 0x1f100000LL) { begin =3D 0x1f100000LL; - if (end >=3D 0x1fc00000LL && end < 0x1fd00000LL) + } + if (end >=3D 0x1fc00000LL && end < 0x1fd00000LL) { end =3D 0x1fc00000LL; - if (begin >=3D 0x1fc00000LL && begin < 0x1fd00000LL) + } + if (begin >=3D 0x1fc00000LL && begin < 0x1fd00000LL) { begin =3D 0x1fd00000LL; + } /* XXX: This is broken when a reserved range splits the requested rang= e */ - if (end >=3D 0x1f100000LL && begin < 0x1e000000LL) + if (end >=3D 0x1f100000LL && begin < 0x1e000000LL) { end =3D 0x1e000000LL; - if (end >=3D 0x1fd00000LL && begin < 0x1fc00000LL) + } + if (end >=3D 0x1fd00000LL && begin < 0x1fc00000LL) { end =3D 0x1fc00000LL; + } =20 *start =3D begin; *length =3D end - begin; @@ -385,8 +391,9 @@ static void gt64120_writel (void *opaque, hwaddr addr, PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t saddr; =20 - if (!(s->regs[GT_CPU] & 0x00001000)) + if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); + } =20 saddr =3D (addr & 0xfff) >> 2; switch (saddr) { @@ -937,8 +944,9 @@ static uint64_t gt64120_readl (void *opaque, break; } =20 - if (!(s->regs[GT_CPU] & 0x00001000)) + if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); + } =20 return val; } @@ -990,8 +998,9 @@ static void gt64120_pci_set_irq(void *opaque, int irq_n= um, int level) /* The pic level is the logical OR of all the PCI irqs mapped to i= t. */ pic_level =3D 0; for (i =3D 0; i < 4; i++) { - if (pic_irq =3D=3D piix4_dev->config[0x60 + i]) + if (pic_irq =3D=3D piix4_dev->config[0x60 + i]) { pic_level |=3D pci_irq_levels[i]; + } } qemu_set_irq(pic[pic_irq], pic_level); } --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561549835; cv=none; d=zoho.com; s=zohoarc; b=GCZLcsyBcS4s34gCqUOA2RHrKlVSOroEZ09hAhjtUdnupoJpeOhdZ6080GCvAQGRWEkRLcPQvjn3emqQjzEzU0K9f0Ej+LRjwKQly6i4cbJUGTZg8rekv9DdKp95GXDR275NFVPIyL5BZjjSFAiVNA9unvzyMfUMUxckaC+06yo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561549835; 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Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:37 +0200 Message-Id: <1561549550-3501-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 04/17] hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Since we'll move this code around, fix its style first: ERROR: space prohibited between function name and open parenthesis ERROR: line over 90 characters Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-5-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index cfd4979..0b9fb02 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -384,8 +384,8 @@ static const VMStateDescription vmstate_gt64120 =3D { } }; =20 -static void gt64120_writel (void *opaque, hwaddr addr, - uint64_t val, unsigned size) +static void gt64120_writel(void *opaque, hwaddr addr, + uint64_t val, unsigned size) { GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); @@ -671,8 +671,8 @@ static void gt64120_writel (void *opaque, hwaddr addr, } } =20 -static uint64_t gt64120_readl (void *opaque, - hwaddr addr, unsigned size) +static uint64_t gt64120_readl(void *opaque, + hwaddr addr, unsigned size) { GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); @@ -1193,7 +1193,8 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); qdev_init_nofail(dev); - memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-= mem", 0x1000); + memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, + "isd-mem", 0x1000); =20 pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); return phb->bus; --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) 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qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:01 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id BEA211A4608; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 90B381A464F; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:38 +0200 Message-Id: <1561549550-3501-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 05/17] hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-6-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 48 +++++++++++++++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 11 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 0b9fb02..f44326f 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/log.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/pci/pci.h" @@ -466,12 +467,20 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_CPUERR_DATAHI: case GT_CPUERR_PARITY: /* Read-only registers, do nothing */ + qemu_log_mask(LOG_GUEST_ERROR, + "gt64120: Read-only register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* CPU Sync Barrier */ case GT_PCI0SYNC: case GT_PCI1SYNC: /* Read-only registers, do nothing */ + qemu_log_mask(LOG_GUEST_ERROR, + "gt64120: Read-only register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* SDRAM and Device Address Decode */ @@ -510,7 +519,10 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_DEV_B3: case GT_DEV_BOOT: /* Not implemented */ - DPRINTF ("Unimplemented device register offset 0x%x\n", saddr << 2= ); + qemu_log_mask(LOG_UNIMP, + "gt64120: Unimplemented device register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* ECC */ @@ -520,6 +532,10 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_ECC_CALC: case GT_ECC_ERRADDR: /* Read-only registers, do nothing */ + qemu_log_mask(LOG_GUEST_ERROR, + "gt64120: Read-only register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* DMA Record */ @@ -543,23 +559,20 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_DMA1_CUR: case GT_DMA2_CUR: case GT_DMA3_CUR: - /* Not implemented */ - DPRINTF ("Unimplemented DMA register offset 0x%x\n", saddr << 2); - break; =20 /* DMA Channel Control */ case GT_DMA0_CTRL: case GT_DMA1_CTRL: case GT_DMA2_CTRL: case GT_DMA3_CTRL: - /* Not implemented */ - DPRINTF ("Unimplemented DMA register offset 0x%x\n", saddr << 2); - break; =20 /* DMA Arbiter */ case GT_DMA_ARB: /* Not implemented */ - DPRINTF ("Unimplemented DMA register offset 0x%x\n", saddr << 2); + qemu_log_mask(LOG_UNIMP, + "gt64120: Unimplemented DMA register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* Timer/Counter */ @@ -569,7 +582,10 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_TC3: case GT_TC_CONTROL: /* Not implemented */ - DPRINTF ("Unimplemented timer register offset 0x%x\n", saddr << 2); + qemu_log_mask(LOG_UNIMP, + "gt64120: Unimplemented timer register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; =20 /* PCI Internal */ @@ -610,6 +626,10 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_PCI1_CFGADDR: case GT_PCI1_CFGDATA: /* not implemented */ + qemu_log_mask(LOG_UNIMP, + "gt64120: Unimplemented timer register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; case GT_PCI0_CFGADDR: phb->config_reg =3D val & 0x80fffffc; @@ -666,7 +686,10 @@ static void gt64120_writel(void *opaque, hwaddr addr, break; =20 default: - DPRINTF ("Bad register offset 0x%x\n", (int)addr); + qemu_log_mask(LOG_GUEST_ERROR, + "gt64120: Illegal register write " + "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + saddr << 2, size, size << 1, val); break; } } @@ -940,7 +963,10 @@ static uint64_t gt64120_readl(void *opaque, =20 default: val =3D s->regs[saddr]; - DPRINTF ("Bad register offset 0x%x\n", (int)addr); + qemu_log_mask(LOG_GUEST_ERROR, + "gt64120: Illegal register read " + "reg:0x03%x size:%u value:0x%0*x\n", + saddr << 2, size, size << 1, val); break; } =20 --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550046; cv=none; d=zoho.com; s=zohoarc; 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C33F91A46A8; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 9A3E91A469C; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:39 +0200 Message-Id: <1561549550-3501-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 06/17] hw/mips/gt64xxx_pci: Convert debug printf()s to trace events X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-7-f4bug@amsat.org> --- Makefile.objs | 1 + hw/mips/gt64xxx_pci.c | 29 ++++++++++------------------- hw/mips/trace-events | 4 ++++ 3 files changed, 15 insertions(+), 19 deletions(-) create mode 100644 hw/mips/trace-events diff --git a/Makefile.objs b/Makefile.objs index 658cfc9..3b83621 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -163,6 +163,7 @@ trace-events-subdirs +=3D hw/input trace-events-subdirs +=3D hw/intc trace-events-subdirs +=3D hw/isa trace-events-subdirs +=3D hw/mem +trace-events-subdirs +=3D hw/mips trace-events-subdirs +=3D hw/misc trace-events-subdirs +=3D hw/misc/macio trace-events-subdirs +=3D hw/net diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index f44326f..815ef07 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -30,14 +30,7 @@ #include "hw/pci/pci_host.h" #include "hw/i386/pc.h" #include "exec/address-spaces.h" - -//#define DEBUG - -#ifdef DEBUG -#define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __func__, ##__VA_ARG= S__) -#else -#define DPRINTF(fmt, ...) -#endif +#include "trace.h" =20 #define GT_REGS (0x1000 >> 2) =20 @@ -294,9 +287,7 @@ static void gt64120_isd_mapping(GT64120State *s) check_reserved_space(&start, &length); length =3D 0x1000; /* Map new address */ - DPRINTF("ISD: "TARGET_FMT_plx"@"TARGET_FMT_plx - " -> "TARGET_FMT_plx"@"TARGET_FMT_plx"\n", - s->ISD_length, s->ISD_start, length, start); + trace_gt64120_isd_remap(s->ISD_length, s->ISD_start, length, start); s->ISD_start =3D start; s->ISD_length =3D length; memory_region_add_subregion(get_system_memory(), s->ISD_start, &s->ISD= _mem); @@ -648,19 +639,19 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* not really implemented */ s->regs[saddr] =3D ~(~(s->regs[saddr]) | ~(val & 0xfffffffe)); s->regs[saddr] |=3D !!(s->regs[saddr] & 0xfffffffe); - DPRINTF("INTRCAUSE %" PRIx64 "\n", val); + trace_gt64120_write("INTRCAUSE", size << 1, val); break; case GT_INTRMASK: s->regs[saddr] =3D val & 0x3c3ffffe; - DPRINTF("INTRMASK %" PRIx64 "\n", val); + trace_gt64120_write("INTRMASK", size << 1, val); break; case GT_PCI0_ICMASK: s->regs[saddr] =3D val & 0x03fffffe; - DPRINTF("ICMASK %" PRIx64 "\n", val); + trace_gt64120_write("ICMASK", size << 1, val); break; case GT_PCI0_SERR0MASK: s->regs[saddr] =3D val & 0x0000003f; - DPRINTF("SERR0MASK %" PRIx64 "\n", val); + trace_gt64120_write("SERR0MASK", size << 1, val); break; =20 /* Reserved when only PCI_0 is configured. */ @@ -936,19 +927,19 @@ static uint64_t gt64120_readl(void *opaque, /* Interrupts */ case GT_INTRCAUSE: val =3D s->regs[saddr]; - DPRINTF("INTRCAUSE %x\n", val); + trace_gt64120_read("INTRCAUSE", size << 1, val); break; case GT_INTRMASK: val =3D s->regs[saddr]; - DPRINTF("INTRMASK %x\n", val); + trace_gt64120_read("INTRMASK", size << 1, val); break; case GT_PCI0_ICMASK: val =3D s->regs[saddr]; - DPRINTF("ICMASK %x\n", val); + trace_gt64120_read("ICMASK", size << 1, val); break; case GT_PCI0_SERR0MASK: val =3D s->regs[saddr]; - DPRINTF("SERR0MASK %x\n", val); + trace_gt64120_read("SERR0MASK", size << 1, val); break; =20 /* Reserved when only PCI_0 is configured. */ diff --git a/hw/mips/trace-events b/hw/mips/trace-events new file mode 100644 index 0000000..75d4c73 --- /dev/null +++ b/hw/mips/trace-events @@ -0,0 +1,4 @@ +# gt64xxx.c +gt64120_read(const char *regname, int width, uint64_t value) "gt64120 read= %s value:0x%0*" PRIx64 +gt64120_write(const char *regname, int width, uint64_t value) "gt64120 wri= te %s value:0x%0*" PRIx64 +gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561549839; cv=none; d=zoho.com; s=zohoarc; b=RkC7FfkhFZ0Z4DSQbj9S2dq3fPEUINoNT/Em3qTmy8GztZPh3gNqQhYil3za7p1UiPE2lSEWJXWhU1xQZ7Ex9nSQtSy0UQ6IJYRhexFbpyImL1jRS+AG5H9w0SI+jN9jRRzjWd6VoFgsS2v7t0O72kjPt1nbwuU6j9/JQeNTpn4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561549839; 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Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:40 +0200 Message-Id: <1561549550-3501-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 07/17] hw/mips/gt64xxx_pci: Align the pci0-mem size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 One byte is missing, use an aligned size. (qemu) info mtree memory-region: pci0-mem 0000000000000000-00000000fffffffe (prio 0, i/o): pci0-mem ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Message-Id: <20190624222844.26584-8-f4bug@amsat.org> --- hw/mips/gt64xxx_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 815ef07..2fa313f 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "qemu/log.h" #include "hw/hw.h" #include "hw/mips/mips.h" @@ -1201,7 +1202,7 @@ PCIBus *gt64120_register(qemu_irq *pic) dev =3D qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); d =3D GT64120_PCI_HOST_BRIDGE(dev); phb =3D PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); + memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); phb->bus =3D pci_register_root_bus(dev, "pci", gt64120_pci_set_irq, gt64120_pci_map_= irq, --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Wed, 26 Jun 2019 07:46:01 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id E261D1A469C; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id ACF351A2276; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:41 +0200 Message-Id: <1561549550-3501-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 08/17] dma/rc4030: Fix off-by-one error in specified memory region size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic The size is one byte less than it should be: address-space: rc4030-dma 0000000000000000-00000000fffffffe (prio 0, i/o): rc4030.dma rc4030 is used in MIPS Jazz board context. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <1561472838-32272-2-git-send-email-aleksandar.markovic@rt-rk.co= m> --- hw/dma/rc4030.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 6ccafec..88ff271 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "hw/hw.h" #include "hw/mips/mips.h" #include "hw/sysbus.h" @@ -678,7 +679,7 @@ static void rc4030_realize(DeviceState *dev, Error **er= rp) =20 memory_region_init_iommu(&s->dma_mr, sizeof(s->dma_mr), TYPE_RC4030_IOMMU_MEMORY_REGION, - o, "rc4030.dma", UINT32_MAX); + o, "rc4030.dma", 4 * GiB); address_space_init(&s->dma_as, MEMORY_REGION(&s->dma_mr), "rc4030-dma"= ); } =20 --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550011; cv=none; d=zoho.com; s=zohoarc; b=n3HhHEFn7a9KtEFW+JcC/9TENWj5UDtaTglUKojnjDmcZn1aGok588u8m+aeFXt/va5Y7l33zlAaZnJoxF9OzGzVH+e6wPeDLcSpcSguN4hkJu0SmCqVQQdZWSSk25cBop63PRCJGM7f+A/XehuQ2k8fxbs3EOX40D732XDdbo8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550011; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=mWQ3Y+cqLNZzsFCJpwCAUjScS9f0GAp9dKe363ntOaM=; b=dIKd+x9YUYRnHVR+cIxtU4ENLZGyGobMG5vJLigneUR7PaJww0ALcL7AcZosYdJHGsCL8SJA1PB8qVfETc2YrdZWDVSg4FXkQO0+mzvykZGiy+19bA+tl136HqkC4Y1ZaoNw3i4kCqdEDFXgw6Ljt1MpGin2Nyl2CzDEKBsi3DM= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561550011575989.0709559509675; Wed, 26 Jun 2019 04:53:31 -0700 (PDT) Received: from localhost ([::1]:39064 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6US-00077c-IY for importer@patchew.org; Wed, 26 Jun 2019 07:53:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43668) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6NH-0001KL-3p for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NF-0005wf-Mz for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:02 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60774 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NF-0005ts-EE for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:01 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id E478A1A46A1; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B5A811A4651; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:42 +0200 Message-Id: <1561549550-3501-10-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 09/17] dma/rc4030: Minor code style cleanup X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Fix some simple checkpatch.pl warnings in rc4030.c. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <1561472838-32272-3-git-send-email-aleksandar.markovic@rt-rk.co= m> --- hw/dma/rc4030.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 88ff271..155af9b 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -58,8 +58,8 @@ typedef struct dma_pagetable_entry { =20 #define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region" =20 -typedef struct rc4030State -{ +typedef struct rc4030State { + SysBusDevice parent; =20 uint32_t config; /* 0x0000: RC4030 config register */ @@ -152,8 +152,9 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr, = unsigned int size) case 0x0058: val =3D s->cache_bmask; /* HACK */ - if (s->cache_bmask =3D=3D (uint32_t)-1) + if (s->cache_bmask =3D=3D (uint32_t)-1) { s->cache_bmask =3D 0; + } break; /* Remote Speed Registers */ case 0x0070: @@ -538,8 +539,9 @@ static void rc4030_reset(DeviceState *dev) =20 s->memory_refresh_rate =3D 0x18186; s->nvram_protect =3D 7; - for (i =3D 0; i < 15; i++) + for (i =3D 0; i < 15; i++) { s->rem_speed[i] =3D 7; + } s->imr_jazz =3D 0x10; /* XXX: required by firmware, but why? */ s->isr_jazz =3D 0; =20 @@ -551,7 +553,7 @@ static void rc4030_reset(DeviceState *dev) =20 static int rc4030_post_load(void *opaque, int version_id) { - rc4030State* s =3D opaque; + rc4030State *s =3D opaque; =20 set_next_tick(s); update_jazz_irq(s); @@ -591,7 +593,8 @@ static void rc4030_do_dma(void *opaque, int n, uint8_t = *buf, int len, int is_wri hwaddr dma_addr; int dev_to_mem; =20 - s->dma_regs[n][DMA_REG_ENABLE] &=3D ~(DMA_FLAG_TC_INTR | DMA_FLAG_MEM_= INTR | DMA_FLAG_ADDR_INTR); + s->dma_regs[n][DMA_REG_ENABLE] &=3D + ~(DMA_FLAG_TC_INTR | DMA_FLAG_MEM_INTR | DMA_FLAG_ADDR_INTR); =20 /* Check DMA channel consistency */ dev_to_mem =3D (s->dma_regs[n][DMA_REG_ENABLE] & DMA_FLAG_MEM_TO_DEV) = ? 0 : 1; @@ -603,8 +606,9 @@ static void rc4030_do_dma(void *opaque, int n, uint8_t = *buf, int len, int is_wri } =20 /* Get start address and len */ - if (len > s->dma_regs[n][DMA_REG_COUNT]) + if (len > s->dma_regs[n][DMA_REG_COUNT]) { len =3D s->dma_regs[n][DMA_REG_COUNT]; + } dma_addr =3D s->dma_regs[n][DMA_REG_ADDRESS]; =20 /* Read/write data at right place */ --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550234; cv=none; d=zoho.com; s=zohoarc; b=YlNO+zka7UtRYz7mEAd+zeym/vzeKlh87S1BDaFp95zeLjqtzGRbF44iR8IZQxPU4X8u9k/9E/5FjV0G6l+aQ4z7zTfH7ntTEq37hrO20UZTWj2x8j6oQvnF2UObdlW1FzvE9girBEGVZwumbDBIckI8W1tWl5DBwcnl9q7uVeQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550234; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=RxhKcLjHHis1cFiIff0AfNlTgP0LVctX/cVZnerc8xY=; b=KT48h3NWodPdCO9TNcLQr7SzsNfeL0Uj/Wz54Ooc53mDEFwGz9jBIML/KwqQRRGKHxUPbCN/YUpUfIDjrsNDQ5bY4Uw3ODTmLvP4UlWhxHF0KsXf+t0k1mHzUvkd4X7nW47nDIKNMJ2RL0wuMIpxPi0gVCgZBiBho2EdgbHXTGI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561550234583628.2352379165466; Wed, 26 Jun 2019 04:57:14 -0700 (PDT) Received: from localhost ([::1]:39094 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6Y0-0002gv-Rf for importer@patchew.org; Wed, 26 Jun 2019 07:57:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43822) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6Nc-0001ln-EL for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NR-0006Ok-0P for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:24 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60783 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NP-0005uB-HK for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2DAB91A46A2; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id BFD521A46A3; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:43 +0200 Message-Id: <1561549550-3501-11-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 10/17] tests/tcg: target/mips: Add tests for MSA bit move instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add tests for MSA bit move instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-2-git-send-email-aleksandar.markovic@rt-rk.co= m> --- tests/tcg/mips/include/wrappers_msa.h | 32 ++- .../mips/user/ase/msa/bit-move/test_msa_binsl_b.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsl_d.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsl_h.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsl_w.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsr_b.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsr_d.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsr_h.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_binsr_w.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_bmnz_v.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_bmz_v.c | 214 +++++++++++++++++= ++++ .../mips/user/ase/msa/bit-move/test_msa_bsel_v.c | 214 +++++++++++++++++= ++++ tests/tcg/mips/user/ase/msa/test_msa_compile.sh | 22 +++ tests/tcg/mips/user/ase/msa/test_msa_run.sh | 11 ++ 14 files changed, 2415 insertions(+), 4 deletions(-) create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_b.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_d.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_h.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_w.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_b.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_d.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_h.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_w.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmnz_v.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmz_v.c create mode 100644 tests/tcg/mips/user/ase/msa/bit-move/test_msa_bsel_v.c diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index 9570aa8..17fd277 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -124,8 +124,9 @@ static inline void do_msa_##suffix(const void *input1, = \ } =20 #define DO_MSA__WD__WD_WT(suffix, mnemonic) \ -static inline void do_msa_##suffix(void *input1, void *input2, \ - void *output) \ +static inline void do_msa_##suffix(const void *input1, \ + const void *input2, \ + const void *output) \ { \ __asm__ volatile ( \ "move $t0, %0\n\t" \ @@ -142,8 +143,9 @@ static inline void do_msa_##suffix(void *input1, void *= input2, \ } =20 #define DO_MSA__WD__WS_WD(suffix, mnemonic) \ -static inline void do_msa_##suffix(void *input1, void *input2, \ - void *output) \ +static inline void do_msa_##suffix(const void *input1, \ + const void *input2, \ + const void *output) \ { \ __asm__ volatile ( \ "move $t0, %0\n\t" \ @@ -187,18 +189,40 @@ DO_MSA__WD__WS(PCNT_D, pcnt.d) */ =20 DO_MSA__WD__WS_WT(BINSL_B, binsl.b) +DO_MSA__WD__WD_WT(BINSL_B__DDT, binsl.b) +DO_MSA__WD__WS_WD(BINSL_B__DSD, binsl.b) DO_MSA__WD__WS_WT(BINSL_H, binsl.h) +DO_MSA__WD__WD_WT(BINSL_H__DDT, binsl.h) +DO_MSA__WD__WS_WD(BINSL_H__DSD, binsl.h) DO_MSA__WD__WS_WT(BINSL_W, binsl.w) +DO_MSA__WD__WD_WT(BINSL_W__DDT, binsl.w) +DO_MSA__WD__WS_WD(BINSL_W__DSD, binsl.w) DO_MSA__WD__WS_WT(BINSL_D, binsl.d) +DO_MSA__WD__WD_WT(BINSL_D__DDT, binsl.d) +DO_MSA__WD__WS_WD(BINSL_D__DSD, binsl.d) =20 DO_MSA__WD__WS_WT(BINSR_B, binsr.b) +DO_MSA__WD__WD_WT(BINSR_B__DDT, binsr.b) +DO_MSA__WD__WS_WD(BINSR_B__DSD, binsr.b) DO_MSA__WD__WS_WT(BINSR_H, binsr.h) +DO_MSA__WD__WD_WT(BINSR_H__DDT, binsr.h) +DO_MSA__WD__WS_WD(BINSR_H__DSD, binsr.h) DO_MSA__WD__WS_WT(BINSR_W, binsr.w) +DO_MSA__WD__WD_WT(BINSR_W__DDT, binsr.w) +DO_MSA__WD__WS_WD(BINSR_W__DSD, binsr.w) DO_MSA__WD__WS_WT(BINSR_D, binsr.d) +DO_MSA__WD__WD_WT(BINSR_D__DDT, binsr.d) +DO_MSA__WD__WS_WD(BINSR_D__DSD, binsr.d) =20 DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) +DO_MSA__WD__WD_WT(BMNZ_V__DDT, bmnz.v) +DO_MSA__WD__WS_WD(BMNZ_V__DSD, bmnz.v) DO_MSA__WD__WS_WT(BMZ_V, bmz.v) +DO_MSA__WD__WD_WT(BMZ_V__DDT, bmz.v) +DO_MSA__WD__WS_WD(BMZ_V__DSD, bmz.v) DO_MSA__WD__WS_WT(BSEL_V, bsel.v) +DO_MSA__WD__WD_WT(BSEL_V__DDT, bsel.v) +DO_MSA__WD__WS_WD(BSEL_V__DSD, bsel.v) =20 =20 /* diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_b.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_b.c new file mode 100644 index 0000000..4a34f69 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_b.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSL.B + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSL.B"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x9c71e7cc71675471ULL, 0x4767015ffe71c70cULL, }, /* 64 */ + { 0x8c6be7cc29675571ULL, 0x4767015ffe7ba70cULL, }, + { 0x8c6be7cc29625571ULL, 0x4b670b5efe7bb30cULL, }, + { 0x8c6ae7cc29625541ULL, 0x4b670b5efe7bb30cULL, }, + { 0x8caa01642982c541ULL, 0x1bf7bb1a143b33fcULL, }, + { 0xfcbe01644d92c741ULL, 0x1bf7bb1a143f53fcULL, }, + { 0xfcbe01644d93c741ULL, 0x12f7bb1a143f53fcULL, }, + { 0xfcbe01604d93c709ULL, 0x12f7bb1a143f53fcULL, }, + { 0xfc5eafa8cdd38b89ULL, 0x22d8cbfeaa2f5314ULL, }, /* 72 */ + { 0xac5aafa8b9c38b89ULL, 0x22d8cbfeaa2b3314ULL, }, + { 0xac5aafa8b9cf8b89ULL, 0x27d8c7ffaa2b2714ULL, }, + { 0xac5aafa8b9cf8b81ULL, 0x27d8c7ffaa2b2714ULL, }, + { 0x2c5a1748392fe301ULL, 0x87f187d9a84ba7a4ULL, }, + { 0x7c4e17485d3fe201ULL, 0x87f187d9a842e7a4ULL, }, + { 0x744e17485d31e201ULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, /* 80 */ + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, /* 88 */ + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x744f174c5f31e24fULL, 0x8df189d8a842e3a4ULL, }, + { 0x8c6ae6cc28714240ULL, 0x49710958a862b30cULL, }, /* 96 */ + { 0x8c6ae6cc28714240ULL, 0x49710958a862b30cULL, }, + { 0x8c6ae6cc28714240ULL, 0x49710958a862b30cULL, }, + { 0x8c6ae6cc28714240ULL, 0x49710958a862b30cULL, }, + { 0xfcaa006428b1c240ULL, 0x09f18958282253fcULL, }, + { 0xfcaa006428b1c240ULL, 0x09f18958282253fcULL, }, + { 0xfcaa006428b1c240ULL, 0x09f18958282253fcULL, }, + { 0xfcaa006428b1c240ULL, 0x09f18958282253fcULL, }, + { 0xac4a80aca8f182c0ULL, 0x09f1c9d8a8222314ULL, }, /* 104 */ + { 0xac4a80aca8f182c0ULL, 0x09f1c9d8a8222314ULL, }, + { 0xac4a80aca8f182c0ULL, 0x09f1c9d8a8222314ULL, }, + { 0xac4a80aca8f182c0ULL, 0x09f1c9d8a8222314ULL, }, + { 0x744a004c2831e240ULL, 0x89f189d8a842e3a4ULL, }, + { 0x744a004c2831e240ULL, 0x89f189d8a842e3a4ULL, }, + { 0x744a004c2831e240ULL, 0x89f189d8a842e3a4ULL, }, + { 0x744a004c2831e240ULL, 0x89f189d8a842e3a4ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_B(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_B(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_B__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_B__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_d.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_d.c new file mode 100644 index 0000000..0fc44fa --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSL.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSL.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x9c71c71c71c71c71ULL, 0x4b6471c71c71c71cULL, }, /* 64 */ + { 0x8871c71c71c71c71ULL, 0x4b670b5efe7bb00cULL, }, + { 0x8871c71c71c71c71ULL, 0x4b670b5efe7bb00cULL, }, + { 0x886bc71c71c71c71ULL, 0x4b670b5efe7bb00cULL, }, + { 0x886bc71c71c71c71ULL, 0x12f70b5efe7bb00cULL, }, + { 0xfbebc71c71c71c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbebc71c71c71c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbbfc71c71c71c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbbfc71c71c71c71ULL, 0x27dfbb1a153f52fcULL, }, /* 72 */ + { 0xac3fc71c71c71c71ULL, 0x27d8c6ffab2b2514ULL, }, + { 0xac3fc71c71c71c71ULL, 0x27d8c6ffab2b2514ULL, }, + { 0xac5bc71c71c71c71ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x2c5bc71c71c71c71ULL, 0x8df0c6ffab2b2514ULL, }, + { 0x705bc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x705bc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, /* 80 */ + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, /* 88 */ + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704fc71c71c71c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b5ef942e2a4ULL, }, /* 96 */ + { 0x886ae6cc28625c71ULL, 0x4b670b5ef942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b5ef942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b5ef942e2a4ULL, }, + { 0xfbbe00634d93dc71ULL, 0x12f7bb1a1142e2a4ULL, }, + { 0xfbbe00634d93dc71ULL, 0x12f7bb1a1142e2a4ULL, }, + { 0xfbbe00634d93dc71ULL, 0x12f7bb1a1142e2a4ULL, }, + { 0xfbbe00634d93dc71ULL, 0x12f7bb1a1142e2a4ULL, }, + { 0xac5aaeaab9cf9c71ULL, 0x27d8c6ffa942e2a4ULL, }, /* 104 */ + { 0xac5aaeaab9cf9c71ULL, 0x27d8c6ffa942e2a4ULL, }, + { 0xac5aaeaab9cf9c71ULL, 0x27d8c6ffa942e2a4ULL, }, + { 0xac5aaeaab9cf9c71ULL, 0x27d8c6ffa942e2a4ULL, }, + { 0x704f164d5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704f164d5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704f164d5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704f164d5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_h.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_h.c new file mode 100644 index 0000000..cc2db04 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSL.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSL.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x8871e6cc31c71c71ULL, 0x4b1c0b5ffe71b00cULL, }, /* 64 */ + { 0x886be6cc21c75571ULL, 0x4b1c0b5ffe7bb00cULL, }, + { 0x886be6cc28625571ULL, 0x4b1c0b5efe7bb00cULL, }, + { 0x886ae6cc28625541ULL, 0x4b1c0b5efe7bb00cULL, }, + { 0xfbaa00644862d541ULL, 0x121cbb1a153b52fcULL, }, + { 0xfbbe00644862c741ULL, 0x121cbb1a153f52fcULL, }, + { 0xfbbe00644d93c741ULL, 0x129cbb1a153f52fcULL, }, + { 0xfbbe00604d93c709ULL, 0x129cbb1a153f52fcULL, }, + { 0xac5eaea8ad93c709ULL, 0x279cc6feab2f2514ULL, }, /* 72 */ + { 0xac5aaea8bd938b89ULL, 0x279cc6feab2b2514ULL, }, + { 0xac5aaea8b9cf8b89ULL, 0x279cc6ffab2b2514ULL, }, + { 0xac5aaea8b9cf8b81ULL, 0x279cc6ffab2b2514ULL, }, + { 0x705a164859cf8b81ULL, 0x8d9c88d9a94be2a4ULL, }, + { 0x704e164859cfe201ULL, 0x8d9c88d9a942e2a4ULL, }, + { 0x704e16485e31e201ULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, /* 80 */ + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, /* 88 */ + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x704f164c5e31e24fULL, 0x8d9c88d8a942e2a4ULL, }, + { 0x886ae6cc1e315540ULL, 0x4b640b58e942b2a4ULL, }, /* 96 */ + { 0x886ae6cc1e315540ULL, 0x4b640b58e942b2a4ULL, }, + { 0x886ae6cc1e315540ULL, 0x4b640b58e942b2a4ULL, }, + { 0x886ae6cc1e315540ULL, 0x4b640b58e942b2a4ULL, }, + { 0xfbaa00645e31d540ULL, 0x1364bb58094252a4ULL, }, + { 0xfbaa00645e31d540ULL, 0x1364bb58094252a4ULL, }, + { 0xfbaa00645e31d540ULL, 0x1364bb58094252a4ULL, }, + { 0xfbaa00645e31d540ULL, 0x1364bb58094252a4ULL, }, + { 0xac4aa8649e31d540ULL, 0x2364c6d8a94222a4ULL, }, /* 104 */ + { 0xac4aa8649e31d540ULL, 0x2364c6d8a94222a4ULL, }, + { 0xac4aa8649e31d540ULL, 0x2364c6d8a94222a4ULL, }, + { 0xac4aa8649e31d540ULL, 0x2364c6d8a94222a4ULL, }, + { 0x704a10645e31d540ULL, 0x8b6488d8a942e2a4ULL, }, + { 0x704a10645e31d540ULL, 0x8b6488d8a942e2a4ULL, }, + { 0x704a10645e31d540ULL, 0x8b6488d8a942e2a4ULL, }, + { 0x704a10645e31d540ULL, 0x8b6488d8a942e2a4ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_w.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_w.c new file mode 100644 index 0000000..21d6eec --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsl_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSL.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSL.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x8869c71c71c71c71ULL, 0x4b670b5ffe79c71cULL, }, /* 64 */ + { 0x8869c71c28471c71ULL, 0x4b670b5ffe7bb00cULL, }, + { 0x8869c71c28471c71ULL, 0x4b670b5efe7bb00cULL, }, + { 0x8869c71c28631c71ULL, 0x4b670b5efe7bb00cULL, }, + { 0xfbb9c71c28631c71ULL, 0x12f7bb1a153bb00cULL, }, + { 0xfbb9c71c4de31c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbb9c71c4de31c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbbdc71c4d931c71ULL, 0x12f7bb1a153f52fcULL, }, + { 0xac5dc71ccd931c71ULL, 0x27d8c6feab2f52fcULL, }, /* 72 */ + { 0xac5dc71cb9931c71ULL, 0x27d8c6feab2b2514ULL, }, + { 0xac5dc71cb9931c71ULL, 0x27d8c6ffab2b2514ULL, }, + { 0xac59c71cb9cf1c71ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x7049c71c39cf1c71ULL, 0x8df188d9a9432514ULL, }, + { 0x7049c71c5e4f1c71ULL, 0x8df188d9a942e2a4ULL, }, + { 0x7049c71c5e4f1c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, /* 80 */ + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, /* 88 */ + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704dc71c5e311c71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b58f942e2a4ULL, }, /* 96 */ + { 0x886ae6cc28625c71ULL, 0x4b670b58f942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b58f942e2a4ULL, }, + { 0x886ae6cc28625c71ULL, 0x4b670b58f942e2a4ULL, }, + { 0xfbbae6cc4d93dc71ULL, 0x12f7bb581142e2a4ULL, }, + { 0xfbbae6cc4d93dc71ULL, 0x12f7bb581142e2a4ULL, }, + { 0xfbbae6cc4d93dc71ULL, 0x12f7bb581142e2a4ULL, }, + { 0xfbbae6cc4d93dc71ULL, 0x12f7bb581142e2a4ULL, }, + { 0xac5ae6ccb9cf9c71ULL, 0x27d8c6d8a942e2a4ULL, }, /* 104 */ + { 0xac5ae6ccb9cf9c71ULL, 0x27d8c6d8a942e2a4ULL, }, + { 0xac5ae6ccb9cf9c71ULL, 0x27d8c6d8a942e2a4ULL, }, + { 0xac5ae6ccb9cf9c71ULL, 0x27d8c6d8a942e2a4ULL, }, + { 0x704ae6cc5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704ae6cc5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704ae6cc5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + { 0x704ae6cc5e31dc71ULL, 0x8df188d8a942e2a4ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSL_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_b.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_b.c new file mode 100644 index 0000000..b1927c5 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_b.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSR.B + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSR.B"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c72e60c70c21570ULL, 0xcb677bde7e7bc60cULL, }, /* 64 */ + { 0x186ae60c68c25570ULL, 0xcb677bde7e7bc00cULL, }, + { 0x086ae60c68625570ULL, 0x4b670b5e7e7bf00cULL, }, + { 0x086ae60c28625540ULL, 0x4b670b5e7e7bf00cULL, }, + { 0x096e800329634740ULL, 0x42f70b1a157ff01cULL, }, + { 0x0b3e80030d63c740ULL, 0x42f70b1a153ff21cULL, }, + { 0x1b3e80030d93c740ULL, 0x12f73b1a153fd21cULL, }, + { 0x1bbe80234d93c708ULL, 0x12f73b1a153fd21cULL, }, + { 0x1abaae2a4d97cb08ULL, 0x17d8367f2b3bd314ULL, }, /* 72 */ + { 0x1cdaae2a799f8b08ULL, 0x17d8367f2b2bd514ULL, }, + { 0x0cdaae2a79cf8b08ULL, 0x27d846ff2b2be514ULL, }, + { 0x0c5aae2a39cf8b00ULL, 0x27d846ff2b2be514ULL, }, + { 0x0c5f962d38c9a200ULL, 0x2df148d82922e400ULL, }, + { 0x004f962d1ec1e200ULL, 0x2df148d82942e200ULL, }, + { 0x104f962d1e31e200ULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, /* 80 */ + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, /* 88 */ + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x104f960d5e31e24eULL, 0x8df108d82942e200ULL, }, + { 0x106ae60c2832e540ULL, 0x8bf309d82a43e000ULL, }, /* 96 */ + { 0x106ae60c2832d540ULL, 0x8bf70bd82e4be000ULL, }, + { 0x106ae60c2832d540ULL, 0x8b670bd87e4be000ULL, }, + { 0x106ae60c2832d540ULL, 0x8b670bd87e4be000ULL, }, + { 0x116e80032933c740ULL, 0x82f70bd8154fe000ULL, }, + { 0x133e80032933c740ULL, 0x82f70bd8153fe000ULL, }, + { 0x1b3e80032933c740ULL, 0x82f70bd8153fe000ULL, }, + { 0x1b3e80032933c740ULL, 0x82f70bd8153fe000ULL, }, + { 0x1c5a800a293f8b40ULL, 0x87d806d92b2be100ULL, }, /* 104 */ + { 0x0c5a800a29cf8b40ULL, 0x27d846db2b2be100ULL, }, + { 0x0c5a800a29cf8b40ULL, 0x27d846df2b2be100ULL, }, + { 0x0c5a800a29cf8b40ULL, 0x27d846ff2b2be100ULL, }, + { 0x105f800d2a318240ULL, 0x8dd908d82922e200ULL, }, + { 0x104f800d2e318240ULL, 0x8dd908d82922e200ULL, }, + { 0x104f800d5e318240ULL, 0x8dd908d82922e200ULL, }, + { 0x104f800d5e318240ULL, 0x8dd908d82922e200ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_B(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_B(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_B__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_B__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_d.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_d.c new file mode 100644 index 0000000..6499415 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSR.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSR.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c70ULL, 0xc71c71c71c71d00cULL, }, /* 64 */ + { 0x1c71c71c71c71d40ULL, 0xcb670b5efe7bb00cULL, }, + { 0x1c71c71c71c71d40ULL, 0xcb670b5efe7bb00cULL, }, + { 0x1c71c71c71c75540ULL, 0xcb670b5efe7bb00cULL, }, + { 0x1c71c71c71c75540ULL, 0xcb670b5efe7bb2fcULL, }, + { 0x1c71c71c71c75508ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c75508ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c74708ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c74708ULL, 0xd2f7bb1a153f4514ULL, }, /* 72 */ + { 0x1c71c71c71c74780ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c74780ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c70b80ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c70b80ULL, 0xc7d8c6ffab2b22a0ULL, }, + { 0x1c71c71c71c70a4eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c70a4eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, /* 80 */ + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, /* 88 */ + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c7624eULL, 0xcdf188d8a942e2a0ULL, }, + { 0x1c71c71c71c75540ULL, 0xcdf188d8fe7bb00cULL, }, /* 96 */ + { 0x1c71c71c71c75540ULL, 0xcdf188d8fe7bb00cULL, }, + { 0x1c71c71c71c75540ULL, 0xcdf188d8fe7bb00cULL, }, + { 0x1c71c71c71c75540ULL, 0xcdf188d8fe7bb00cULL, }, + { 0x1c71c71c71c75540ULL, 0xcdf188d8fe7bb2fcULL, }, + { 0x1c71c71c71c75540ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c75540ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c75540ULL, 0xd2f7bb1a153f52fcULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6ffab2b2514ULL, }, /* 104 */ + { 0x1c71c71c71c75540ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6ffab2b2514ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6ffab22e2a0ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6fea942e2a0ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6fea942e2a0ULL, }, + { 0x1c71c71c71c75540ULL, 0xc7d8c6fea942e2a0ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_h.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_h.c new file mode 100644 index 0000000..2dc3dbe --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSR.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSR.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x186ac6cc71c21c70ULL, 0xc7670b5e1e7bd00cULL, }, /* 64 */ + { 0x086ac6cc71c21d40ULL, 0xc7670b5efe7bd00cULL, }, + { 0x086ac6cc28621d40ULL, 0xc7670b5efe7bd00cULL, }, + { 0x886ae6cc28625540ULL, 0xc7670b5efe7bd00cULL, }, + { 0x8bbee06328635540ULL, 0xc7f73b1af53fd2fcULL, }, + { 0xfbbee06328635508ULL, 0xc7f73b1a153fd2fcULL, }, + { 0xfbbee0634d935508ULL, 0xc6f7bb1a153fd2fcULL, }, + { 0xfbbec0634d934708ULL, 0xc6f7bb1a153fd2fcULL, }, + { 0xfc5aceaa4d974708ULL, 0xc6d8c6ff1b2bc514ULL, }, /* 72 */ + { 0xac5aceaa4d9f4780ULL, 0xc6d8c6ffab2bc514ULL, }, + { 0xac5aceaab9cf4780ULL, 0xc7d8c6ffab2bc514ULL, }, + { 0xac5aeeaab9cf0b80ULL, 0xc7d8c6ffab2bc514ULL, }, + { 0xa84ff64db9c90b80ULL, 0xc7f188d8a942c2a0ULL, }, + { 0xf04ff64db9c10a4eULL, 0xc7f188d8a942c2a0ULL, }, + { 0xf04ff64d5e310a4eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, /* 80 */ + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, /* 88 */ + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e31624eULL, 0xc7f188d8a942c2a0ULL, }, + { 0x886ae6cc5e325540ULL, 0xc7f3895ea943c2a0ULL, }, /* 96 */ + { 0x886ae6cc5e325540ULL, 0xc7f78b5ea94bc2a0ULL, }, + { 0x886ae6cc5e325540ULL, 0xc7678b5eae7bc2a0ULL, }, + { 0x886ae6cc5e325540ULL, 0xc7678b5eae7bc2a0ULL, }, + { 0x8bbee0635e335540ULL, 0xc7f7bb1aa53fc2a0ULL, }, + { 0xfbbee0635e335540ULL, 0xc7f7bb1a153fc2a0ULL, }, + { 0xfbbee0635e335540ULL, 0xc7f7bb1a153fc2a0ULL, }, + { 0xfbbee0635e335540ULL, 0xc7f7bb1a153fc2a0ULL, }, + { 0xac5ae06a5e3f5540ULL, 0xc7d8beffab2bc2a0ULL, }, /* 104 */ + { 0xac5ae6aab9cf5540ULL, 0xc7d8c6ffab2bc2a0ULL, }, + { 0xac5ae6aab9cf5540ULL, 0xc7d8c6ffab2bc2a0ULL, }, + { 0xac5ae6aab9cf5540ULL, 0xc7d8c6ffab2bc2a0ULL, }, + { 0xa84fe64d5e315540ULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e315540ULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e315540ULL, 0xc7f188d8a942c2a0ULL, }, + { 0x704fd64d5e315540ULL, 0xc7f188d8a942c2a0ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_w.c b/test= s/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_w.c new file mode 100644 index 0000000..5073187 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_binsr_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BINSR.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BINSR.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c6cc71c71c70ULL, 0xcb670b5e1c71d00cULL, }, /* 64 */ + { 0x1c71c6cc71c71d40ULL, 0xcb670b5e1e7bb00cULL, }, + { 0x1c71c6cc71c71d40ULL, 0x4b670b5e1e7bb00cULL, }, + { 0x1c71e6cc71c75540ULL, 0x4b670b5e1e7bb00cULL, }, + { 0x1c71e06371c75540ULL, 0x12f7bb1a1e7bb2fcULL, }, + { 0x1c71e06371c75508ULL, 0x12f7bb1a153f52fcULL, }, + { 0x1c71e06371c75508ULL, 0x12f7bb1a153f52fcULL, }, + { 0x1c71c06371c74708ULL, 0x12f7bb1a153f52fcULL, }, + { 0x1c71ceaa71c74708ULL, 0x27d8c6ff153f4514ULL, }, /* 72 */ + { 0x1c71ceaa71c74780ULL, 0x27d8c6ff0b2b2514ULL, }, + { 0x1c71ceaa71c74780ULL, 0x27d8c6ff0b2b2514ULL, }, + { 0x1c71eeaa71c70b80ULL, 0x27d8c6ff0b2b2514ULL, }, + { 0x1c71f64d71c70b80ULL, 0x0df188d80b2b22a0ULL, }, + { 0x1c71f64d71c70a4eULL, 0x0df188d80942e2a0ULL, }, + { 0x1c71f64d71c70a4eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, /* 80 */ + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, /* 88 */ + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c7624eULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71e6cc71c75540ULL, 0x8d670b5e0942e2a0ULL, }, /* 96 */ + { 0x1c71e6cc71c75540ULL, 0xcb670b5e0942e2a0ULL, }, + { 0x1c71e6cc71c75540ULL, 0xcb670b5e0942e2a0ULL, }, + { 0x1c71e6cc71c75540ULL, 0xcb670b5e0942e2a0ULL, }, + { 0x1c71e06371c75540ULL, 0x92f7bb1a0942e2a0ULL, }, + { 0x1c71e06371c75540ULL, 0x92f7bb1a0942e2a0ULL, }, + { 0x1c71e06371c75540ULL, 0x92f7bb1a0942e2a0ULL, }, + { 0x1c71e06371c75540ULL, 0x92f7bb1a0942e2a0ULL, }, + { 0x1c71e06a71c75540ULL, 0x97d8c6ff0942e2a0ULL, }, /* 104 */ + { 0x1c71e6aa71c75540ULL, 0x27d8c6ff0942e2a0ULL, }, + { 0x1c71e6aa71c75540ULL, 0x27d8c6ff0942e2a0ULL, }, + { 0x1c71e6aa71c75540ULL, 0x27d8c6ff0942e2a0ULL, }, + { 0x1c71e64d71c75540ULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c75540ULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c75540ULL, 0x8df188d80942e2a0ULL, }, + { 0x1c71d64d71c75540ULL, 0x8df188d80942e2a0ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BINSR_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmnz_v.c b/tests= /tcg/mips/user/ase/msa/bit-move/test_msa_bmnz_v.c new file mode 100644 index 0000000..ba1c635 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmnz_v.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BMNZ.V + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BMNZ.V"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x9c7be7dc79e75d71ULL, 0xcf7f7bdffe7bf71cULL, }, /* 64 */ + { 0x8c6be7dc38665d71ULL, 0xcf6f4bdffe7bb50cULL, }, + { 0x886be7dc28625571ULL, 0xcb670b5efe7bb00cULL, }, + { 0x886ae7dc28625571ULL, 0x4b670b5efe7bb00cULL, }, + { 0x882a015008024531ULL, 0x02670b1a143b100cULL, }, + { 0xfbbe01734d93c739ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbbe01734d93c739ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbbe01734d93c739ULL, 0x12f7bb1a153f52fcULL, }, + { 0xfbdea7bb6dd38339ULL, 0x13d0b25eab2f62f4ULL, }, /* 72 */ + { 0xa85aa7ba29c38331ULL, 0x03d0825eab2b2014ULL, }, + { 0xac5aafbab9cf8bb1ULL, 0x27d8c6ffab2b2514ULL, }, + { 0xac5aafbab9cf8bb1ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x245a0f7e99adcaf1ULL, 0x2df9ccf9a942a510ULL, }, + { 0x744e0f5ddc3dcaf9ULL, 0x2df9ccf9a942e7a0ULL, }, + { 0x704e075d5c31c279ULL, 0x0df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, /* 80 */ + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, /* 88 */ + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x704f175d5e31e27fULL, 0x8df188d8a942e2a0ULL, }, + { 0x004a064c08204040ULL, 0x09610858a842a000ULL, }, /* 96 */ + { 0x004a064c08204040ULL, 0x09610858a842a000ULL, }, + { 0x004a064c08204040ULL, 0x09610858a842a000ULL, }, + { 0x004a064c08204040ULL, 0x09610858a842a000ULL, }, + { 0x000a004008004000ULL, 0x0061081800020000ULL, }, + { 0x000a004008004000ULL, 0x0061081800020000ULL, }, + { 0x000a004008004000ULL, 0x0061081800020000ULL, }, + { 0x000a004008004000ULL, 0x0061081800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, /* 104 */ + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BMNZ_V(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMNZ_V(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMNZ_V__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMNZ_V__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmz_v.c b/tests/= tcg/mips/user/ase/msa/bit-move/test_msa_bmz_v.c new file mode 100644 index 0000000..b38ddc2 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bmz_v.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BMZ.V + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BMZ.V"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 0 */ + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 16 */ + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 24 */ + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, /* 32 */ + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, /* 40 */ + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, /* 48 */ + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, /* 56 */ + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x0860c60c20421440ULL, 0x430401461c71800cULL, }, /* 64 */ + { 0x0860e68c20621440ULL, 0x4b040146fe71a00cULL, }, + { 0x0860e6cc20625440ULL, 0x4b270946fe71b00cULL, }, + { 0x8860e6cc20625540ULL, 0x4b270b46fe79b00cULL, }, + { 0xfbf4e6ef65f3d748ULL, 0x5bb7bb46ff7df2fcULL, }, + { 0xfbb400634593c708ULL, 0x12b7bb02153d52fcULL, }, + { 0xfbb400634593c708ULL, 0x12b7bb02153d52fcULL, }, + { 0xfbb400634593c708ULL, 0x12b7bb02153d52fcULL, }, + { 0xac300862918fcf80ULL, 0x26bfcfa31539151cULL, }, /* 72 */ + { 0xac70aeeab1cfcf80ULL, 0x27bfcfe7bf39351cULL, }, + { 0xac50aeaab1cf8b80ULL, 0x2798c6e7ab292514ULL, }, + { 0xac50aeaab1cf8b80ULL, 0x2798c6e7ab292514ULL, }, + { 0xf845b6897653a30eULL, 0x879082c6ab2962a4ULL, }, + { 0xf845160d5633a34eULL, 0x8f9082c2a969e2a4ULL, }, + { 0xf845164d5633e34eULL, 0x8fb18ac2a969e2a4ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, /* 80 */ + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, /* 88 */ + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0x7045164d5631e24eULL, 0x8db188c0a940e2a0ULL, }, + { 0xf86ff6cd7e73f74eULL, 0xcff78bdeff7bf2acULL, }, /* 96 */ + { 0xf86ff6cd7e73f74eULL, 0xcff78bdeff7bf2acULL, }, + { 0xf86ff6cd7e73f74eULL, 0xcff78bdeff7bf2acULL, }, + { 0xf86ff6cd7e73f74eULL, 0xcff78bdeff7bf2acULL, }, + { 0xfbfff6ef7ff3f74eULL, 0xdff7bbdeff7ff2fcULL, }, + { 0xfbfff6ef7ff3f74eULL, 0xdff7bbdeff7ff2fcULL, }, + { 0xfbfff6ef7ff3f74eULL, 0xdff7bbdeff7ff2fcULL, }, + { 0xfbfff6ef7ff3f74eULL, 0xdff7bbdeff7ff2fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, /* 104 */ + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BMZ_V(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMZ_V(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMZ_V__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BMZ_V__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bsel_v.c b/tests= /tcg/mips/user/ase/msa/bit-move/test_msa_bsel_v.c new file mode 100644 index 0000000..062e5a2 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/bit-move/test_msa_bsel_v.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction BSEL.V + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Bit Move"; + char *instruction_name =3D "BSEL.V"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xeeeeeeeeeeeeeeeeULL, 0xeeeeeeeeeeeeeeeeULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xefcefcefcefcefceULL, 0xfcefcefcefcefcefULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 8 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, /* 16 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x2222222222222222ULL, 0x2222222222222222ULL, }, + { 0xaa8aa8aa8aa8aa8aULL, 0xa8aa8aa8aa8aa8aaULL, }, + { 0x0820820820820820ULL, 0x8208208208208208ULL, }, + { 0x5d75d75d75d75d75ULL, 0xd75d75d75d75d75dULL, }, /* 24 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0x4444444444444444ULL, 0x4444444444444444ULL, }, + { 0x1111111111111111ULL, 0x1111111111111111ULL, }, + { 0x4544544544544544ULL, 0x5445445445445445ULL, }, + { 0x1451451451451451ULL, 0x4514514514514514ULL, }, + { 0xdcddcddcddcddcddULL, 0xcddcddcddcddcddcULL, }, /* 32 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x4444444444444444ULL, 0x4444444444444444ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x0c40c40c40c40c40ULL, 0xc40c40c40c40c40cULL, }, + { 0x3f73f73f73f73f73ULL, 0xf73f73f73f73f73fULL, }, /* 40 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x1111111111111111ULL, 0x1111111111111111ULL, }, + { 0x2222222222222222ULL, 0x2222222222222222ULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0x2302302302302302ULL, 0x3023023023023023ULL, }, + { 0x1031031031031031ULL, 0x0310310310310310ULL, }, + { 0xf3bf3bf3bf3bf3bfULL, 0x3bf3bf3bf3bf3bf3ULL, }, /* 48 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x4104104104104104ULL, 0x1041041041041041ULL, }, + { 0xe28e28e28e28e28eULL, 0x28e28e28e28e28e2ULL, }, + { 0x2302302302302302ULL, 0x3023023023023023ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, /* 56 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x1451451451451451ULL, 0x4514514514514514ULL, }, + { 0x0c60c60c60c60c60ULL, 0xc60c60c60c60c60cULL, }, + { 0x1031031031031031ULL, 0x0310310310310310ULL, }, + { 0x0c40c40c40c40c40ULL, 0xc40c40c40c40c40cULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */ + { 0x882a004008024500ULL, 0x02670b1a143b100cULL, }, + { 0x884ae68c28621140ULL, 0x4b40025eea6ba004ULL, }, + { 0x006a064c08204440ULL, 0x09670958bc52b008ULL, }, + { 0xfbfe066f4db3c748ULL, 0x1bf7bb5abd7ff2fcULL, }, + { 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, }, + { 0xa81a002209838300ULL, 0x02d0821a012b0014ULL, }, + { 0x73ae00414c11c608ULL, 0x10f7b918151652e8ULL, }, + { 0x8c7aaeeab9ce4d80ULL, 0x276f4fffbe3b351cULL, }, /* 72 */ + { 0xa83a00620983c700ULL, 0x02f78b1a153b101cULL, }, + { 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x204a060818018200ULL, 0x05d080d8a9022000ULL, }, + { 0x504f164d4e30604eULL, 0x89610858a842e2a0ULL, }, + { 0x700e00415c11c208ULL, 0x04f18898010242a0ULL, }, + { 0x204b160c1a21a246ULL, 0x8dd080d8a942a000ULL, }, + { 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, }, + { 0x004a064c08204040ULL, 0x09610858a842a000ULL, }, /* 80 */ + { 0x000a004008004000ULL, 0x0061081800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, /* 88 */ + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x000a000008000000ULL, 0x0040001800020000ULL, }, + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 96 */ + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, + { 0xfbfee6ef6df3d748ULL, 0x5bf7bb5eff7ff2fcULL, }, + { 0xfbfee6ef6df3d748ULL, 0x5bf7bb5eff7ff2fcULL, }, + { 0xfbfee6ef6df3d748ULL, 0x5bf7bb5eff7ff2fcULL, }, + { 0xfbfee6ef6df3d748ULL, 0x5bf7bb5eff7ff2fcULL, }, + { 0xfffeeeeffdffdfc8ULL, 0x7fffffffff7ff7fcULL, }, /* 104 */ + { 0xfffeeeeffdffdfc8ULL, 0x7fffffffff7ff7fcULL, }, + { 0xfffeeeeffdffdfc8ULL, 0x7fffffffff7ff7fcULL, }, + { 0xfffeeeeffdffdfc8ULL, 0x7fffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + { 0xfffffeefffffffceULL, 0xffffffffff7ff7fcULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_BSEL_V(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BSEL_V(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BSEL_V__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_BSEL_V__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh b/tests/tcg/mi= ps/user/ase/msa/test_msa_compile.sh index 2a39d89..37a4fdc 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile.sh @@ -32,6 +32,28 @@ # Bit move # -------- # +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_b.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_b +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_h +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_w +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_d +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_b.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_b +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_h +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_w +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_d +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmnz_v.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmnz_v +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmz_v.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmz_v +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bsel_v.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bsel_v =20 # # Bit Set diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run.sh b/tests/tcg/mips/u= ser/ase/msa/test_msa_run.sh index 278d93b..6c244a2 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_run.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_run.sh @@ -22,6 +22,17 @@ $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d # Bit move # -------- # +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v =20 # # Bit Set --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550860; cv=none; d=zoho.com; s=zohoarc; b=Dz7NyA3VANbIkjl7AFZmNA4VM2jCRRqt/5D/4OB/5eTBAwJgHAoslz4P7Isd2hJGxiT+tJ8g2qclsLTrLMv51mcMQb38/tl3cruQTnEDBYUMzDvtM5JsNWzAPQdcPqm4ZwnKY+iaP1QtU5Z61aZrsqt9qkUuP+xG73Srt7wAmlI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; 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eggs.gnu.org ([2001:470:142:3::10]:43700) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6NI-0001Lt-IS for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NF-0005xB-SM for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:04 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60773 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NF-0005tt-F3 for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:01 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 1D6881A4651; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id EDE281A2276; Wed, 26 Jun 2019 13:45:56 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:44 +0200 Message-Id: <1561549550-3501-12-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 11/17] tests/tcg: target/mips: Add tests for MSA move instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add tests for MSA move instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-3-git-send-email-aleksandar.markovic@rt-rk.co= m> --- tests/tcg/mips/include/wrappers_msa.h | 8 ++ tests/tcg/mips/user/ase/msa/move/test_msa_move_v.c | 149 +++++++++++++++++= ++++ tests/tcg/mips/user/ase/msa/test_msa_compile.sh | 7 + tests/tcg/mips/user/ase/msa/test_msa_run.sh | 6 + 4 files changed, 170 insertions(+) create mode 100644 tests/tcg/mips/user/ase/msa/move/test_msa_move_v.c diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index 17fd277..2692394 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -574,6 +574,14 @@ DO_MSA__WD__WS_WT(XOR_V, xor.v) =20 =20 /* + * Move + * ---- + */ + +DO_MSA__WD__WS(MOVE_V, move.v) + + +/* * Pack * ---- */ diff --git a/tests/tcg/mips/user/ase/msa/move/test_msa_move_v.c b/tests/tcg= /mips/user/ase/msa/move/test_msa_move_v.c new file mode 100644 index 0000000..ef2aa6d --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/move/test_msa_move_v.c @@ -0,0 +1,149 @@ +/* + * Test program for MSA instruction MOVE.V + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_COUNT + RANDOM_INPUTS_COUNT) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Move"; + char *instruction_name =3D "MOVE.V"; + int32_t ret; + uint32_t i; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xffffffffffffffffULL, 0xffffffffffffffffULL, }, /* 0 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xaaaaaaaaaaaaaaaaULL, 0xaaaaaaaaaaaaaaaaULL, }, + { 0x5555555555555555ULL, 0x5555555555555555ULL, }, + { 0xccccccccccccccccULL, 0xccccccccccccccccULL, }, + { 0x3333333333333333ULL, 0x3333333333333333ULL, }, + { 0xe38e38e38e38e38eULL, 0x38e38e38e38e38e3ULL, }, + { 0x1c71c71c71c71c71ULL, 0xc71c71c71c71c71cULL, }, + { 0xf0f0f0f0f0f0f0f0ULL, 0xf0f0f0f0f0f0f0f0ULL, }, /* 8 */ + { 0x0f0f0f0f0f0f0f0fULL, 0x0f0f0f0f0f0f0f0fULL, }, + { 0xf83e0f83e0f83e0fULL, 0x83e0f83e0f83e0f8ULL, }, + { 0x07c1f07c1f07c1f0ULL, 0x7c1f07c1f07c1f07ULL, }, + { 0xfc0fc0fc0fc0fc0fULL, 0xc0fc0fc0fc0fc0fcULL, }, + { 0x03f03f03f03f03f0ULL, 0x3f03f03f03f03f03ULL, }, + { 0xfe03f80fe03f80feULL, 0x03f80fe03f80fe03ULL, }, + { 0x01fc07f01fc07f01ULL, 0xfc07f01fc07f01fcULL, }, + { 0xff00ff00ff00ff00ULL, 0xff00ff00ff00ff00ULL, }, /* 16 */ + { 0x00ff00ff00ff00ffULL, 0x00ff00ff00ff00ffULL, }, + { 0xff803fe00ff803feULL, 0x00ff803fe00ff803ULL, }, + { 0x007fc01ff007fc01ULL, 0xff007fc01ff007fcULL, }, + { 0xffc00ffc00ffc00fULL, 0xfc00ffc00ffc00ffULL, }, + { 0x003ff003ff003ff0ULL, 0x03ff003ff003ff00ULL, }, + { 0xffe003ff800ffe00ULL, 0x3ff800ffe003ff80ULL, }, + { 0x001ffc007ff001ffULL, 0xc007ff001ffc007fULL, }, + { 0xfff000fff000fff0ULL, 0x00fff000fff000ffULL, }, /* 24 */ + { 0x000fff000fff000fULL, 0xff000fff000fff00ULL, }, + { 0xfff8003ffe000fffULL, 0x8003ffe000fff800ULL, }, + { 0x0007ffc001fff000ULL, 0x7ffc001fff0007ffULL, }, + { 0xfffc000fffc000ffULL, 0xfc000fffc000fffcULL, }, + { 0x0003fff0003fff00ULL, 0x03fff0003fff0003ULL, }, + { 0xfffe0003fff8000fULL, 0xffe0003fff8000ffULL, }, + { 0x0001fffc0007fff0ULL, 0x001fffc0007fff00ULL, }, + { 0xffff0000ffff0000ULL, 0xffff0000ffff0000ULL, }, /* 32 */ + { 0x0000ffff0000ffffULL, 0x0000ffff0000ffffULL, }, + { 0xffff80003fffe000ULL, 0x0ffff80003fffe00ULL, }, + { 0x00007fffc0001fffULL, 0xf00007fffc0001ffULL, }, + { 0xffffc0000ffffc00ULL, 0x00ffffc0000ffffcULL, }, + { 0x00003ffff00003ffULL, 0xff00003ffff00003ULL, }, + { 0xffffe00003ffff80ULL, 0x000ffffe00003fffULL, }, + { 0x00001ffffc00007fULL, 0xfff00001ffffc000ULL, }, + { 0xfffff00000fffff0ULL, 0x0000fffff00000ffULL, }, /* 40 */ + { 0x00000fffff00000fULL, 0xffff00000fffff00ULL, }, + { 0xfffff800003ffffeULL, 0x00000fffff800003ULL, }, + { 0x000007ffffc00001ULL, 0xfffff000007ffffcULL, }, + { 0xfffffc00000fffffULL, 0xc00000fffffc0000ULL, }, + { 0x000003fffff00000ULL, 0x3fffff000003ffffULL, }, + { 0xfffffe000003ffffULL, 0xf800000fffffe000ULL, }, + { 0x000001fffffc0000ULL, 0x07fffff000001fffULL, }, + { 0xffffff000000ffffULL, 0xff000000ffffff00ULL, }, /* 48 */ + { 0x000000ffffff0000ULL, 0x00ffffff000000ffULL, }, + { 0xffffff8000003fffULL, 0xffe000000ffffff8ULL, }, + { 0x0000007fffffc000ULL, 0x001ffffff0000007ULL, }, + { 0xffffffc000000fffULL, 0xfffc000000ffffffULL, }, + { 0x0000003ffffff000ULL, 0x0003ffffff000000ULL, }, + { 0xffffffe0000003ffULL, 0xffff8000000fffffULL, }, + { 0x0000001ffffffc00ULL, 0x00007ffffff00000ULL, }, + { 0xfffffff0000000ffULL, 0xfffff0000000ffffULL, }, /* 56 */ + { 0x0000000fffffff00ULL, 0x00000fffffff0000ULL, }, + { 0xfffffff80000003fULL, 0xfffffe0000000fffULL, }, + { 0x00000007ffffffc0ULL, 0x000001fffffff000ULL, }, + { 0xfffffffc0000000fULL, 0xffffffc0000000ffULL, }, + { 0x00000003fffffff0ULL, 0x0000003fffffff00ULL, }, + { 0xfffffffe00000003ULL, 0xfffffff80000000fULL, }, + { 0x00000001fffffffcULL, 0x00000007fffffff0ULL, }, + { 0x886ae6cc28625540ULL, 0x4b670b5efe7bb00cULL, }, /* 64 */ + { 0xfbbe00634d93c708ULL, 0x12f7bb1a153f52fcULL, }, + { 0xac5aaeaab9cf8b80ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x704f164d5e31e24eULL, 0x8df188d8a942e2a0ULL, }, + { 0xb9926b7c7daf4258ULL, 0xa1227caddcce65b6ULL, }, + { 0xd027be89ff0a2ef9ULL, 0x170b5050fea53078ULL, }, + { 0xb83b580665cabc4aULL, 0x91230822bff0ba62ULL, }, + { 0xfc8f23f09aa6b782ULL, 0x93fd6637124275aeULL, }, + { 0x201e09cd56aee649ULL, 0xef5de039a6a52758ULL, }, /* 72 */ + { 0xa57cd91365d9e5d7ULL, 0x9321bc9881ecba5cULL, }, + { 0xa2e8f6f5c9cbc61bULL, 0xb2c471545e0d7a12ULL, }, + { 0xa89cf2f131a864aeULL, 0xd2a3e87a5db986e7ULL, }, + { 0xe61438e9a652ea0aULL, 0xa85483d97879d41cULL, }, + { 0x944a35fd192361a8ULL, 0xf3912da36a0b2d6bULL, }, + { 0x4630426322bef79cULL, 0xeb5686f7cb19304eULL, }, + { 0x8b5aa7a2f259deadULL, 0xd278cbcd696417e3ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < TEST_COUNT_TOTAL; i++) { + if (i < PATTERN_INPUTS_COUNT) { + do_msa_MOVE_V(b128_pattern[i], b128_result[i]); + } else { + do_msa_MOVE_V(b128_random[i - PATTERN_INPUTS_COUNT], + b128_result[i]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh b/tests/tcg/mi= ps/user/ase/msa/test_msa_compile.sh index 37a4fdc..8ef836d 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile.sh @@ -506,6 +506,13 @@ -EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_xor_v =20 # +# Move +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc move/test_msa_move_v.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_move_v + +# # Pack # ---- # diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run.sh b/tests/tcg/mips/u= ser/ase/msa/test_msa_run.sh index 6c244a2..b6785e3 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_run.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_run.sh @@ -295,6 +295,12 @@ $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v =20 # +# Move +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v + +# # Pack # ---- # --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Wed, 26 Jun 2019 07:46:02 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 52FFA1A46A6; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 05F301A4688; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:45 +0200 Message-Id: <1561549550-3501-13-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 12/17] tests/tcg: target/mips: Amend tests for MSA int dot product instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add tests for instructions whose result depends on the value in destination register (prior to instruction execution). Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-4-git-send-email-aleksandar.markovic@rt-rk.co= m> --- tests/tcg/mips/include/wrappers_msa.h | 40 ++++ .../ase/msa/int-dot-product/test_msa_dpadd_s_d.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpadd_s_h.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpadd_s_w.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpadd_u_d.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpadd_u_h.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpadd_u_w.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_s_d.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_s_h.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_s_w.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_u_d.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_u_h.c | 214 +++++++++++++++++= ++++ .../ase/msa/int-dot-product/test_msa_dpsub_u_w.c | 214 +++++++++++++++++= ++++ tests/tcg/mips/user/ase/msa/test_msa_compile.sh | 24 +++ tests/tcg/mips/user/ase/msa/test_msa_run.sh | 12 ++ 15 files changed, 2644 insertions(+) create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_s_d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_s_h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_s_w.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_u_d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_u_h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= add_u_w.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_s_d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_s_h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_s_w.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_u_d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_u_h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dp= sub_u_w.c diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index 2692394..cfb3b8b 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -413,6 +413,46 @@ DO_MSA__WD__WS_WT(DOTP_U_H, dotp_u.h) DO_MSA__WD__WS_WT(DOTP_U_W, dotp_u.w) DO_MSA__WD__WS_WT(DOTP_U_D, dotp_u.d) =20 +DO_MSA__WD__WS_WT(DPADD_S_H, dpadd_s.h) +DO_MSA__WD__WD_WT(DPADD_S_H__DDT, dpadd_s.h) +DO_MSA__WD__WS_WD(DPADD_S_H__DSD, dpadd_s.h) +DO_MSA__WD__WS_WT(DPADD_S_W, dpadd_s.w) +DO_MSA__WD__WD_WT(DPADD_S_W__DDT, dpadd_s.w) +DO_MSA__WD__WS_WD(DPADD_S_W__DSD, dpadd_s.w) +DO_MSA__WD__WS_WT(DPADD_S_D, dpadd_s.d) +DO_MSA__WD__WD_WT(DPADD_S_D__DDT, dpadd_s.d) +DO_MSA__WD__WS_WD(DPADD_S_D__DSD, dpadd_s.d) + +DO_MSA__WD__WS_WT(DPADD_U_H, dpadd_u.h) +DO_MSA__WD__WD_WT(DPADD_U_H__DDT, dpadd_u.h) +DO_MSA__WD__WS_WD(DPADD_U_H__DSD, dpadd_u.h) +DO_MSA__WD__WS_WT(DPADD_U_W, dpadd_u.w) +DO_MSA__WD__WD_WT(DPADD_U_W__DDT, dpadd_u.w) +DO_MSA__WD__WS_WD(DPADD_U_W__DSD, dpadd_u.w) +DO_MSA__WD__WS_WT(DPADD_U_D, dpadd_u.d) +DO_MSA__WD__WD_WT(DPADD_U_D__DDT, dpadd_u.d) +DO_MSA__WD__WS_WD(DPADD_U_D__DSD, dpadd_u.d) + +DO_MSA__WD__WS_WT(DPSUB_S_H, dpsub_s.h) +DO_MSA__WD__WD_WT(DPSUB_S_H__DDT, dpsub_s.h) +DO_MSA__WD__WS_WD(DPSUB_S_H__DSD, dpsub_s.h) +DO_MSA__WD__WS_WT(DPSUB_S_W, dpsub_s.w) +DO_MSA__WD__WD_WT(DPSUB_S_W__DDT, dpsub_s.w) +DO_MSA__WD__WS_WD(DPSUB_S_W__DSD, dpsub_s.w) +DO_MSA__WD__WS_WT(DPSUB_S_D, dpsub_s.d) +DO_MSA__WD__WD_WT(DPSUB_S_D__DDT, dpsub_s.d) +DO_MSA__WD__WS_WD(DPSUB_S_D__DSD, dpsub_s.d) + +DO_MSA__WD__WS_WT(DPSUB_U_H, dpsub_u.h) +DO_MSA__WD__WD_WT(DPSUB_U_H__DDT, dpsub_u.h) +DO_MSA__WD__WS_WD(DPSUB_U_H__DSD, dpsub_u.h) +DO_MSA__WD__WS_WT(DPSUB_U_W, dpsub_u.w) +DO_MSA__WD__WD_WT(DPSUB_U_W__DDT, dpsub_u.w) +DO_MSA__WD__WS_WD(DPSUB_U_W__DSD, dpsub_u.w) +DO_MSA__WD__WS_WT(DPSUB_U_D, dpsub_u.d) +DO_MSA__WD__WD_WT(DPSUB_U_D__DDT, dpsub_u.d) +DO_MSA__WD__WS_WD(DPSUB_U_D__DSD, dpsub_u.d) + =20 /* * Int Max Min diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_d= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_d.c new file mode 100644 index 0000000..d039e1a --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_S.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_S.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_h= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_h.c new file mode 100644 index 0000000..bcaafe3 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_S.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_S.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0002000200020002ULL, 0x0002000200020002ULL, }, /* 0 */ + { 0x0002000200020002ULL, 0x0002000200020002ULL, }, + { 0x00ae00ae00ae00aeULL, 0x00ae00ae00ae00aeULL, }, + { 0x0004000400040004ULL, 0x0004000400040004ULL, }, + { 0x006c006c006c006cULL, 0x006c006c006c006cULL, }, + { 0x0006000600060006ULL, 0x0006000600060006ULL, }, + { 0x0095ffeb00400095ULL, 0xffeb00400095ffebULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, /* 8 */ + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x0008000800080008ULL, 0x0008000800080008ULL, }, + { 0x00b400b400b400b4ULL, 0x00b400b400b400b4ULL, }, /* 16 */ + { 0x00b400b400b400b4ULL, 0x00b400b400b400b4ULL, }, + { 0x3a7c3a7c3a7c3a7cULL, 0x3a7c3a7c3a7c3a7cULL, }, + { 0x0160016001600160ULL, 0x0160016001600160ULL, }, + { 0x2450245024502450ULL, 0x2450245024502450ULL, }, + { 0x020c020c020c020cULL, 0x020c020c020c020cULL, }, + { 0x3216f8fa15883216ULL, 0xf8fa15883216f8faULL, }, + { 0x02b802b802b802b8ULL, 0x02b802b802b802b8ULL, }, + { 0x020e020e020e020eULL, 0x020e020e020e020eULL, }, /* 24 */ + { 0x020e020e020e020eULL, 0x020e020e020e020eULL, }, + { 0xc8f2c8f2c8f2c8f2ULL, 0xc8f2c8f2c8f2c8f2ULL, }, + { 0x0164016401640164ULL, 0x0164016401640164ULL, }, + { 0xdedcdedcdedcdedcULL, 0xdedcdedcdedcdedcULL, }, + { 0x00ba00ba00ba00baULL, 0x00ba00ba00ba00baULL, }, + { 0xd13f09b1ed78d13fULL, 0x09b1ed78d13f09b1ULL, }, + { 0x0010001000100010ULL, 0x0010001000100010ULL, }, + { 0x0078007800780078ULL, 0x0078007800780078ULL, }, /* 32 */ + { 0x0078007800780078ULL, 0x0078007800780078ULL, }, + { 0x2368236823682368ULL, 0x2368236823682368ULL, }, + { 0x00e000e000e000e0ULL, 0x00e000e000e000e0ULL, }, + { 0x1600160016001600ULL, 0x1600160016001600ULL, }, + { 0x0148014801480148ULL, 0x0148014801480148ULL, }, + { 0x1e54fbcc0d101e54ULL, 0xfbcc0d101e54fbccULL, }, + { 0x01b001b001b001b0ULL, 0x01b001b001b001b0ULL, }, + { 0x014a014a014a014aULL, 0x014a014a014a014aULL, }, /* 40 */ + { 0x014a014a014a014aULL, 0x014a014a014a014aULL, }, + { 0xdf06df06df06df06ULL, 0xdf06df06df06df06ULL, }, + { 0x00e400e400e400e4ULL, 0x00e400e400e400e4ULL, }, + { 0xec2cec2cec2cec2cULL, 0xec2cec2cec2cec2cULL, }, + { 0x007e007e007e007eULL, 0x007e007e007e007eULL, }, + { 0xe40105dff4f0e401ULL, 0x05dff4f0e40105dfULL, }, + { 0x0018001800180018ULL, 0x0018001800180018ULL, }, + { 0x00a7fffd005200a7ULL, 0xfffd005200a7fffdULL, }, /* 48 */ + { 0x00a7fffd005200a7ULL, 0xfffd005200a7fffdULL, }, + { 0x30b1f6eb13ce30b1ULL, 0xf6eb13ce30b1f6ebULL, }, + { 0x0136ffe2008c0136ULL, 0xffe2008c0136ffe2ULL, }, + { 0x1e42fa660c541e42ULL, 0xfa660c541e42fa66ULL, }, + { 0x01c5ffc700c601c5ULL, 0xffc700c601c5ffc7ULL, }, + { 0x37d20f503fca37d2ULL, 0x0f503fca37d20f50ULL, }, + { 0x0254ffac01000254ULL, 0xffac01000254ffacULL, }, + { 0x01c7ffc900c801c7ULL, 0xffc900c801c7ffc9ULL, }, /* 56 */ + { 0x01c7ffc900c801c7ULL, 0xffc900c801c7ffc9ULL, }, + { 0xd2690987edf8d269ULL, 0x0987edf8d2690987ULL, }, + { 0x013affe60090013aULL, 0xffe60090013affe6ULL, }, + { 0xe49605caf530e496ULL, 0x05caf530e49605caULL, }, + { 0x00ad0003005800adULL, 0x0003005800ad0003ULL, }, + { 0xcb2ff05fc18ecb2fULL, 0xf05fc18ecb2ff05fULL, }, + { 0x0020002000200020ULL, 0x0020002000200020ULL, }, + { 0x64440d542be42c59ULL, 0x3f8a231d3b3d19b0ULL, }, /* 64 */ + { 0x4b48f9380e321b6cULL, 0x413129b25958ffe0ULL, }, + { 0x97ec1304f058d493ULL, 0x3c8626d66eabf540ULL, }, + { 0x8422012411cade1dULL, 0x14cc12fe8f0ffa20ULL, }, + { 0x6b26ed08f418cd30ULL, 0x16731993ad2ae050ULL, }, + { 0x7c43135139aada21ULL, 0x18082ed0be64faa4ULL, }, + { 0x66b3f20f392cf02eULL, 0x1c2e3e58c200062eULL, }, + { 0x50250fd64095f94cULL, 0x149f5aa0cb1bfe12ULL, }, + { 0x9cc929a222bbb273ULL, 0x0ff457c4e06ef372ULL, }, /* 72 */ + { 0x87390860223dc880ULL, 0x141a674ce40afefcULL, }, + { 0xc26d3f883f4f3df9ULL, 0x204b7471077c05e5ULL, }, + { 0xb9731e9e1bdc24afULL, 0x111e8fc92f75fa0fULL, }, + { 0xa5a90cbe3d4e2e39ULL, 0xe9647bf14fd9feefULL, }, + { 0x8f1b2a8544b73757ULL, 0xe1d5983958f4f6d3ULL, }, + { 0x8621099b21441e0dULL, 0xd2a8b39180edeafdULL, }, + { 0xcf8222a84d293955ULL, 0x0732f211af821281ULL, }, + { 0xb24e311468e36182ULL, 0x1d5df7b5739a06edULL, }, /* 80 */ + { 0x9fb838d0948447f9ULL, 0x1c22f28463ef0925ULL, }, + { 0xa63c3700ca342b06ULL, 0x1b16f62c40350d56ULL, }, + { 0x91603bbac05427d0ULL, 0x0dabf3fc381feb90ULL, }, + { 0xed2843f4d67c28c3ULL, 0xef47f1f54694ece0ULL, }, + { 0xe3373f50950e1df3ULL, 0xeb96f4e231bee6f8ULL, }, + { 0x00111042b00d1732ULL, 0xf8f3f7b81663e296ULL, }, + { 0x0550257c952a23bcULL, 0xfd4e0730286f0ddaULL, }, + { 0x2418088a94861e5bULL, 0x1bcf191d5d740802ULL, }, /* 88 */ + { 0x1d34dae8a7fc1a85ULL, 0x1f6e155281a10a8aULL, }, + { 0x25f8ef24c16f4c23ULL, 0x12f7103e9bd702c4ULL, }, + { 0x33b0f882bf8c4de5ULL, 0x0b68ff0eb3981908ULL, }, + { 0xfaa812ea88fc60b6ULL, 0x38790427823a1198ULL, }, + { 0x11760a6866984906ULL, 0x38280709862a18aaULL, }, + { 0x355ee4445e3624a9ULL, 0x3a70056ab5ba156aULL, }, + { 0x6990f6508b1005efULL, 0x19d2f282bd2beb34ULL, }, + { 0x09f8e7147ee80358ULL, 0x0ea3c3a4d25af434ULL, }, /* 96 */ + { 0x0270e58e89681a57ULL, 0xed529f3dfdf4fa64ULL, }, + { 0x2fe0ff749ea038b9ULL, 0x08bfb178f83600f4ULL, }, + { 0x0c98e7fe6a903991ULL, 0xf0f0da2312380064ULL, }, + { 0x272ce738ba222968ULL, 0xf060e7ef217afed4ULL, }, + { 0x1b11fce0969a2387ULL, 0xebe0ecf24235fee0ULL, }, + { 0x1628f080a22617f4ULL, 0xeb86f0ea54aafebcULL, }, + { 0x0b6abf0075b21275ULL, 0xee56f2fe4664ff28ULL, }, + { 0x2d12d3d2642dcfbbULL, 0xde28f62c3ff20223ULL, }, /* 104 */ + { 0x24a2f1b03fd408a0ULL, 0xd2baf84428ad0529ULL, }, + { 0xf7c6115e36c734f8ULL, 0xd6a8f9d00d740916ULL, }, + { 0xe656ec5832b62134ULL, 0xde02fb961c9f0c1bULL, }, + { 0xf580051836e82d2eULL, 0xed2a0e7efa190093ULL, }, + { 0xc9300cbe462435ecULL, 0xf33df43e02952973ULL, }, + { 0xbff0f9ec66bc299eULL, 0xf581f02ee651f985ULL, }, + { 0x9e90f34e7f2c06f4ULL, 0x01e3f07e04092877ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_w= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_w.c new file mode 100644 index 0000000..90562ab --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_s_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_S.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_S.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000200000002ULL, 0x0000000200000002ULL, }, /* 0 */ + { 0x0000000200000002ULL, 0x0000000200000002ULL, }, + { 0x0000aaae0000aaaeULL, 0x0000aaae0000aaaeULL, }, + { 0x0000000400000004ULL, 0x0000000400000004ULL, }, + { 0x0000666c0000666cULL, 0x0000666c0000666cULL, }, + { 0x0000000600000006ULL, 0x0000000600000006ULL, }, + { 0xffffe39500008e40ULL, 0x000038ebffffe395ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, /* 8 */ + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000000800000008ULL, 0x0000000800000008ULL, }, + { 0x0000aab40000aab4ULL, 0x0000aab40000aab4ULL, }, /* 16 */ + { 0x0000aab40000aab4ULL, 0x0000aab40000aab4ULL, }, + { 0x38e51c7c38e51c7cULL, 0x38e51c7c38e51c7cULL, }, + { 0x0001556000015560ULL, 0x0001556000015560ULL, }, + { 0x2224445022244450ULL, 0x2224445022244450ULL, }, + { 0x0002000c0002000cULL, 0x0002000c0002000cULL, }, + { 0xf686ed162f6b0988ULL, 0x12f925faf686ed16ULL, }, + { 0x0002aab80002aab8ULL, 0x0002aab80002aab8ULL, }, + { 0x0002000e0002000eULL, 0x0002000e0002000eULL, }, /* 24 */ + { 0x0002000e0002000eULL, 0x0002000e0002000eULL, }, + { 0xc71e38f2c71e38f2ULL, 0xc71e38f2c71e38f2ULL, }, + { 0x0001556400015564ULL, 0x0001556400015564ULL, }, + { 0xdddeccdcdddeccdcULL, 0xdddeccdcdddeccdcULL, }, + { 0x0000aaba0000aabaULL, 0x0000aaba0000aabaULL, }, + { 0x097ba13fd0982f78ULL, 0xed09bdb1097ba13fULL, }, + { 0x0000001000000010ULL, 0x0000001000000010ULL, }, + { 0x0000667800006678ULL, 0x0000667800006678ULL, }, /* 32 */ + { 0x0000667800006678ULL, 0x0000667800006678ULL, }, + { 0x2223556822235568ULL, 0x2223556822235568ULL, }, + { 0x0000cce00000cce0ULL, 0x0000cce00000cce0ULL, }, + { 0x147c5200147c5200ULL, 0x147c5200147c5200ULL, }, + { 0x0001334800013348ULL, 0x0001334800013348ULL, }, + { 0xfa50e9541c73a510ULL, 0x0b6260ccfa50e954ULL, }, + { 0x000199b0000199b0ULL, 0x000199b0000199b0ULL, }, + { 0x0001334a0001334aULL, 0x0001334a0001334aULL, }, /* 40 */ + { 0x0001334a0001334aULL, 0x0001334a0001334aULL, }, + { 0xdddeef06dddeef06ULL, 0xdddeef06dddeef06ULL, }, + { 0x0000cce40000cce4ULL, 0x0000cce40000cce4ULL, }, + { 0xeb85ae2ceb85ae2cULL, 0xeb85ae2ceb85ae2cULL, }, + { 0x0000667e0000667eULL, 0x0000667e0000667eULL, }, + { 0x05b09401e38e82f0ULL, 0xf49f71df05b09401ULL, }, + { 0x0000001800000018ULL, 0x0000001800000018ULL, }, + { 0xffffe3a700008e52ULL, 0x000038fdffffe3a7ULL, }, /* 48 */ + { 0xffffe3a700008e52ULL, 0x000038fdffffe3a7ULL, }, + { 0xf684d0b12f6997ceULL, 0x12f75eebf684d0b1ULL, }, + { 0xffffc73600011c8cULL, 0x000071e2ffffc736ULL, }, + { 0xfa4f7d421c738e54ULL, 0x0b619f66fa4f7d42ULL, }, + { 0xffffaac50001aac6ULL, 0x0000aac7ffffaac5ULL, }, + { 0x0fcce6d235bcf9caULL, 0x3f36f0500fcce6d2ULL, }, + { 0xffff8e5400023900ULL, 0x0000e3acffff8e54ULL, }, + { 0xffffaac70001aac8ULL, 0x0000aac9ffffaac7ULL, }, /* 56 */ + { 0xffffaac70001aac8ULL, 0x0000aac9ffffaac7ULL, }, + { 0x097b6869d0994bf8ULL, 0xed0a2f87097b6869ULL, }, + { 0xffffc73a00011c90ULL, 0x000071e6ffffc73aULL, }, + { 0x05b07796e38f1130ULL, 0xf49faaca05b07796ULL, }, + { 0xffffe3ad00008e58ULL, 0x00003903ffffe3adULL, }, + { 0xf0328b2fca45cd8eULL, 0xc0ca2c5ff0328b2fULL, }, + { 0x0000002000000020ULL, 0x0000002000000020ULL, }, + { 0x3a57fe9422c255a4ULL, 0x16b6ba1518facfc9ULL, }, /* 64 */ + { 0x3c4b6c241c0669eaULL, 0x193d8a02feefaadeULL, }, + { 0x6b6084e0ea284328ULL, 0x2271e08cf3dc0f77ULL, }, + { 0x34b7f0f2ef20736aULL, 0xfb8f1ed3fd8c7dadULL, }, + { 0x36ab5e82e86487b0ULL, 0xfe15eec0e38158c2ULL, }, + { 0x36bda5cf0c93ba59ULL, 0x120897b5002b2653ULL, }, + { 0x38025a59113b8b36ULL, 0x2453b4030525b498ULL, }, + { 0x362cc9c2346212c9ULL, 0x3bf2477af46d1b56ULL, }, + { 0x6541e27e0283ec07ULL, 0x45269e04e9597fefULL, }, /* 72 */ + { 0x66869708072bbce4ULL, 0x5771ba52ee540e34ULL, }, + { 0x9bb32f904f6ed245ULL, 0x6a56b2930fcf50fdULL, }, + { 0x6feae478431ee5e4ULL, 0x731e8c13284ca993ULL, }, + { 0x3942508a48171626ULL, 0x4c3bca5a31fd17c9ULL, }, + { 0x376cbff36b3d9db9ULL, 0x63da5dd121447e87ULL, }, + { 0x0ba474db5eedb158ULL, 0x6ca2375139c1d71dULL, }, + { 0x3edb00658507867dULL, 0xd6e9ca725a84f021ULL, }, + { 0x21746d8f492aab6bULL, 0xc86ec10d5ef05719ULL, }, /* 80 */ + { 0x21105bf47228d8e1ULL, 0xd541f981830d22c5ULL, }, + { 0xf90ba39c64a9aab9ULL, 0xd00d1cd8b17e0558ULL, }, + { 0xedf1ebed93975370ULL, 0xd7fd3855cb7afcd4ULL, }, + { 0xf85b68939e46773eULL, 0xceb49456ccc86662ULL, }, + { 0xf8a465f666205360ULL, 0xe8078ebee9b86012ULL, }, + { 0xdaa6e8fa242ed740ULL, 0xfd8488e8ff04a562ULL, }, + { 0xc84291663638bd8eULL, 0x360ea9ec09bfe9aaULL, }, + { 0xed300e0228a5c87eULL, 0x42280c3610aaee67ULL, }, /* 88 */ + { 0xed8592684150f62dULL, 0x43c5604a0c58a5a1ULL, }, + { 0x1661583a33e11b5dULL, 0x38e0b738fb2ab5fdULL, }, + { 0x27e2359b43cb17c4ULL, 0x4169f958054c48f1ULL, }, + { 0x0ff9c2b35666c87aULL, 0x546263e7ee7c57c1ULL, }, + { 0x0f9e0bba7cf02cdcULL, 0x3fbf94eb097a6841ULL, }, + { 0x06c9e6ca464484ecULL, 0x61838f28157007d3ULL, }, + { 0x0791b5936e65c7d8ULL, 0x6a978c3b0d46a893ULL, }, + { 0x0b5ca2c16d1c8082ULL, 0x84d8b2a628807419ULL, }, /* 96 */ + { 0x0f3c4ea553ddefbaULL, 0x5d23288204008ac5ULL, }, + { 0x006066f95bad42d4ULL, 0x7a5e585328976801ULL, }, + { 0xf610532580647c0eULL, 0xa2551d9f07de4a9aULL, }, + { 0xf65aca543e1e0beaULL, 0x936bdec820b433d4ULL, }, + { 0xf66f1d9c4e4a0274ULL, 0x945159553437f0d0ULL, }, + { 0xf6a34c5265777892ULL, 0x744c4f1e33a0fa19ULL, }, + { 0xf6e8ae026961c977ULL, 0x679ecf7e36000115ULL, }, + { 0x13ee44e6654e7066ULL, 0x828c7150244331b9ULL, }, /* 104 */ + { 0xf787434e16614d78ULL, 0x55caaa201f72a96eULL, }, + { 0xe4e9b290ecfd62e7ULL, 0x76440870087d3a2cULL, }, + { 0x065e2c1ac531b8faULL, 0x86cb35600e1a0d9bULL, }, + { 0x0d00c2eeb7cb8587ULL, 0xa3f3f27b07c3312fULL, }, + { 0x0d62db84ab6f1a84ULL, 0xd3421106ff7d27d5ULL, }, + { 0x10143b76893e48fbULL, 0xdf44d938fb177a2fULL, }, + { 0x1c4ff82055152453ULL, 0xffe7837ceebc407dULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_S_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_d= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_d.c new file mode 100644 index 0000000..106dc73 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_U.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_U.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfffffffc00000002ULL, 0xfffffffc00000002ULL, }, /* 0 */ + { 0xfffffffc00000002ULL, 0xfffffffc00000002ULL, }, + { 0x5555554eaaaaaaaeULL, 0x5555554eaaaaaaaeULL, }, + { 0xfffffff800000004ULL, 0xfffffff800000004ULL, }, + { 0x9999998e6666666cULL, 0x9999998e6666666cULL, }, + { 0xfffffff400000006ULL, 0xfffffff400000006ULL, }, + { 0x71c71c638e38e395ULL, 0x1c71c70de38e38ebULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, /* 8 */ + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0xfffffff000000008ULL, 0xfffffff000000008ULL, }, + { 0x55555542aaaaaab4ULL, 0x55555542aaaaaab4ULL, }, /* 16 */ + { 0x55555542aaaaaab4ULL, 0x55555542aaaaaab4ULL, }, + { 0x38e38e2471c71c7cULL, 0x38e38e2471c71c7cULL, }, + { 0xaaaaaa9555555560ULL, 0xaaaaaa9555555560ULL, }, + { 0xbbbbbba444444450ULL, 0xbbbbbba444444450ULL, }, + { 0xffffffe80000000cULL, 0xffffffe80000000cULL, }, + { 0xf684bd87b425ed16ULL, 0xbda12f4e97b425faULL, }, + { 0x5555553aaaaaaab8ULL, 0x5555553aaaaaaab8ULL, }, + { 0xffffffe40000000eULL, 0xffffffe40000000eULL, }, /* 24 */ + { 0xffffffe40000000eULL, 0xffffffe40000000eULL, }, + { 0x71c71c54e38e38f2ULL, 0x71c71c54e38e38f2ULL, }, + { 0xaaaaaa8d55555564ULL, 0xaaaaaa8d55555564ULL, }, + { 0x33333314ccccccdcULL, 0x33333314ccccccdcULL, }, + { 0x55555536aaaaaabaULL, 0x55555536aaaaaabaULL, }, + { 0xd097b40684bda13fULL, 0xb425ece9f684bdb1ULL, }, + { 0xffffffe000000010ULL, 0xffffffe000000010ULL, }, + { 0x9999997666666678ULL, 0x9999997666666678ULL, }, /* 32 */ + { 0x9999997666666678ULL, 0x9999997666666678ULL, }, + { 0xaaaaaa8555555568ULL, 0xaaaaaa8555555568ULL, }, + { 0x3333330ccccccce0ULL, 0x3333330ccccccce0ULL, }, + { 0x7ae147851eb85200ULL, 0x7ae147851eb85200ULL, }, + { 0xcccccca333333348ULL, 0xcccccca333333348ULL, }, + { 0xf49f49c93e93e954ULL, 0xb05b0584b60b60ccULL, }, + { 0x66666639999999b0ULL, 0x66666639999999b0ULL, }, + { 0xcccccc9f3333334aULL, 0xcccccc9f3333334aULL, }, /* 40 */ + { 0xcccccc9f3333334aULL, 0xcccccc9f3333334aULL, }, + { 0x111110e2eeeeef06ULL, 0x111110e2eeeeef06ULL, }, + { 0x33333304cccccce4ULL, 0x33333304cccccce4ULL, }, + { 0x851eb822e147ae2cULL, 0x851eb822e147ae2cULL, }, + { 0x9999996a6666667eULL, 0x9999996a6666667eULL, }, + { 0xe38e38b3e93e9401ULL, 0xd27d27a2c71c71dfULL, }, + { 0xffffffd000000018ULL, 0xffffffd000000018ULL, }, + { 0x71c71c3f8e38e3a7ULL, 0x1c71c6e9e38e38fdULL, }, /* 48 */ + { 0x71c71c3f8e38e3a7ULL, 0x1c71c6e9e38e38fdULL, }, + { 0x684bd9df425ed0b1ULL, 0xda12f6507b425eebULL, }, + { 0xe38e38af1c71c736ULL, 0x38e38e03c71c71e2ULL, }, + { 0x0b60b5d527d27d42ULL, 0x1c71c6e549f49f66ULL, }, + { 0x5555551eaaaaaac5ULL, 0x5555551daaaaaac7ULL, }, + { 0x6e9e061a4587e6d2ULL, 0x2c3f35816b74f050ULL, }, + { 0xc71c718e38e38e54ULL, 0x71c71c378e38e3acULL, }, + { 0x5555551aaaaaaac7ULL, 0x55555519aaaaaac9ULL, }, /* 56 */ + { 0x5555551aaaaaaac7ULL, 0x55555519aaaaaac9ULL, }, + { 0xb425eccda12f6869ULL, 0xed097b05bda12f87ULL, }, + { 0xe38e38a71c71c73aULL, 0x38e38dfbc71c71e6ULL, }, + { 0x5555551777777796ULL, 0xeeeeeeb0aaaaaacaULL, }, + { 0x71c71c338e38e3adULL, 0x1c71c6dde38e3903ULL, }, + { 0xca4587a781948b2fULL, 0x61f9ad9406522c5fULL, }, + { 0xffffffc000000020ULL, 0xffffffc000000020ULL, }, + { 0x4f10a2061266c2b0ULL, 0x132f36fdaebdb734ULL, }, /* 64 */ + { 0xe173955d0a3d6d94ULL, 0x2de485b19f4dac90ULL, }, + { 0x5a9b88364205b90cULL, 0xe3c89435af2c3022ULL, }, + { 0xa5506be1e16f25e8ULL, 0xb5d99e2c137656f2ULL, }, + { 0x37b35f38d945d0ccULL, 0xd08eece004064c4eULL, }, + { 0x46c3bc088c276755ULL, 0xd3ba26318bdfb302ULL, }, + { 0x288f407241d1cf13ULL, 0xe4e2d49bf38e1598ULL, }, + { 0xb38b871fddd1234aULL, 0xfd7386eef5421908ULL, }, + { 0x2cb379f915996ec2ULL, 0xb357957305209c9aULL, }, /* 72 */ + { 0x0e7efe62cb43d680ULL, 0xc48043dd6cceff30ULL, }, + { 0x0966991866fb9f64ULL, 0x3d26b2ddb9e53ac1ULL, }, + { 0x9961eeb6d99e4586ULL, 0xc46ae4f9206e6e69ULL, }, + { 0xe416d2627907b262ULL, 0x967beeef84b89539ULL, }, + { 0x6f13191015070699ULL, 0xaf0ca142866c98a9ULL, }, + { 0xff0e6eae87a9acbbULL, 0x3650d35decf5cc51ULL, }, + { 0x52fc668a5f0acfa8ULL, 0xf4ee28afafeae691ULL, }, + { 0x8e335693216733a0ULL, 0xebf294e7e1b7da9fULL, }, /* 80 */ + { 0x242889888a96ab79ULL, 0x1029e138e123d999ULL, }, + { 0xa117d2200713df49ULL, 0xa936d669733f9d55ULL, }, + { 0xea5eaf7c9d524d27ULL, 0x533cccdee6d6ad0dULL, }, + { 0x8014252a44e6c8b7ULL, 0x5139a5a2ff917d2dULL, }, + { 0x12e82535692eaeadULL, 0x6c74742f3b1a47edULL, }, + { 0x6bfad303a455af5fULL, 0xa4da8c7753e03c42ULL, }, + { 0xd7d1673544f2b638ULL, 0x37b76789ca48e5eaULL, }, + { 0x55b32da89b1ab874ULL, 0x1136a063291c7430ULL, }, /* 88 */ + { 0xd8fa08f2c6e9500cULL, 0x15e6a0cfa25fce7eULL, }, + { 0xfb6ec0cb14ee46c0ULL, 0x85e0ab776ca06e87ULL, }, + { 0x7170744f4e43c44fULL, 0x17ee0476d6f5954fULL, }, + { 0xba3c379c6c72bc03ULL, 0xf4a9e78f41249a57ULL, }, + { 0x923c97db1bf9726fULL, 0x0c32ba5fa7655f81ULL, }, + { 0x08ff0c9a1b07a05dULL, 0x7e05b61db39e9936ULL, }, + { 0x16e37ad7ce0b9d05ULL, 0x3aa86333e7ca176eULL, }, + { 0x4396d885c2a89499ULL, 0x3259d55cbbd56e50ULL, }, /* 96 */ + { 0x86505184e2848fd5ULL, 0xfbe6ef6acb48e5d8ULL, }, + { 0xf19ecbd2f0d9cb45ULL, 0x102d8886fc3ba2e4ULL, }, + { 0x985e99073ad19cddULL, 0x0fae6c4a600fe8c8ULL, }, + { 0x40076fc7eafc7c7aULL, 0x18d0edce69b82b2cULL, }, + { 0xc633d71b8943703fULL, 0x236de461c55a6368ULL, }, + { 0xb2b44afd6be31aa8ULL, 0x366f22bc07569aa2ULL, }, + { 0x832148e5fdab87bfULL, 0x3b138b90c7099132ULL, }, + { 0x9388b611f0bd2a51ULL, 0xc95a7ba92714878aULL, }, /* 104 */ + { 0xa598b2d7184dc31bULL, 0x02d31201c0d1f3a9ULL, }, + { 0x26b9d9c7d27ede61ULL, 0x84305afc61d71edcULL, }, + { 0xd994c5da2b819a07ULL, 0xda2ed7517c38dd10ULL, }, + { 0x490b25198d55f4bbULL, 0xa54a7d332b34db68ULL, }, + { 0x9d17b063519fea3aULL, 0x1d81a65b0c1f8770ULL, }, + { 0x000b355286100badULL, 0x35e1e113d0b4c238ULL, }, + { 0x316423fb99a16a0dULL, 0xddbffc10af9e9540ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_h= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_h.c new file mode 100644 index 0000000..5fae97e --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_U.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_U.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfc02fc02fc02fc02ULL, 0xfc02fc02fc02fc02ULL, }, /* 0 */ + { 0xfc02fc02fc02fc02ULL, 0xfc02fc02fc02fc02ULL, }, + { 0x4eae4eae4eae4eaeULL, 0x4eae4eae4eae4eaeULL, }, + { 0xf804f804f804f804ULL, 0xf804f804f804f804ULL, }, + { 0x8e6c8e6c8e6c8e6cULL, 0x8e6c8e6c8e6c8e6cULL, }, + { 0xf406f406f406f406ULL, 0xf406f406f406f406ULL, }, + { 0x63950debb9406395ULL, 0x0debb94063950debULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, /* 8 */ + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0xf008f008f008f008ULL, 0xf008f008f008f008ULL, }, + { 0x42b442b442b442b4ULL, 0x42b442b442b442b4ULL, }, /* 16 */ + { 0x42b442b442b442b4ULL, 0x42b442b442b442b4ULL, }, + { 0x247c247c247c247cULL, 0x247c247c247c247cULL, }, + { 0x9560956095609560ULL, 0x9560956095609560ULL, }, + { 0xa450a450a450a450ULL, 0xa450a450a450a450ULL, }, + { 0xe80ce80ce80ce80cULL, 0xe80ce80ce80ce80cULL, }, + { 0xdd16a3fa6b88dd16ULL, 0xa3fa6b88dd16a3faULL, }, + { 0x3ab83ab83ab83ab8ULL, 0x3ab83ab83ab83ab8ULL, }, + { 0xe40ee40ee40ee40eULL, 0xe40ee40ee40ee40eULL, }, /* 24 */ + { 0xe40ee40ee40ee40eULL, 0xe40ee40ee40ee40eULL, }, + { 0x54f254f254f254f2ULL, 0x54f254f254f254f2ULL, }, + { 0x8d648d648d648d64ULL, 0x8d648d648d648d64ULL, }, + { 0x14dc14dc14dc14dcULL, 0x14dc14dc14dc14dcULL, }, + { 0x36ba36ba36ba36baULL, 0x36ba36ba36ba36baULL, }, + { 0xb13f94b17878b13fULL, 0x94b17878b13f94b1ULL, }, + { 0xe010e010e010e010ULL, 0xe010e010e010e010ULL, }, + { 0x7678767876787678ULL, 0x7678767876787678ULL, }, /* 32 */ + { 0x7678767876787678ULL, 0x7678767876787678ULL, }, + { 0x8568856885688568ULL, 0x8568856885688568ULL, }, + { 0x0ce00ce00ce00ce0ULL, 0x0ce00ce00ce00ce0ULL, }, + { 0x5200520052005200ULL, 0x5200520052005200ULL, }, + { 0xa348a348a348a348ULL, 0xa348a348a348a348ULL, }, + { 0xc95484cc4110c954ULL, 0x84cc4110c95484ccULL, }, + { 0x39b039b039b039b0ULL, 0x39b039b039b039b0ULL, }, + { 0x9f4a9f4a9f4a9f4aULL, 0x9f4a9f4a9f4a9f4aULL, }, /* 40 */ + { 0x9f4a9f4a9f4a9f4aULL, 0x9f4a9f4a9f4a9f4aULL, }, + { 0xe306e306e306e306ULL, 0xe306e306e306e306ULL, }, + { 0x04e404e404e404e4ULL, 0x04e404e404e404e4ULL, }, + { 0x562c562c562c562cULL, 0x562c562c562c562cULL, }, + { 0x6a7e6a7e6a7e6a7eULL, 0x6a7e6a7e6a7e6a7eULL, }, + { 0xb401a2df91f0b401ULL, 0xa2df91f0b401a2dfULL, }, + { 0xd018d018d018d018ULL, 0xd018d018d018d018ULL, }, + { 0x3fa7e9fd95523fa7ULL, 0xe9fd95523fa7e9fdULL, }, /* 48 */ + { 0x3fa7e9fd95523fa7ULL, 0xe9fd95523fa7e9fdULL, }, + { 0x34b1a5eb18ce34b1ULL, 0xa5eb18ce34b1a5ebULL, }, + { 0xaf3603e25a8caf36ULL, 0x03e25a8caf3603e2ULL, }, + { 0xd542e566f854d542ULL, 0xe566f854d542e566ULL, }, + { 0x1ec51dc71fc61ec5ULL, 0x1dc71fc61ec51dc7ULL, }, + { 0x36d2f3507aca36d2ULL, 0xf3507aca36d2f350ULL, }, + { 0x8e5437ace5008e54ULL, 0x37ace5008e5437acULL, }, + { 0x1ac719c91bc81ac7ULL, 0x19c91bc81ac719c9ULL, }, /* 56 */ + { 0x1ac719c91bc81ac7ULL, 0x19c91bc81ac719c9ULL, }, + { 0x7869b087eaf87869ULL, 0xb087eaf87869b087ULL, }, + { 0xa73afbe65290a73aULL, 0xfbe65290a73afbe6ULL, }, + { 0x1796b0ca4b301796ULL, 0xb0ca4b301796b0caULL, }, + { 0x33adde03895833adULL, 0xde03895833adde03ULL, }, + { 0x8b2f225ff38e8b2fULL, 0x225ff38e8b2f225fULL, }, + { 0xc020c020c020c020ULL, 0xc020c020c020c020ULL, }, + { 0x34443154ebe4ec59ULL, 0xff8ae31df73d39b0ULL, }, /* 64 */ + { 0x084880383032306cULL, 0x6831f4b22a587de0ULL, }, + { 0x88eca4049c587e93ULL, 0xca865ad6e8ab9840ULL, }, + { 0xe522f524bdcadd1dULL, 0x54ccaffeb00f3b20ULL, }, + { 0xb926440802182130ULL, 0xbd73c193e32a7f50ULL, }, + { 0x3c436a516daabc21ULL, 0xad084cd0f46491a4ULL, }, + { 0x27b3ac0f1c2c2c2eULL, 0x802ef7580d00b12eULL, }, + { 0xd025c9d65495de4cULL, 0x729f70a02b1b9712ULL, }, + { 0x50c9eda2c0bb2c73ULL, 0xd4f4d6c4e96eb172ULL, }, /* 72 */ + { 0x3c392f606f3d9c80ULL, 0xa81a814c020ad0fcULL, }, + { 0xcf6d16889c4f27f9ULL, 0x644b18717b7cd7e5ULL, }, + { 0x3673589e07dcc9afULL, 0x451e58c9f775050fULL, }, + { 0x92a9a9be294e2839ULL, 0xcf64adf1bed9a7efULL, }, + { 0x3b1bc78561b7da57ULL, 0xc1d52739dcf48dd3ULL, }, + { 0xa221099bcd447c0dULL, 0xa2a8679158edbafdULL, }, + { 0xeb8222a8f9295b55ULL, 0xd3326611d982e681ULL, }, + { 0x9e2ec7142fc38eccULL, 0x252170b1ef468aadULL, }, /* 80 */ + { 0x5b3cced0addf038eULL, 0x4792d47b141b612dULL, }, + { 0xad78e4f4df354c2fULL, 0xcd93f2f8260072b6ULL, }, + { 0x1e3041f03b3c9d99ULL, 0xc8df44c83f16491aULL, }, + { 0x42003b965b6cf7faULL, 0x5d309124882a7c82ULL, }, + { 0x82b67598b4cfbfcbULL, 0x920afeb79da82432ULL, }, + { 0x1a0a2a0ede448d00ULL, 0xb0b8797422bf2d4eULL, }, + { 0x288031e03ccc097aULL, 0xbee01b9c6a6f85c8ULL, }, + { 0x72c0106694442af7ULL, 0x50aa560d08f0ea98ULL, }, /* 88 */ + { 0x710637d8e7d45355ULL, 0xfa50963144a8cb2cULL, }, + { 0xbf0eecaa3a2faae6ULL, 0x63e63b048e4cebf3ULL, }, + { 0x16f03414587a870eULL, 0x72f35dbcffa25349ULL, }, + { 0x860072bc94eeb761ULL, 0xf61ea6c34a7a8fc5ULL, }, + { 0x0962bb704a1c48aaULL, 0x245c33d36e927f7fULL, }, + { 0x31e284ea963ac4c2ULL, 0x77782d72d0929bc6ULL, }, + { 0x8d10d6a4d868ace6ULL, 0x29fba58a7f86a05cULL, }, + { 0xde98199821f81f82ULL, 0x9afbdf4d3dea12acULL, }, /* 96 */ + { 0x9378a92e86104a4dULL, 0x2d160528eade271cULL, }, + { 0x134065aca120761fULL, 0x431f140f3db4433cULL, }, + { 0x37d8497ac688a50dULL, 0x63391a6dd0b6741cULL, }, + { 0x0e1578a8502e25b8ULL, 0xa12e387d0e90b4d4ULL, }, + { 0x2b65b9a082a8483bULL, 0xd8e26e173326bf2cULL, }, + { 0xa084f7800a3a820bULL, 0xc220c0c740af27aaULL, }, + { 0x9f5c29002e8ae771ULL, 0xeea4613d7100db80ULL, }, + { 0x2a8844debf5e9d5eULL, 0x9d46e906bc7b0527ULL, }, /* 104 */ + { 0x769006829567219dULL, 0xf041a3364eb808ecULL, }, + { 0xf87860ea545d8208ULL, 0x4ba95712a1ba1c84ULL, }, + { 0xc9483d8edc44cc9eULL, 0xe5aeac4a2c832ae0ULL, }, + { 0x37706d823a10b0daULL, 0x079d461a6b55dbf4ULL, }, + { 0x72109dfa526c8ea6ULL, 0x9f45813ac7e235caULL, }, + { 0xa8e0f6aa85343e96ULL, 0x37cdf6b28585e2d4ULL, }, + { 0x37803ef0bffea306ULL, 0x17150f92ff9c2ed8ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_w= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_w.c new file mode 100644 index 0000000..2bea9f6 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpadd_u_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPADD_U.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPADD_U.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfffc0002fffc0002ULL, 0xfffc0002fffc0002ULL, }, /* 0 */ + { 0xfffc0002fffc0002ULL, 0xfffc0002fffc0002ULL, }, + { 0x554eaaae554eaaaeULL, 0x554eaaae554eaaaeULL, }, + { 0xfff80004fff80004ULL, 0xfff80004fff80004ULL, }, + { 0x998e666c998e666cULL, 0x998e666c998e666cULL, }, + { 0xfff40006fff40006ULL, 0xfff40006fff40006ULL, }, + { 0x1c63e39571b88e40ULL, 0xc70e38eb1c63e395ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, /* 8 */ + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0xfff00008fff00008ULL, 0xfff00008fff00008ULL, }, + { 0x5542aab45542aab4ULL, 0x5542aab45542aab4ULL, }, /* 16 */ + { 0x5542aab45542aab4ULL, 0x5542aab45542aab4ULL, }, + { 0x38cf1c7c38cf1c7cULL, 0x38cf1c7c38cf1c7cULL, }, + { 0xaa955560aa955560ULL, 0xaa955560aa955560ULL, }, + { 0xbba44450bba44450ULL, 0xbba44450bba44450ULL, }, + { 0xffe8000cffe8000cULL, 0xffe8000cffe8000cULL, }, + { 0xbd87ed16f66b0988ULL, 0x84a425fabd87ed16ULL, }, + { 0x553aaab8553aaab8ULL, 0x553aaab8553aaab8ULL, }, + { 0xffe4000effe4000eULL, 0xffe4000effe4000eULL, }, /* 24 */ + { 0xffe4000effe4000eULL, 0xffe4000effe4000eULL, }, + { 0x71aa38f271aa38f2ULL, 0x71aa38f271aa38f2ULL, }, + { 0xaa8d5564aa8d5564ULL, 0xaa8d5564aa8d5564ULL, }, + { 0x3314ccdc3314ccdcULL, 0x3314ccdc3314ccdcULL, }, + { 0x5536aaba5536aabaULL, 0x5536aaba5536aabaULL, }, + { 0xb406a13fd0782f78ULL, 0x9794bdb1b406a13fULL, }, + { 0xffe00010ffe00010ULL, 0xffe00010ffe00010ULL, }, + { 0x9976667899766678ULL, 0x9976667899766678ULL, }, /* 32 */ + { 0x9976667899766678ULL, 0x9976667899766678ULL, }, + { 0xaa855568aa855568ULL, 0xaa855568aa855568ULL, }, + { 0x330ccce0330ccce0ULL, 0x330ccce0330ccce0ULL, }, + { 0x7ab852007ab85200ULL, 0x7ab852007ab85200ULL, }, + { 0xcca33348cca33348ULL, 0xcca33348cca33348ULL, }, + { 0xb02fe954f473a510ULL, 0x6beb60ccb02fe954ULL, }, + { 0x663999b0663999b0ULL, 0x663999b0663999b0ULL, }, + { 0xcc9f334acc9f334aULL, 0xcc9f334acc9f334aULL, }, /* 40 */ + { 0xcc9f334acc9f334aULL, 0xcc9f334acc9f334aULL, }, + { 0x10e2ef0610e2ef06ULL, 0x10e2ef0610e2ef06ULL, }, + { 0x3304cce43304cce4ULL, 0x3304cce43304cce4ULL, }, + { 0x84efae2c84efae2cULL, 0x84efae2c84efae2cULL, }, + { 0x996a667e996a667eULL, 0x996a667e996a667eULL, }, + { 0xd24d9401e35e82f0ULL, 0xc13c71dfd24d9401ULL, }, + { 0xffd00018ffd00018ULL, 0xffd00018ffd00018ULL, }, + { 0x1c3fe3a771948e52ULL, 0xc6ea38fd1c3fe3a7ULL, }, /* 48 */ + { 0x1c3fe3a771948e52ULL, 0xc6ea38fd1c3fe3a7ULL, }, + { 0xd9dfd0b1681797ceULL, 0x4ba65eebd9dfd0b1ULL, }, + { 0x38afc736e3591c8cULL, 0x8e0471e238afc736ULL, }, + { 0x1c3c7d420b298e54ULL, 0x2d4c9f661c3c7d42ULL, }, + { 0x551faac5551daac6ULL, 0x551eaac7551faac5ULL, }, + { 0x2c08e6d26e64f9caULL, 0xb0c4f0502c08e6d2ULL, }, + { 0x718f8e54c6e23900ULL, 0x1c38e3ac718f8e54ULL, }, + { 0x551baac75519aac8ULL, 0x551aaac9551baac7ULL, }, /* 56 */ + { 0x551baac75519aac8ULL, 0x551aaac9551baac7ULL, }, + { 0xecce6869b3e94bf8ULL, 0x25b12f87ecce6869ULL, }, + { 0x38a7c73ae3511c90ULL, 0x8dfc71e638a7c73aULL, }, + { 0xeeb1779655171130ULL, 0x884aaacaeeb17796ULL, }, + { 0x1c33e3ad71888e58ULL, 0xc6de39031c33e3adULL, }, + { 0x61ba8b2fca05cd8eULL, 0x32522c5f61ba8b2fULL, }, + { 0xffc00020ffc00020ULL, 0xffc00020ffc00020ULL, }, + { 0x1883fe94228255a4ULL, 0x1676ba1575c8cfc9ULL, }, /* 64 */ + { 0x9f026c24710669eaULL, 0x245b8a02c3f8aadeULL, }, + { 0x985184e0bcca4328ULL, 0x38ede08c879f0f77ULL, }, + { 0xe844f0f21702736aULL, 0x68d01ed3cbb87dadULL, }, + { 0x6ec35e82658687b0ULL, 0x76b4eec019e858c2ULL, }, + { 0x6651a5cf17c5ba59ULL, 0x00db97b536922653ULL, }, + { 0x10115a59bc888b36ULL, 0x953fb40350cbb498ULL, }, + { 0x7e8ac9c2890512c9ULL, 0x03c7477aa84e1b56ULL, }, + { 0x77d9e27ed4c8ec07ULL, 0x18599e046bf47fefULL, }, /* 72 */ + { 0x21999708798bbce4ULL, 0xacbdba52862e0e34ULL, }, + { 0x0cce2f904c6cd245ULL, 0x4da0b293fdff50fdULL, }, + { 0x67a1e4780c1be5e4ULL, 0xce178c138ffda993ULL, }, + { 0xb795508a66541626ULL, 0xfdf9ca5ad41717c9ULL, }, + { 0x260ebff332d09db9ULL, 0x6c815dd12b997e87ULL, }, + { 0x80e274dbf27fb158ULL, 0xecf83751bd97d71dULL, }, + { 0xb4190065dd35867dULL, 0x84d1ca72f61ef021ULL, }, + { 0x146be93b2ce39d07ULL, 0xb4edb1658fe8e617ULL, }, /* 80 */ + { 0x28da2b76b4930398ULL, 0x43fbb752e67034d3ULL, }, + { 0x6202107639989575ULL, 0xdd1056c8882a591fULL, }, + { 0x8e704692d2e83f33ULL, 0x8605bb9831163f53ULL, }, + { 0x19f6294a0938f7c3ULL, 0xb5d3886b8d6db0c9ULL, }, + { 0x338d977ccca46e03ULL, 0x26ffd0ded278d778ULL, }, + { 0xbd9d53669d1f0d1fULL, 0xcf6d52287e678700ULL, }, + { 0x18106087e287df80ULL, 0x6e5a3285497c7c8eULL, }, + { 0x7be90cbb50b10f2eULL, 0x91193a91e83049caULL, }, /* 88 */ + { 0xf5c762fa74f1dd41ULL, 0xc6a6d96a1360b472ULL, }, + { 0xdec724f4426380a0ULL, 0x8e924c103a77a87aULL, }, + { 0x43bb09c1cc850053ULL, 0x06479b02f6444a68ULL, }, + { 0x709d98fbece3b6fdULL, 0x0f02ef4f1e3d11f4ULL, }, + { 0xdf964592c2f0673eULL, 0xbf06914326915827ULL, }, + { 0xa595174288afc04eULL, 0x4dac2c104d1f338eULL, }, + { 0xf0400b1764f99f91ULL, 0x904ab47cadc0214cULL, }, + { 0x7a4505ebaa0a3823ULL, 0xc2ce09ca715dec1cULL, }, /* 96 */ + { 0xc0c227c1d78e87b7ULL, 0xfc9e0ad8846cfb1bULL, }, + { 0x4b501be126c0ecd3ULL, 0x47813bbab4be1843ULL, }, + { 0x8c94284d7bbb0613ULL, 0x5f37b7ed7918a6b1ULL, }, + { 0x16e12feca5f2470cULL, 0xecb24110b92e33d5ULL, }, + { 0x2d734e2e0f77e762ULL, 0x2dc8706ed959cbd3ULL, }, + { 0x5a430652c80bfcc7ULL, 0x835871922d75cf6eULL, }, + { 0xb30826c2c930c150ULL, 0xe0148a4e74790481ULL, }, + { 0x46021066c48e3720ULL, 0x6e76bee0c30066e8ULL, }, /* 104 */ + { 0x80543cd67141b3f2ULL, 0x14074d905449ba08ULL, }, + { 0x003ba47a25839f81ULL, 0x536fe6e8a79655ebULL, }, + { 0x709b823c97a86aeeULL, 0x13e9a6a824155b79ULL, }, + { 0xad5a661d2dfbd29aULL, 0x780997c18cea8383ULL, }, + { 0x024c799cf912e891ULL, 0x0bb620125e8129b7ULL, }, + { 0x0de66afc224e0f31ULL, 0x23590398c1ea5059ULL, }, + { 0x1d512ac23c5b270dULL, 0x38de17a18940924dULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPADD_U_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_d= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_d.c new file mode 100644 index 0000000..560e29a --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_S.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_S.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfffffffffffffffeULL, 0xfffffffffffffffeULL, }, /* 0 */ + { 0xfffffffffffffffeULL, 0xfffffffffffffffeULL, }, + { 0xffffffff55555552ULL, 0xffffffff55555552ULL, }, + { 0xfffffffffffffffcULL, 0xfffffffffffffffcULL, }, + { 0xffffffff99999994ULL, 0xffffffff99999994ULL, }, + { 0xfffffffffffffffaULL, 0xfffffffffffffffaULL, }, + { 0xffffffff71c71c6bULL, 0x000000001c71c715ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, /* 8 */ + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xfffffffffffffff8ULL, 0xfffffffffffffff8ULL, }, + { 0xffffffff5555554cULL, 0xffffffff5555554cULL, }, /* 16 */ + { 0xffffffff5555554cULL, 0xffffffff5555554cULL, }, + { 0xc71c71c58e38e384ULL, 0xc71c71c58e38e384ULL, }, + { 0xfffffffeaaaaaaa0ULL, 0xfffffffeaaaaaaa0ULL, }, + { 0xdddddddbbbbbbbb0ULL, 0xdddddddbbbbbbbb0ULL, }, + { 0xfffffffdfffffff4ULL, 0xfffffffdfffffff4ULL, }, + { 0xd097b4234bda12eaULL, 0x097b425c684bda06ULL, }, + { 0xfffffffd55555548ULL, 0xfffffffd55555548ULL, }, + { 0xfffffffdfffffff2ULL, 0xfffffffdfffffff2ULL, }, /* 24 */ + { 0xfffffffdfffffff2ULL, 0xfffffffdfffffff2ULL, }, + { 0x38e38e371c71c70eULL, 0x38e38e371c71c70eULL, }, + { 0xfffffffeaaaaaa9cULL, 0xfffffffeaaaaaa9cULL, }, + { 0x2222222133333324ULL, 0x2222222133333324ULL, }, + { 0xffffffff55555546ULL, 0xffffffff55555546ULL, }, + { 0x2f684bd97b425ec1ULL, 0xf684bda1097b424fULL, }, + { 0xfffffffffffffff0ULL, 0xfffffffffffffff0ULL, }, + { 0xffffffff99999988ULL, 0xffffffff99999988ULL, }, /* 32 */ + { 0xffffffff99999988ULL, 0xffffffff99999988ULL, }, + { 0xdddddddcaaaaaa98ULL, 0xdddddddcaaaaaa98ULL, }, + { 0xffffffff33333320ULL, 0xffffffff33333320ULL, }, + { 0xeb851eb6e147ae00ULL, 0xeb851eb6e147ae00ULL, }, + { 0xfffffffeccccccb8ULL, 0xfffffffeccccccb8ULL, }, + { 0xe38e38e1c16c16acULL, 0x05b05b0449f49f34ULL, }, + { 0xfffffffe66666650ULL, 0xfffffffe66666650ULL, }, + { 0xfffffffeccccccb6ULL, 0xfffffffeccccccb6ULL, }, /* 40 */ + { 0xfffffffeccccccb6ULL, 0xfffffffeccccccb6ULL, }, + { 0x22222221111110faULL, 0x22222221111110faULL, }, + { 0xffffffff3333331cULL, 0xffffffff3333331cULL, }, + { 0x147ae1471eb851d4ULL, 0x147ae1471eb851d4ULL, }, + { 0xffffffff99999982ULL, 0xffffffff99999982ULL, }, + { 0x1c71c71c16c16bffULL, 0xfa4fa4fa38e38e21ULL, }, + { 0xffffffffffffffe8ULL, 0xffffffffffffffe8ULL, }, + { 0xffffffff71c71c59ULL, 0x000000001c71c703ULL, }, /* 48 */ + { 0xffffffff71c71c59ULL, 0x000000001c71c703ULL, }, + { 0xd097b424bda12f4fULL, 0x097b425e84bda115ULL, }, + { 0xfffffffee38e38caULL, 0x0000000038e38e1eULL, }, + { 0xe38e38e1d82d82beULL, 0x05b05b05b60b609aULL, }, + { 0xfffffffe5555553bULL, 0x0000000055555539ULL, }, + { 0xca4587e4ba78192eULL, 0xf0329162948b0fb0ULL, }, + { 0xfffffffdc71c71acULL, 0x0000000071c71c54ULL, }, + { 0xfffffffe55555539ULL, 0x0000000055555537ULL, }, /* 56 */ + { 0xfffffffe55555539ULL, 0x0000000055555537ULL, }, + { 0x2f684bd85ed09797ULL, 0xf684bda1425ed079ULL, }, + { 0xfffffffee38e38c6ULL, 0x0000000038e38e1aULL, }, + { 0x1c71c71b8888886aULL, 0xfa4fa4fa55555536ULL, }, + { 0xffffffff71c71c53ULL, 0x000000001c71c6fdULL, }, + { 0x35ba78187e6b74d1ULL, 0x0fcd6e9df9add3a1ULL, }, + { 0xffffffffffffffe0ULL, 0xffffffffffffffe0ULL, }, + { 0xc1c52b51ed993d50ULL, 0xe9c828da514248ccULL, }, /* 64 */ + { 0xb38b1f29f5c2926cULL, 0xe4522d2260b25370ULL, }, + { 0x978b1706bdfa46f4ULL, 0xd814f3be50d3cfdeULL, }, + { 0xbd2549a81e90da18ULL, 0xf92987d1ec89a90eULL, }, + { 0xaeeb3d8026ba2f34ULL, 0xf3b38c19fbf9b3b2ULL, }, + { 0x9756e17673d898abULL, 0xf08852c874204cfeULL, }, + { 0xab37d321be2e30edULL, 0xf49ef75a0c71ea68ULL, }, + { 0x908aa2c1222edcb6ULL, 0x0445531d0abde6f8ULL, }, + { 0x748a9a9dea66913eULL, 0xf80819b8fadf6366ULL, }, /* 72 */ + { 0x886b8c4934bc2980ULL, 0xfc1ebe4a933100d0ULL, }, + { 0x59d865e79904609cULL, 0xd9ce9972461ac53fULL, }, + { 0x985e08e42661ba7aULL, 0xced13609df919197ULL, }, + { 0xbdf83b8586f84d9eULL, 0xefe5ca1d7b476ac7ULL, }, + { 0xa34b0b24eaf8f967ULL, 0xff8c25e079936757ULL, }, + { 0xe1d0ae2178565345ULL, 0xf48ec278130a33afULL, }, + { 0x8de2b645a0f53058ULL, 0xa45a44165015196fULL, }, + { 0x6792d4f3d7eea55cULL, 0xbfd22ee1a25aa627ULL, }, /* 80 */ + { 0x75702d5b9af89c83ULL, 0xcc593d1da09f7be9ULL, }, + { 0x801c3e1c97724195ULL, 0xb4c868d4067dd2d2ULL, }, + { 0xdeafd0d6f0bea5c3ULL, 0x957877eb733b98b2ULL, }, + { 0xd1883629f50ec77bULL, 0xb587d85cf1ffef10ULL, }, + { 0xd4133b37d7cbfcc8ULL, 0xbc35d373b6f24df8ULL, }, + { 0xbab344ed957a4c42ULL, 0xae8dcb499ce6cd0bULL, }, + { 0x004c193eb947b2ddULL, 0x68b0a9907b71a293ULL, }, + { 0x0b979b74995fc935ULL, 0x4a9602f12aa080cfULL, }, /* 88 */ + { 0x2ae2653846d12eb1ULL, 0x4185939a2d850f91ULL, }, + { 0x4c5017cc0eed7401ULL, 0x466840b4575dc0d7ULL, }, + { 0x255760c7e1e38957ULL, 0x8360b1037a4f3497ULL, }, + { 0x3b88c1c3a41f6803ULL, 0xa8cf0d07b592cd69ULL, }, + { 0x585dd51272f3e482ULL, 0xb5723c3756218857ULL, }, + { 0x94c1c43b5f5b538eULL, 0xdd9794c5786cc9c2ULL, }, + { 0xa0b80278cc3c6a8bULL, 0xf710a53506ea3e4aULL, }, + { 0x7c607ecd0201d92bULL, 0xf9bcdab0e105825cULL, }, /* 96 */ + { 0xb628bad7d2470e0fULL, 0xfb660e974362496cULL, }, + { 0x9ae11df599c281fbULL, 0xfd2738784b8dbfeaULL, }, + { 0x7bc5bf3b5e23aeffULL, 0xfe707ab5676dfce2ULL, }, + { 0x614dabb2dc4e0a36ULL, 0xf5f8795b76d8fd08ULL, }, + { 0x6dbd1a209fc658b0ULL, 0xecd982bc128c8ceaULL, }, + { 0x8cb93c5d61b1a8d0ULL, 0xecbaa1839f7e477aULL, }, + { 0x6d33947e52d25a59ULL, 0xf62aab8428f0bf14ULL, }, + { 0xa7970469e4259b2dULL, 0x0543881aad9efd08ULL, }, /* 104 */ + { 0x8310e5e55f8149f3ULL, 0xe925758a04d06282ULL, }, + { 0x746e208dd13c0f61ULL, 0xee4c7bccbccd15e4ULL, }, + { 0x8da69743b598403fULL, 0xdac93db8514253e0ULL, }, + { 0xdb31a0aea0a5cde6ULL, 0xe5bd105b853454a0ULL, }, + { 0x0e6cfc3a89e7bd7cULL, 0xb06ea3bad3a90bd8ULL, }, + { 0x338cc47438edb042ULL, 0x7df572596f6dffe8ULL, }, + { 0x07fce3091840a942ULL, 0xdbd5224936527bd0ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_h= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_h.c new file mode 100644 index 0000000..3fb88ab --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_S.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_S.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfffefffefffefffeULL, 0xfffefffefffefffeULL, }, /* 0 */ + { 0xfffefffefffefffeULL, 0xfffefffefffefffeULL, }, + { 0xff52ff52ff52ff52ULL, 0xff52ff52ff52ff52ULL, }, + { 0xfffcfffcfffcfffcULL, 0xfffcfffcfffcfffcULL, }, + { 0xff94ff94ff94ff94ULL, 0xff94ff94ff94ff94ULL, }, + { 0xfffafffafffafffaULL, 0xfffafffafffafffaULL, }, + { 0xff6b0015ffc0ff6bULL, 0x0015ffc0ff6b0015ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, /* 8 */ + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xfff8fff8fff8fff8ULL, 0xfff8fff8fff8fff8ULL, }, + { 0xff4cff4cff4cff4cULL, 0xff4cff4cff4cff4cULL, }, /* 16 */ + { 0xff4cff4cff4cff4cULL, 0xff4cff4cff4cff4cULL, }, + { 0xc584c584c584c584ULL, 0xc584c584c584c584ULL, }, + { 0xfea0fea0fea0fea0ULL, 0xfea0fea0fea0fea0ULL, }, + { 0xdbb0dbb0dbb0dbb0ULL, 0xdbb0dbb0dbb0dbb0ULL, }, + { 0xfdf4fdf4fdf4fdf4ULL, 0xfdf4fdf4fdf4fdf4ULL, }, + { 0xcdea0706ea78cdeaULL, 0x0706ea78cdea0706ULL, }, + { 0xfd48fd48fd48fd48ULL, 0xfd48fd48fd48fd48ULL, }, + { 0xfdf2fdf2fdf2fdf2ULL, 0xfdf2fdf2fdf2fdf2ULL, }, /* 24 */ + { 0xfdf2fdf2fdf2fdf2ULL, 0xfdf2fdf2fdf2fdf2ULL, }, + { 0x370e370e370e370eULL, 0x370e370e370e370eULL, }, + { 0xfe9cfe9cfe9cfe9cULL, 0xfe9cfe9cfe9cfe9cULL, }, + { 0x2124212421242124ULL, 0x2124212421242124ULL, }, + { 0xff46ff46ff46ff46ULL, 0xff46ff46ff46ff46ULL, }, + { 0x2ec1f64f12882ec1ULL, 0xf64f12882ec1f64fULL, }, + { 0xfff0fff0fff0fff0ULL, 0xfff0fff0fff0fff0ULL, }, + { 0xff88ff88ff88ff88ULL, 0xff88ff88ff88ff88ULL, }, /* 32 */ + { 0xff88ff88ff88ff88ULL, 0xff88ff88ff88ff88ULL, }, + { 0xdc98dc98dc98dc98ULL, 0xdc98dc98dc98dc98ULL, }, + { 0xff20ff20ff20ff20ULL, 0xff20ff20ff20ff20ULL, }, + { 0xea00ea00ea00ea00ULL, 0xea00ea00ea00ea00ULL, }, + { 0xfeb8feb8feb8feb8ULL, 0xfeb8feb8feb8feb8ULL, }, + { 0xe1ac0434f2f0e1acULL, 0x0434f2f0e1ac0434ULL, }, + { 0xfe50fe50fe50fe50ULL, 0xfe50fe50fe50fe50ULL, }, + { 0xfeb6feb6feb6feb6ULL, 0xfeb6feb6feb6feb6ULL, }, /* 40 */ + { 0xfeb6feb6feb6feb6ULL, 0xfeb6feb6feb6feb6ULL, }, + { 0x20fa20fa20fa20faULL, 0x20fa20fa20fa20faULL, }, + { 0xff1cff1cff1cff1cULL, 0xff1cff1cff1cff1cULL, }, + { 0x13d413d413d413d4ULL, 0x13d413d413d413d4ULL, }, + { 0xff82ff82ff82ff82ULL, 0xff82ff82ff82ff82ULL, }, + { 0x1bfffa210b101bffULL, 0xfa210b101bfffa21ULL, }, + { 0xffe8ffe8ffe8ffe8ULL, 0xffe8ffe8ffe8ffe8ULL, }, + { 0xff590003ffaeff59ULL, 0x0003ffaeff590003ULL, }, /* 48 */ + { 0xff590003ffaeff59ULL, 0x0003ffaeff590003ULL, }, + { 0xcf4f0915ec32cf4fULL, 0x0915ec32cf4f0915ULL, }, + { 0xfeca001eff74fecaULL, 0x001eff74feca001eULL, }, + { 0xe1be059af3ace1beULL, 0x059af3ace1be059aULL, }, + { 0xfe3b0039ff3afe3bULL, 0x0039ff3afe3b0039ULL, }, + { 0xc82ef0b0c036c82eULL, 0xf0b0c036c82ef0b0ULL, }, + { 0xfdac0054ff00fdacULL, 0x0054ff00fdac0054ULL, }, + { 0xfe390037ff38fe39ULL, 0x0037ff38fe390037ULL, }, /* 56 */ + { 0xfe390037ff38fe39ULL, 0x0037ff38fe390037ULL, }, + { 0x2d97f67912082d97ULL, 0xf67912082d97f679ULL, }, + { 0xfec6001aff70fec6ULL, 0x001aff70fec6001aULL, }, + { 0x1b6afa360ad01b6aULL, 0xfa360ad01b6afa36ULL, }, + { 0xff53fffdffa8ff53ULL, 0xfffdffa8ff53fffdULL, }, + { 0x34d10fa13e7234d1ULL, 0x0fa13e7234d10fa1ULL, }, + { 0xffe0ffe0ffe0ffe0ULL, 0xffe0ffe0ffe0ffe0ULL, }, + { 0x9bbcf2acd41cd3a7ULL, 0xc076dce3c4c3e650ULL, }, /* 64 */ + { 0xb4b806c8f1cee494ULL, 0xbecfd64ea6a80020ULL, }, + { 0x6814ecfc0fa82b6dULL, 0xc37ad92a91550ac0ULL, }, + { 0x7bdefedcee3621e3ULL, 0xeb34ed0270f105e0ULL, }, + { 0x94da12f80be832d0ULL, 0xe98de66d52d61fb0ULL, }, + { 0x83bdecafc65625dfULL, 0xe7f8d130419c055cULL, }, + { 0x994d0df1c6d40fd2ULL, 0xe3d2c1a83e00f9d2ULL, }, + { 0xafdbf02abf6b06b4ULL, 0xeb61a56034e501eeULL, }, + { 0x6337d65edd454d8dULL, 0xf00ca83c1f920c8eULL, }, /* 72 */ + { 0x78c7f7a0ddc33780ULL, 0xebe698b41bf60104ULL, }, + { 0x3d93c078c0b1c207ULL, 0xdfb58b8ff884fa1bULL, }, + { 0x468de162e424db51ULL, 0xeee27037d08b05f1ULL, }, + { 0x5a57f342c2b2d1c7ULL, 0x169c840fb0270111ULL, }, + { 0x70e5d57bbb49c8a9ULL, 0x1e2b67c7a70c092dULL, }, + { 0x79dff665debce1f3ULL, 0x2d584c6f7f131503ULL, }, + { 0x307edd58b2d7c6abULL, 0xf8ce0def507eed7fULL, }, + { 0x12d2ebaaceb9ef2dULL, 0x0f44139e1494e19bULL, }, /* 80 */ + { 0x07500cecbf88e9fcULL, 0x109a22b12d84e9f5ULL, }, + { 0xed7c0a0c9689dd79ULL, 0xfe3a2a165149ee24ULL, }, + { 0xcf880594d43cb481ULL, 0x00ba413659fef988ULL, }, + { 0xea40f026c424ed7dULL, 0x1ce42a975ba6fcf8ULL, }, + { 0xfa52e174e584e55aULL, 0x19f040936a55fe20ULL, }, + { 0xdb86fe7ec64b0603ULL, 0x13a14ea67f40fbeaULL, }, + { 0x115cd8c4cd3c05cdULL, 0x1699652699e9f314ULL, }, + { 0xf33cc884be3c10e4ULL, 0x399852dba428ee14ULL, }, /* 88 */ + { 0x0273f878eba21554ULL, 0x31ee6cb7a1dcf428ULL, }, + { 0xdaad1e38d3d148edULL, 0x27a784e6885df2c4ULL, }, + { 0x04ea0acced565727ULL, 0x33f546b6479bdaa0ULL, }, + { 0x0fe60140cf623084ULL, 0x29715ee078b0d340ULL, }, + { 0x097de88007d93f14ULL, 0x2a887b768288e2aaULL, }, + { 0xe07fb5d0025365dfULL, 0x116297ca6cdaedb8ULL, }, + { 0xc74ecab2f1b47bc3ULL, 0x1ec35e229b5ad07eULL, }, + { 0x8c4ab55e1124622cULL, 0x2e844d9c6f52bb96ULL, }, /* 96 */ + { 0x3746c0d800b436a2ULL, 0x52ee6f0548caaafeULL, }, + { 0x3412b2381dcc3c34ULL, 0x4226686a634c9036ULL, }, + { 0x44feb5ac2d2c1b48ULL, 0x1f863d063f8e6aaeULL, }, + { 0x45ced628325f1f0bULL, 0x190e4cdb56714772ULL, }, + { 0x3a43c6b04bc8259aULL, 0x17ca65193394327cULL, }, + { 0x4cabe5a01d613107ULL, 0x14467dc849f92468ULL, }, + { 0x383d0ac03df53bb8ULL, 0x1554a52945b51a80ULL, }, + { 0x352bf8744cc532afULL, 0x1f4190b4693720beULL, }, /* 104 */ + { 0x37711cdc568e2109ULL, 0x24b0770882d72146ULL, }, + { 0x21c319bc5896349eULL, 0x12b492065fe41709ULL, }, + { 0x42090ae65cb41b62ULL, 0x0416792084231302ULL, }, + { 0x226211dc497800b0ULL, 0x072cb6d850f915fcULL, }, + { 0xf5441b3a17b21910ULL, 0x0ce58de86df716f2ULL, }, + { 0xe51807761e2e171eULL, 0x10b4544095541446ULL, }, + { 0xe980e35e0a5c10acULL, 0x137085a05b4f30deULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_w= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_w.c new file mode 100644 index 0000000..b95878b --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_s_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_S.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_S.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0xfffffffefffffffeULL, 0xfffffffefffffffeULL, }, /* 0 */ + { 0xfffffffefffffffeULL, 0xfffffffefffffffeULL, }, + { 0xffff5552ffff5552ULL, 0xffff5552ffff5552ULL, }, + { 0xfffffffcfffffffcULL, 0xfffffffcfffffffcULL, }, + { 0xffff9994ffff9994ULL, 0xffff9994ffff9994ULL, }, + { 0xfffffffafffffffaULL, 0xfffffffafffffffaULL, }, + { 0x00001c6bffff71c0ULL, 0xffffc71500001c6bULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, /* 8 */ + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xfffffff8fffffff8ULL, 0xfffffff8fffffff8ULL, }, + { 0xffff554cffff554cULL, 0xffff554cffff554cULL, }, /* 16 */ + { 0xffff554cffff554cULL, 0xffff554cffff554cULL, }, + { 0xc71ae384c71ae384ULL, 0xc71ae384c71ae384ULL, }, + { 0xfffeaaa0fffeaaa0ULL, 0xfffeaaa0fffeaaa0ULL, }, + { 0xdddbbbb0dddbbbb0ULL, 0xdddbbbb0dddbbbb0ULL, }, + { 0xfffdfff4fffdfff4ULL, 0xfffdfff4fffdfff4ULL, }, + { 0x097912ead094f678ULL, 0xed06da06097912eaULL, }, + { 0xfffd5548fffd5548ULL, 0xfffd5548fffd5548ULL, }, + { 0xfffdfff2fffdfff2ULL, 0xfffdfff2fffdfff2ULL, }, /* 24 */ + { 0xfffdfff2fffdfff2ULL, 0xfffdfff2fffdfff2ULL, }, + { 0x38e1c70e38e1c70eULL, 0x38e1c70e38e1c70eULL, }, + { 0xfffeaa9cfffeaa9cULL, 0xfffeaa9cfffeaa9cULL, }, + { 0x2221332422213324ULL, 0x2221332422213324ULL, }, + { 0xffff5546ffff5546ULL, 0xffff5546ffff5546ULL, }, + { 0xf6845ec12f67d088ULL, 0x12f6424ff6845ec1ULL, }, + { 0xfffffff0fffffff0ULL, 0xfffffff0fffffff0ULL, }, + { 0xffff9988ffff9988ULL, 0xffff9988ffff9988ULL, }, /* 32 */ + { 0xffff9988ffff9988ULL, 0xffff9988ffff9988ULL, }, + { 0xdddcaa98dddcaa98ULL, 0xdddcaa98dddcaa98ULL, }, + { 0xffff3320ffff3320ULL, 0xffff3320ffff3320ULL, }, + { 0xeb83ae00eb83ae00ULL, 0xeb83ae00eb83ae00ULL, }, + { 0xfffeccb8fffeccb8ULL, 0xfffeccb8fffeccb8ULL, }, + { 0x05af16ace38c5af0ULL, 0xf49d9f3405af16acULL, }, + { 0xfffe6650fffe6650ULL, 0xfffe6650fffe6650ULL, }, + { 0xfffeccb6fffeccb6ULL, 0xfffeccb6fffeccb6ULL, }, /* 40 */ + { 0xfffeccb6fffeccb6ULL, 0xfffeccb6fffeccb6ULL, }, + { 0x222110fa222110faULL, 0x222110fa222110faULL, }, + { 0xffff331cffff331cULL, 0xffff331cffff331cULL, }, + { 0x147a51d4147a51d4ULL, 0x147a51d4147a51d4ULL, }, + { 0xffff9982ffff9982ULL, 0xffff9982ffff9982ULL, }, + { 0xfa4f6bff1c717d10ULL, 0x0b608e21fa4f6bffULL, }, + { 0xffffffe8ffffffe8ULL, 0xffffffe8ffffffe8ULL, }, + { 0x00001c59ffff71aeULL, 0xffffc70300001c59ULL, }, /* 48 */ + { 0x00001c59ffff71aeULL, 0xffffc70300001c59ULL, }, + { 0x097b2f4fd0966832ULL, 0xed08a115097b2f4fULL, }, + { 0x000038cafffee374ULL, 0xffff8e1e000038caULL, }, + { 0x05b082bee38c71acULL, 0xf49e609a05b082beULL, }, + { 0x0000553bfffe553aULL, 0xffff55390000553bULL, }, + { 0xf033192eca430636ULL, 0xc0c90fb0f033192eULL, }, + { 0x000071acfffdc700ULL, 0xffff1c54000071acULL, }, + { 0x00005539fffe5538ULL, 0xffff553700005539ULL, }, /* 56 */ + { 0x00005539fffe5538ULL, 0xffff553700005539ULL, }, + { 0xf68497972f66b408ULL, 0x12f5d079f6849797ULL, }, + { 0x000038c6fffee370ULL, 0xffff8e1a000038c6ULL, }, + { 0xfa4f886a1c70eed0ULL, 0x0b605536fa4f886aULL, }, + { 0x00001c53ffff71a8ULL, 0xffffc6fd00001c53ULL, }, + { 0x0fcd74d135ba3272ULL, 0x3f35d3a10fcd74d1ULL, }, + { 0xffffffe0ffffffe0ULL, 0xffffffe0ffffffe0ULL, }, + { 0xc5a8016cdd3daa5cULL, 0xe94945ebe7053037ULL, }, /* 64 */ + { 0xc3b493dce3f99616ULL, 0xe6c275fe01105522ULL, }, + { 0x949f7b2015d7bcd8ULL, 0xdd8e1f740c23f089ULL, }, + { 0xcb480f0e10df8c96ULL, 0x0470e12d02738253ULL, }, + { 0xc954a17e179b7850ULL, 0x01ea11401c7ea73eULL, }, + { 0xc9425a31f36c45a7ULL, 0xedf7684bffd4d9adULL, }, + { 0xc7fda5a7eec474caULL, 0xdbac4bfdfada4b68ULL, }, + { 0xc9d3363ecb9ded37ULL, 0xc40db8860b92e4aaULL, }, + { 0x9abe1d82fd7c13f9ULL, 0xbad961fc16a68011ULL, }, /* 72 */ + { 0x997968f8f8d4431cULL, 0xa88e45ae11abf1ccULL, }, + { 0x644cd070b0912dbbULL, 0x95a94d6df030af03ULL, }, + { 0x90151b88bce11a1cULL, 0x8ce173edd7b3566dULL, }, + { 0xc6bdaf76b7e8e9daULL, 0xb3c435a6ce02e837ULL, }, + { 0xc893400d94c26247ULL, 0x9c25a22fdebb8179ULL, }, + { 0xf45b8b25a1124ea8ULL, 0x935dc8afc63e28e3ULL, }, + { 0xc124ff9b7af87983ULL, 0x2916358ea57b0fdfULL, }, + { 0xa3bdf52f3f1bc6d3ULL, 0x1a9b7790a9e67552ULL, }, /* 80 */ + { 0xa2394ebc1f432fbaULL, 0x38d091638b040700ULL, }, + { 0x9c98e9da3d8da28dULL, 0x17578e46633c7554ULL, }, + { 0xca2304601c11139aULL, 0xecce6f4f9252c75cULL, }, + { 0xb167fd62111ca498ULL, 0xed848a6b7ffb85a6ULL, }, + { 0xb01a590af79618c4ULL, 0xcf3de0319d05b479ULL, }, + { 0xb2490b42008cb27aULL, 0xcfbf82ea8729672eULL, }, + { 0xd36607e1f75b1a82ULL, 0x8006f7ab6a0e64dcULL, }, + { 0xbf56e259efe4672cULL, 0xa61769778a2f91d2ULL, }, /* 88 */ + { 0xbe4f061a0bbba5e0ULL, 0xc922e830b7ade689ULL, }, + { 0xaac85110e5ef76abULL, 0xcc5f9db0a366adc6ULL, }, + { 0xc91b5b88fd4a93d2ULL, 0x879c58c17a96cfbaULL, }, + { 0xb8799dfa21be5efeULL, 0xa721331f6c3d78f0ULL, }, + { 0xb76ef97e2ca86ef4ULL, 0xbb78ca223c0de8adULL, }, + { 0x9da743266b64f51cULL, 0xba24b1045354f4faULL, }, + { 0xc2f3162f429e4870ULL, 0x764125c06e4d3512ULL, }, + { 0xa89d5e1d1ffccbf4ULL, 0x51bf6a197f87f33bULL, }, /* 96 */ + { 0x890f17ff2c462c7cULL, 0x34f589127c4cc49aULL, }, + { 0x53dc26951679feb0ULL, 0x2aa458e36a7c8cdeULL, }, + { 0x7ed4f0c1135e605eULL, 0x1a22c08d472920e2ULL, }, + { 0x80f6d8c622f1e674ULL, 0x071f986d36987e53ULL, }, + { 0x7ee91ba012abf971ULL, 0xeab87172091da737ULL, }, + { 0x80fac8d20b8e2fb8ULL, 0x0ad43e562523cff0ULL, }, + { 0x7ef3481012ac516eULL, 0x1acdbd0e31a33d13ULL, }, + { 0xbf53a8023cd97b5aULL, 0x07b9c024393d8136ULL, }, /* 104 */ + { 0x8e3cb38085aaebe3ULL, 0xf84dd1305e923ebfULL, }, + { 0x50c22f685af8caedULL, 0xef14166874d2544dULL, }, + { 0x7a3548245bc2dee5ULL, 0xf6b38ff08f52b803ULL, }, + { 0x3e4f96f53628fefdULL, 0xbe65c7ed60e1faffULL, }, + { 0x2c2056e3221de63fULL, 0x871151e081227a9dULL, }, + { 0x113314bc1293f380ULL, 0x774bb8df643781b9ULL, }, + { 0x07d911730a4b3a5dULL, 0x8b56a81c77aef6ebULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_S_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_d= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_d.c new file mode 100644 index 0000000..fc6c4e6 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_U.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_U.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x00000003fffffffeULL, 0x00000003fffffffeULL, }, /* 0 */ + { 0x00000003fffffffeULL, 0x00000003fffffffeULL, }, + { 0xaaaaaab155555552ULL, 0xaaaaaab155555552ULL, }, + { 0x00000007fffffffcULL, 0x00000007fffffffcULL, }, + { 0x6666667199999994ULL, 0x6666667199999994ULL, }, + { 0x0000000bfffffffaULL, 0x0000000bfffffffaULL, }, + { 0x8e38e39c71c71c6bULL, 0xe38e38f21c71c715ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, /* 8 */ + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0x0000000ffffffff8ULL, 0x0000000ffffffff8ULL, }, + { 0xaaaaaabd5555554cULL, 0xaaaaaabd5555554cULL, }, /* 16 */ + { 0xaaaaaabd5555554cULL, 0xaaaaaabd5555554cULL, }, + { 0xc71c71db8e38e384ULL, 0xc71c71db8e38e384ULL, }, + { 0x5555556aaaaaaaa0ULL, 0x5555556aaaaaaaa0ULL, }, + { 0x4444445bbbbbbbb0ULL, 0x4444445bbbbbbbb0ULL, }, + { 0x00000017fffffff4ULL, 0x00000017fffffff4ULL, }, + { 0x097b42784bda12eaULL, 0x425ed0b1684bda06ULL, }, + { 0xaaaaaac555555548ULL, 0xaaaaaac555555548ULL, }, + { 0x0000001bfffffff2ULL, 0x0000001bfffffff2ULL, }, /* 24 */ + { 0x0000001bfffffff2ULL, 0x0000001bfffffff2ULL, }, + { 0x8e38e3ab1c71c70eULL, 0x8e38e3ab1c71c70eULL, }, + { 0x55555572aaaaaa9cULL, 0x55555572aaaaaa9cULL, }, + { 0xcccccceb33333324ULL, 0xcccccceb33333324ULL, }, + { 0xaaaaaac955555546ULL, 0xaaaaaac955555546ULL, }, + { 0x2f684bf97b425ec1ULL, 0x4bda1316097b424fULL, }, + { 0x0000001ffffffff0ULL, 0x0000001ffffffff0ULL, }, + { 0x6666668999999988ULL, 0x6666668999999988ULL, }, /* 32 */ + { 0x6666668999999988ULL, 0x6666668999999988ULL, }, + { 0x5555557aaaaaaa98ULL, 0x5555557aaaaaaa98ULL, }, + { 0xccccccf333333320ULL, 0xccccccf333333320ULL, }, + { 0x851eb87ae147ae00ULL, 0x851eb87ae147ae00ULL, }, + { 0x3333335cccccccb8ULL, 0x3333335cccccccb8ULL, }, + { 0x0b60b636c16c16acULL, 0x4fa4fa7b49f49f34ULL, }, + { 0x999999c666666650ULL, 0x999999c666666650ULL, }, + { 0x33333360ccccccb6ULL, 0x33333360ccccccb6ULL, }, /* 40 */ + { 0x33333360ccccccb6ULL, 0x33333360ccccccb6ULL, }, + { 0xeeeeef1d111110faULL, 0xeeeeef1d111110faULL, }, + { 0xccccccfb3333331cULL, 0xccccccfb3333331cULL, }, + { 0x7ae147dd1eb851d4ULL, 0x7ae147dd1eb851d4ULL, }, + { 0x6666669599999982ULL, 0x6666669599999982ULL, }, + { 0x1c71c74c16c16bffULL, 0x2d82d85d38e38e21ULL, }, + { 0x0000002fffffffe8ULL, 0x0000002fffffffe8ULL, }, + { 0x8e38e3c071c71c59ULL, 0xe38e39161c71c703ULL, }, /* 48 */ + { 0x8e38e3c071c71c59ULL, 0xe38e39161c71c703ULL, }, + { 0x97b42620bda12f4fULL, 0x25ed09af84bda115ULL, }, + { 0x1c71c750e38e38caULL, 0xc71c71fc38e38e1eULL, }, + { 0xf49f4a2ad82d82beULL, 0xe38e391ab60b609aULL, }, + { 0xaaaaaae15555553bULL, 0xaaaaaae255555539ULL, }, + { 0x9161f9e5ba78192eULL, 0xd3c0ca7e948b0fb0ULL, }, + { 0x38e38e71c71c71acULL, 0x8e38e3c871c71c54ULL, }, + { 0xaaaaaae555555539ULL, 0xaaaaaae655555537ULL, }, /* 56 */ + { 0xaaaaaae555555539ULL, 0xaaaaaae655555537ULL, }, + { 0x4bda13325ed09797ULL, 0x12f684fa425ed079ULL, }, + { 0x1c71c758e38e38c6ULL, 0xc71c720438e38e1aULL, }, + { 0xaaaaaae88888886aULL, 0x1111114f55555536ULL, }, + { 0x8e38e3cc71c71c53ULL, 0xe38e39221c71c6fdULL, }, + { 0x35ba78587e6b74d1ULL, 0x9e06526bf9add3a1ULL, }, + { 0x0000003fffffffe0ULL, 0x0000003fffffffe0ULL, }, + { 0xb0ef5df9ed993d50ULL, 0xecd0c902514248ccULL, }, /* 64 */ + { 0x1e8c6aa2f5c2926cULL, 0xd21b7a4e60b25370ULL, }, + { 0xa56477c9bdfa46f4ULL, 0x1c376bca50d3cfdeULL, }, + { 0x5aaf941e1e90da18ULL, 0x4a2661d3ec89a90eULL, }, + { 0xc84ca0c726ba2f34ULL, 0x2f71131ffbf9b3b2ULL, }, + { 0xb93c43f773d898abULL, 0x2c45d9ce74204cfeULL, }, + { 0xd770bf8dbe2e30edULL, 0x1b1d2b640c71ea68ULL, }, + { 0x4c7478e0222edcb6ULL, 0x028c79110abde6f8ULL, }, + { 0xd34c8606ea66913eULL, 0x4ca86a8cfadf6366ULL, }, /* 72 */ + { 0xf181019d34bc2980ULL, 0x3b7fbc22933100d0ULL, }, + { 0xf69966e79904609cULL, 0xc2d94d22461ac53fULL, }, + { 0x669e11492661ba7aULL, 0x3b951b06df919197ULL, }, + { 0x1be92d9d86f84d9eULL, 0x698411107b476ac7ULL, }, + { 0x90ece6efeaf8f967ULL, 0x50f35ebd79936757ULL, }, + { 0x00f1915178565345ULL, 0xc9af2ca2130a33afULL, }, + { 0xad039975a0f53058ULL, 0x0b11d7505015196fULL, }, + { 0x376d4d72ebbc7b1cULL, 0xb833881ecd4918dbULL, }, /* 80 */ + { 0xb97c39c63d30eb26ULL, 0x9983e1a16fddbe3bULL, }, + { 0x103118e687f4c4aaULL, 0x36d2d322776b1540ULL, }, + { 0xd7103f328f5683b0ULL, 0xc97816b7d22d1890ULL, }, + { 0x4dd93b94622edfd8ULL, 0xbd32853a6649bd9eULL, }, + { 0xe38ab03df0d4eedcULL, 0xa6b087fab9ab9432ULL, }, + { 0x9b8bc7cd79738e5aULL, 0x1099960abd7ff844ULL, }, + { 0x2a9e79f404df0445ULL, 0x8a1a574d141add54ULL, }, + { 0x1323c575df66a395ULL, 0x4d70aaa974eb601eULL, }, /* 88 */ + { 0xbc9ea974b0ce57aeULL, 0x3dff93a625e35e6cULL, }, + { 0xbd4cca940103a7a6ULL, 0x1b03e192077feba2ULL, }, + { 0x69e12c9b9ff2608eULL, 0x0713d9101835bf32ULL, }, + { 0x183a0715853e498aULL, 0xeced28ff102b04faULL, }, + { 0xd806808efcdcfa1bULL, 0xda07aee4d9a29bfcULL, }, + { 0x8f0ceb4c5a20614fULL, 0x2693974265c37330ULL, }, + { 0x2f219f4eacacaf61ULL, 0xcde749de29866580ULL, }, + { 0xfac6c540b5ec9bf9ULL, 0x67fa3d30bf85f9fcULL, }, /* 96 */ + { 0x58719a8af58d41b9ULL, 0x8af69bdae8797a8cULL, }, + { 0x0293ed8dc2154481ULL, 0x7aef92fa834de3f0ULL, }, + { 0xe296644d91f354e5ULL, 0xd4332e315ac37ee4ULL, }, + { 0xd78a5344aa8ce0f6ULL, 0xbcf1bf88825a127aULL, }, + { 0xcfe6e77bd50e6bfaULL, 0xa42046c9a6110292ULL, }, + { 0xc2e4e16ef7883199ULL, 0x8a2eb57c71a6b370ULL, }, + { 0xb83af7ab54b68847ULL, 0x7682eb14d9902e98ULL, }, + { 0xfeb58099fb6e2639ULL, 0xd298a4d4f4eef1ccULL, }, /* 104 */ + { 0x9cbae3e8d8c9b31fULL, 0x0e0c2c1a33a56ab0ULL, }, + { 0x95dc4a7a980a468fULL, 0xe95439aa32919b0aULL, }, + { 0xc29c82993429f90bULL, 0xa33308195e2c1fecULL, }, + { 0x5a0a569e52e5f3acULL, 0x0a72368b53acb754ULL, }, + { 0x140968eb707c3bbeULL, 0xcd5491c571071d8cULL, }, + { 0xe1db913744288b2bULL, 0x10c008b6922667d4ULL, }, + { 0x65b190239a38c686ULL, 0xa6d4ec5b01d651c4ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_h= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_h.c new file mode 100644 index 0000000..741c887 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_U.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_U.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x03fe03fe03fe03feULL, 0x03fe03fe03fe03feULL, }, /* 0 */ + { 0x03fe03fe03fe03feULL, 0x03fe03fe03fe03feULL, }, + { 0xb152b152b152b152ULL, 0xb152b152b152b152ULL, }, + { 0x07fc07fc07fc07fcULL, 0x07fc07fc07fc07fcULL, }, + { 0x7194719471947194ULL, 0x7194719471947194ULL, }, + { 0x0bfa0bfa0bfa0bfaULL, 0x0bfa0bfa0bfa0bfaULL, }, + { 0x9c6bf21546c09c6bULL, 0xf21546c09c6bf215ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, /* 8 */ + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0x0ff80ff80ff80ff8ULL, 0x0ff80ff80ff80ff8ULL, }, + { 0xbd4cbd4cbd4cbd4cULL, 0xbd4cbd4cbd4cbd4cULL, }, /* 16 */ + { 0xbd4cbd4cbd4cbd4cULL, 0xbd4cbd4cbd4cbd4cULL, }, + { 0xdb84db84db84db84ULL, 0xdb84db84db84db84ULL, }, + { 0x6aa06aa06aa06aa0ULL, 0x6aa06aa06aa06aa0ULL, }, + { 0x5bb05bb05bb05bb0ULL, 0x5bb05bb05bb05bb0ULL, }, + { 0x17f417f417f417f4ULL, 0x17f417f417f417f4ULL, }, + { 0x22ea5c06947822eaULL, 0x5c06947822ea5c06ULL, }, + { 0xc548c548c548c548ULL, 0xc548c548c548c548ULL, }, + { 0x1bf21bf21bf21bf2ULL, 0x1bf21bf21bf21bf2ULL, }, /* 24 */ + { 0x1bf21bf21bf21bf2ULL, 0x1bf21bf21bf21bf2ULL, }, + { 0xab0eab0eab0eab0eULL, 0xab0eab0eab0eab0eULL, }, + { 0x729c729c729c729cULL, 0x729c729c729c729cULL, }, + { 0xeb24eb24eb24eb24ULL, 0xeb24eb24eb24eb24ULL, }, + { 0xc946c946c946c946ULL, 0xc946c946c946c946ULL, }, + { 0x4ec16b4f87884ec1ULL, 0x6b4f87884ec16b4fULL, }, + { 0x1ff01ff01ff01ff0ULL, 0x1ff01ff01ff01ff0ULL, }, + { 0x8988898889888988ULL, 0x8988898889888988ULL, }, /* 32 */ + { 0x8988898889888988ULL, 0x8988898889888988ULL, }, + { 0x7a987a987a987a98ULL, 0x7a987a987a987a98ULL, }, + { 0xf320f320f320f320ULL, 0xf320f320f320f320ULL, }, + { 0xae00ae00ae00ae00ULL, 0xae00ae00ae00ae00ULL, }, + { 0x5cb85cb85cb85cb8ULL, 0x5cb85cb85cb85cb8ULL, }, + { 0x36ac7b34bef036acULL, 0x7b34bef036ac7b34ULL, }, + { 0xc650c650c650c650ULL, 0xc650c650c650c650ULL, }, + { 0x60b660b660b660b6ULL, 0x60b660b660b660b6ULL, }, /* 40 */ + { 0x60b660b660b660b6ULL, 0x60b660b660b660b6ULL, }, + { 0x1cfa1cfa1cfa1cfaULL, 0x1cfa1cfa1cfa1cfaULL, }, + { 0xfb1cfb1cfb1cfb1cULL, 0xfb1cfb1cfb1cfb1cULL, }, + { 0xa9d4a9d4a9d4a9d4ULL, 0xa9d4a9d4a9d4a9d4ULL, }, + { 0x9582958295829582ULL, 0x9582958295829582ULL, }, + { 0x4bff5d216e104bffULL, 0x5d216e104bff5d21ULL, }, + { 0x2fe82fe82fe82fe8ULL, 0x2fe82fe82fe82fe8ULL, }, + { 0xc05916036aaec059ULL, 0x16036aaec0591603ULL, }, /* 48 */ + { 0xc05916036aaec059ULL, 0x16036aaec0591603ULL, }, + { 0xcb4f5a15e732cb4fULL, 0x5a15e732cb4f5a15ULL, }, + { 0x50cafc1ea57450caULL, 0xfc1ea57450cafc1eULL, }, + { 0x2abe1a9a07ac2abeULL, 0x1a9a07ac2abe1a9aULL, }, + { 0xe13be239e03ae13bULL, 0xe239e03ae13be239ULL, }, + { 0xc92e0cb08536c92eULL, 0x0cb08536c92e0cb0ULL, }, + { 0x71acc8541b0071acULL, 0xc8541b0071acc854ULL, }, + { 0xe539e637e438e539ULL, 0xe637e438e539e637ULL, }, /* 56 */ + { 0xe539e637e438e539ULL, 0xe637e438e539e637ULL, }, + { 0x87974f7915088797ULL, 0x4f79150887974f79ULL, }, + { 0x58c6041aad7058c6ULL, 0x041aad7058c6041aULL, }, + { 0xe86a4f36b4d0e86aULL, 0x4f36b4d0e86a4f36ULL, }, + { 0xcc5321fd76a8cc53ULL, 0x21fd76a8cc5321fdULL, }, + { 0x74d1dda10c7274d1ULL, 0xdda10c7274d1dda1ULL, }, + { 0x3fe03fe03fe03fe0ULL, 0x3fe03fe03fe03fe0ULL, }, + { 0xcbbcceac141c13a7ULL, 0x00761ce308c3c650ULL, }, /* 64 */ + { 0xf7b87fc8cfcecf94ULL, 0x97cf0b4ed5a88220ULL, }, + { 0x77145bfc63a8816dULL, 0x357aa52a175567c0ULL, }, + { 0x1ade0adc423622e3ULL, 0xab3450024ff1c4e0ULL, }, + { 0x46dabbf8fde8ded0ULL, 0x428d3e6d1cd680b0ULL, }, + { 0xc3bd95af925643dfULL, 0x52f8b3300b9c6e5cULL, }, + { 0xd84d53f1e3d4d3d2ULL, 0x7fd208a8f3004ed2ULL, }, + { 0x2fdb362aab6b21b4ULL, 0x8d618f60d4e568eeULL, }, + { 0xaf37125e3f45d38dULL, 0x2b0c293c16924e8eULL, }, /* 72 */ + { 0xc3c7d0a090c36380ULL, 0x57e67eb4fdf62f04ULL, }, + { 0x3093e97863b1d807ULL, 0x9bb5e78f8484281bULL, }, + { 0xc98da762f8243651ULL, 0xbae2a737088bfaf1ULL, }, + { 0x6d575642d6b2d7c7ULL, 0x309c520f41275811ULL, }, + { 0xc4e5387b9e4925a9ULL, 0x3e2bd8c7230c722dULL, }, + { 0x5ddff66532bc83f3ULL, 0x5d58986fa7134503ULL, }, + { 0x147edd5806d7a4abULL, 0x2cce99ef267e197fULL, }, + { 0xd5b2d0aab3994377ULL, 0xcd083b9ac440025bULL, }, /* 80 */ + { 0x80bf8eec25e70baaULL, 0xb6e600dda46ca823ULL, }, + { 0xe79991b05061b0b1ULL, 0xd91c24ba24bc8d1fULL, }, + { 0x5352504a2070df63ULL, 0x473b74aadc80fd45ULL, }, + { 0x0546cd72f0907c98ULL, 0x1ab13142c4b84c19ULL, }, + { 0xcc6ba15c55b01774ULL, 0x6e1606c3875c1b25ULL, }, + { 0x1dbdf6d689f3d0f7ULL, 0x4ac43fe21dbb145aULL, }, + { 0xd6baa1542922ce15ULL, 0x697e5fbada60ca72ULL, }, + { 0x1806cdbe15b6846fULL, 0x18091759d3f43a3aULL, }, /* 88 */ + { 0xfc0a8444a6e31a5bULL, 0x0daafd828699ee8eULL, }, + { 0x4f36fd647760debdULL, 0x7c3fb8561364c110ULL, }, + { 0x1bfcc992394ee12bULL, 0xfca40e06ed110caeULL, }, + { 0xa54ca0a4128a8bb6ULL, 0x70d40b38f9c0fc46ULL, }, + { 0xcb1d6138bde219f9ULL, 0x9c68fd7fb61366a6ULL, }, + { 0x3887fa1a7e8f8fe6ULL, 0x2ce4bb5039504af0ULL, }, + { 0xf65edccc34eccb94ULL, 0x3e041478ff0f739cULL, }, + { 0x4cc27494d274632dULL, 0x2a3ee78cfad81d3cULL, }, /* 96 */ + { 0xd40e966c853c370eULL, 0x04feaa379b04067cULL, }, + { 0x5da2b998597c214bULL, 0x9da08eb7ff4efc8cULL, }, + { 0xe9269a421c1c0396ULL, 0x2f41456bdcd248bcULL, }, + { 0xe87f80bc039cfc91ULL, 0xed3c08269718789cULL, }, + { 0xa6c53808a9213425ULL, 0xa2aefe7284cdb89cULL, }, + { 0x71cd34f063590a91ULL, 0xef6839544786e41cULL, }, + { 0x6adcd8201277fe43ULL, 0x7a42072920b97f84ULL, }, + { 0xd64c3010a53c52d9ULL, 0x2ffcd8e8ec4662d9ULL, }, /* 104 */ + { 0x2bcc04d0fd7bb9d3ULL, 0x54334ac042e043bbULL, }, + { 0xc73077f8e331ebe0ULL, 0x1c5f5244f12a2b70ULL, }, + { 0x309c82661787fc47ULL, 0xc7f3cf1c49211c79ULL, }, + { 0xeb78588cf53e082dULL, 0x75954984106eb821ULL, }, + { 0x5fa026e08f6af367ULL, 0xa8dfb35ce9820111ULL, }, + { 0x04b0e03c469efd7fULL, 0x7a6806a42e2df58fULL, }, + { 0xcca0baf00eacf773ULL, 0xd54e79140435c3e5ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_w= .c b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_w.c new file mode 100644 index 0000000..3e1b711 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dpsub_u_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction DPSUB_U.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Dot Product"; + char *instruction_name =3D "DPSUB_U.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0003fffe0003fffeULL, 0x0003fffe0003fffeULL, }, /* 0 */ + { 0x0003fffe0003fffeULL, 0x0003fffe0003fffeULL, }, + { 0xaab15552aab15552ULL, 0xaab15552aab15552ULL, }, + { 0x0007fffc0007fffcULL, 0x0007fffc0007fffcULL, }, + { 0x6671999466719994ULL, 0x6671999466719994ULL, }, + { 0x000bfffa000bfffaULL, 0x000bfffa000bfffaULL, }, + { 0xe39c1c6b8e4771c0ULL, 0x38f1c715e39c1c6bULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, /* 8 */ + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0x000ffff8000ffff8ULL, 0x000ffff8000ffff8ULL, }, + { 0xaabd554caabd554cULL, 0xaabd554caabd554cULL, }, /* 16 */ + { 0xaabd554caabd554cULL, 0xaabd554caabd554cULL, }, + { 0xc730e384c730e384ULL, 0xc730e384c730e384ULL, }, + { 0x556aaaa0556aaaa0ULL, 0x556aaaa0556aaaa0ULL, }, + { 0x445bbbb0445bbbb0ULL, 0x445bbbb0445bbbb0ULL, }, + { 0x0017fff40017fff4ULL, 0x0017fff40017fff4ULL, }, + { 0x427812ea0994f678ULL, 0x7b5bda06427812eaULL, }, + { 0xaac55548aac55548ULL, 0xaac55548aac55548ULL, }, + { 0x001bfff2001bfff2ULL, 0x001bfff2001bfff2ULL, }, /* 24 */ + { 0x001bfff2001bfff2ULL, 0x001bfff2001bfff2ULL, }, + { 0x8e55c70e8e55c70eULL, 0x8e55c70e8e55c70eULL, }, + { 0x5572aa9c5572aa9cULL, 0x5572aa9c5572aa9cULL, }, + { 0xcceb3324cceb3324ULL, 0xcceb3324cceb3324ULL, }, + { 0xaac95546aac95546ULL, 0xaac95546aac95546ULL, }, + { 0x4bf95ec12f87d088ULL, 0x686b424f4bf95ec1ULL, }, + { 0x001ffff0001ffff0ULL, 0x001ffff0001ffff0ULL, }, + { 0x6689998866899988ULL, 0x6689998866899988ULL, }, /* 32 */ + { 0x6689998866899988ULL, 0x6689998866899988ULL, }, + { 0x557aaa98557aaa98ULL, 0x557aaa98557aaa98ULL, }, + { 0xccf33320ccf33320ULL, 0xccf33320ccf33320ULL, }, + { 0x8547ae008547ae00ULL, 0x8547ae008547ae00ULL, }, + { 0x335cccb8335cccb8ULL, 0x335cccb8335cccb8ULL, }, + { 0x4fd016ac0b8c5af0ULL, 0x94149f344fd016acULL, }, + { 0x99c6665099c66650ULL, 0x99c6665099c66650ULL, }, + { 0x3360ccb63360ccb6ULL, 0x3360ccb63360ccb6ULL, }, /* 40 */ + { 0x3360ccb63360ccb6ULL, 0x3360ccb63360ccb6ULL, }, + { 0xef1d10faef1d10faULL, 0xef1d10faef1d10faULL, }, + { 0xccfb331cccfb331cULL, 0xccfb331cccfb331cULL, }, + { 0x7b1051d47b1051d4ULL, 0x7b1051d47b1051d4ULL, }, + { 0x6695998266959982ULL, 0x6695998266959982ULL, }, + { 0x2db26bff1ca17d10ULL, 0x3ec38e212db26bffULL, }, + { 0x002fffe8002fffe8ULL, 0x002fffe8002fffe8ULL, }, + { 0xe3c01c598e6b71aeULL, 0x3915c703e3c01c59ULL, }, /* 48 */ + { 0xe3c01c598e6b71aeULL, 0x3915c703e3c01c59ULL, }, + { 0x26202f4f97e86832ULL, 0xb459a11526202f4fULL, }, + { 0xc75038ca1ca6e374ULL, 0x71fb8e1ec75038caULL, }, + { 0xe3c382bef4d671acULL, 0xd2b3609ae3c382beULL, }, + { 0xaae0553baae2553aULL, 0xaae15539aae0553bULL, }, + { 0xd3f7192e919b0636ULL, 0x4f3b0fb0d3f7192eULL, }, + { 0x8e7071ac391dc700ULL, 0xe3c71c548e7071acULL, }, + { 0xaae45539aae65538ULL, 0xaae55537aae45539ULL, }, /* 56 */ + { 0xaae45539aae65538ULL, 0xaae55537aae45539ULL, }, + { 0x133197974c16b408ULL, 0xda4ed07913319797ULL, }, + { 0xc75838c61caee370ULL, 0x72038e1ac75838c6ULL, }, + { 0x114e886aaae8eed0ULL, 0x77b55536114e886aULL, }, + { 0xe3cc1c538e7771a8ULL, 0x3921c6fde3cc1c53ULL, }, + { 0x9e4574d135fa3272ULL, 0xcdadd3a19e4574d1ULL, }, + { 0x003fffe0003fffe0ULL, 0x003fffe0003fffe0ULL, }, + { 0xe77c016cdd7daa5cULL, 0xe98945eb8a373037ULL, }, /* 64 */ + { 0x60fd93dc8ef99616ULL, 0xdba475fe3c075522ULL, }, + { 0x67ae7b204335bcd8ULL, 0xc7121f747860f089ULL, }, + { 0x17bb0f0ee8fd8c96ULL, 0x972fe12d34478253ULL, }, + { 0x913ca17e9a797850ULL, 0x894b1140e617a73eULL, }, + { 0x99ae5a31e83a45a7ULL, 0xff24684bc96dd9adULL, }, + { 0xefeea5a7437774caULL, 0x6ac04bfdaf344b68ULL, }, + { 0x8175363e76faed37ULL, 0xfc38b88657b1e4aaULL, }, + { 0x88261d822b3713f9ULL, 0xe7a661fc940b8011ULL, }, /* 72 */ + { 0xde6668f88674431cULL, 0x534245ae79d1f1ccULL, }, + { 0xf331d070b3932dbbULL, 0xb25f4d6d0200af03ULL, }, + { 0x985e1b88f3e41a1cULL, 0x31e873ed7002566dULL, }, + { 0x486aaf7699abe9daULL, 0x020635a62be8e837ULL, }, + { 0xd9f1400dcd2f6247ULL, 0x937ea22fd4668179ULL, }, + { 0x7f1d8b250d804ea8ULL, 0x1307c8af426828e3ULL, }, + { 0x4be6ff9b22ca7983ULL, 0x7b2e358e09e10fdfULL, }, + { 0x3d0470dbf4d6b86fULL, 0x548567e8f5250450ULL, }, /* 80 */ + { 0x00d897321b41b715ULL, 0x02517c05df66c875ULL, }, + { 0x991ec80ea3b5c306ULL, 0xa18dc9b22cff8e2fULL, }, + { 0x44850796bb133f8dULL, 0xdc2a4cc591614211ULL, }, + { 0x192b30fc8866f607ULL, 0x97e8c289d36e61aaULL, }, + { 0x0058689e9fcad43dULL, 0xfe7a0cc7a239bc40ULL, }, + { 0xb8bc4cc2b8296867ULL, 0xccf01b9e1a7e74adULL, }, + { 0x61014864181c5d2cULL, 0x4c8bc05ea1b0cc11ULL, }, + { 0xec0d0e4af547db74ULL, 0x2d758eed74a13bb5ULL, }, /* 88 */ + { 0x03e797060056a10fULL, 0xc1a1d5f8579892eaULL, }, + { 0x9a3ca5d4a8548905ULL, 0xfd2bfd1807c0081aULL, }, + { 0x4820b48cf1454f6bULL, 0xe982ac5dfb74445aULL, }, + { 0x7eec2fbcb0c3c941ULL, 0x9d1459e9d27d4766ULL, }, + { 0x020a22e0debbd140ULL, 0x4fbb0ef3a9e0453bULL, }, + { 0xe8df4a9ccb0c350bULL, 0x37b3761e2e442cffULL, }, + { 0x7c3604df51731065ULL, 0xd9add64be7d81e17ULL, }, + { 0x35a1aacf3f24481fULL, 0x900caa26ecaf303bULL, }, /* 96 */ + { 0x7f0fd7311d2a2997ULL, 0x5e11155ee03d0362ULL, }, + { 0x7959c1ef0ab6e6c3ULL, 0x41695f03ff01377bULL, }, + { 0x89d8f6a1bc2ded57ULL, 0x29ed46aadb5c8a3cULL, }, + { 0x01ec800ecaa24ac8ULL, 0xf32ccdbb9c58b788ULL, }, + { 0xffd7297c53176782ULL, 0x4acc984953e0cc00ULL, }, + { 0x04316ff6e9707c3dULL, 0xd5f54b0b0ac9f7e0ULL, }, + { 0xffe6fc76421c7405ULL, 0x8f42f98ab98b12e9ULL, }, + { 0xa75ea33ed2e809e1ULL, 0xb6fdbf643abee85cULL, }, /* 104 */ + { 0xc75019063471bcc9ULL, 0x05bcd250f1d0ad42ULL, }, + { 0x300d94eaa78224eaULL, 0x615cfa00370a0c2aULL, }, + { 0xaa1a04f419d03dccULL, 0x8fe0ca60107a1a34ULL, }, + { 0x5f0bb18ad9b000d4ULL, 0xd3ed3780ee630840ULL, }, + { 0x25e24aa388dc4d8cULL, 0x40c1586349788fbaULL, }, + { 0x0ec344de11f41ac8ULL, 0xed9aea2a99a95e8aULL, }, + { 0x02499bebf3ac5a24ULL, 0xecb186c0e06045b8ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + = j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j= ]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_DPSUB_U_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh b/tests/tcg/mi= ps/user/ase/msa/test_msa_compile.sh index 8ef836d..16920e8 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile.sh @@ -294,6 +294,30 @@ -EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_w /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_d.c = \ -EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_d +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_h +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_w +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_d +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_h +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_w +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_d +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_h +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_w +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_d +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_h +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_w +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_d =20 # # Int Max Min diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run.sh b/tests/tcg/mips/u= ser/ase/msa/test_msa_run.sh index b6785e3..181f67d 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_run.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_run.sh @@ -173,6 +173,18 @@ $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d =20 # # Int Max Min --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550374; cv=none; d=zoho.com; s=zohoarc; b=mmMqXs3+5EhpDnzgZpDVwYCP992ARcdpdzlFO3kIsmQ1V9H4lBolGhTv8Krw+XkoxbP7FzvUOovVMFfHF2n8CkxTYLJ912shKTFgWjtQtdiVJwmAX1z4F7AmJ2cGpbfnRxK2MXmsS9Xye6ordaoPvBj6M+gUYOHMMiPqDXz/4e0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550374; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=cVOUNS0iTukETWAVO1ggiJs09upkjOgr7CtHUfm+PI0=; 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(Exim 4.71) (envelope-from ) id 1hg6NQ-0006Mt-6j for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:22 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60779 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NP-0005u1-GR for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 7FE021A46B3; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 2821F1A2276; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:46 +0200 Message-Id: <1561549550-3501-14-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 13/17] tests/tcg: target/mips: Amend tests for MSA int multiply instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Amend tests for MSA int multiply instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-5-git-send-email-aleksandar.markovic@rt-rk.co= m> --- tests/tcg/mips/include/wrappers_msa.h | 16 ++ .../user/ase/msa/int-multiply/test_msa_maddv_b.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_maddv_d.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_maddv_h.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_maddv_w.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_msubv_b.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_msubv_d.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_msubv_h.c | 214 +++++++++++++++++= ++++ .../user/ase/msa/int-multiply/test_msa_msubv_w.c | 214 +++++++++++++++++= ++++ tests/tcg/mips/user/ase/msa/test_msa_compile.sh | 16 ++ 10 files changed, 1744 insertions(+) create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv= _b.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv= _d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv= _h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv= _w.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv= _b.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv= _d.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv= _h.c create mode 100644 tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv= _w.c diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index cfb3b8b..b512b1d 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -512,14 +512,30 @@ DO_MSA__WD__WS_WT(MOD_U_D, mod_u.d) */ =20 DO_MSA__WD__WS_WT(MADDV_B, maddv.b) +DO_MSA__WD__WD_WT(MADDV_B__DDT, maddv.b) +DO_MSA__WD__WS_WD(MADDV_B__DSD, maddv.b) DO_MSA__WD__WS_WT(MADDV_H, maddv.h) +DO_MSA__WD__WD_WT(MADDV_H__DDT, maddv.h) +DO_MSA__WD__WS_WD(MADDV_H__DSD, maddv.h) DO_MSA__WD__WS_WT(MADDV_W, maddv.w) +DO_MSA__WD__WD_WT(MADDV_W__DDT, maddv.w) +DO_MSA__WD__WS_WD(MADDV_W__DSD, maddv.w) DO_MSA__WD__WS_WT(MADDV_D, maddv.d) +DO_MSA__WD__WD_WT(MADDV_D__DDT, maddv.d) +DO_MSA__WD__WS_WD(MADDV_D__DSD, maddv.d) =20 DO_MSA__WD__WS_WT(MSUBV_B, msubv.b) +DO_MSA__WD__WD_WT(MSUBV_B__DDT, msubv.b) +DO_MSA__WD__WS_WD(MSUBV_B__DSD, msubv.b) DO_MSA__WD__WS_WT(MSUBV_H, msubv.h) +DO_MSA__WD__WD_WT(MSUBV_H__DDT, msubv.h) +DO_MSA__WD__WS_WD(MSUBV_H__DSD, msubv.h) DO_MSA__WD__WS_WT(MSUBV_W, msubv.w) +DO_MSA__WD__WD_WT(MSUBV_W__DDT, msubv.w) +DO_MSA__WD__WS_WD(MSUBV_W__DSD, msubv.w) DO_MSA__WD__WS_WT(MSUBV_D, msubv.d) +DO_MSA__WD__WD_WT(MSUBV_D__DDT, msubv.d) +DO_MSA__WD__WS_WD(MSUBV_D__DSD, msubv.d) =20 DO_MSA__WD__WS_WT(MULV_B, mulv.b) DO_MSA__WD__WS_WT(MULV_H, mulv.h) diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_b.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_b.c new file mode 100644 index 0000000..5678677 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_b.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MADDV.B + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MADDV.B"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_B(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_B(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_B__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_B__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_d.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_d.c new file mode 100644 index 0000000..965703c --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MADDV.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MADDV.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_h.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_h.c new file mode 100644 index 0000000..ad20f01 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MADDV.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MADDV.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_w.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_w.c new file mode 100644 index 0000000..09f01d3 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_maddv_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MADDV.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MADDV.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MADDV_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_b.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_b.c new file mode 100644 index 0000000..b68b57f --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_b.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MSUBV.B + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MSUBV.B"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_B(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_B(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_B__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_B__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_d.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_d.c new file mode 100644 index 0000000..5a0549a --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_d.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MSUBV.D + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MSUBV.D"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_D(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_D(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_D__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_D__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_h.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_h.c new file mode 100644 index 0000000..17bccc8 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_h.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MSUBV.H + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MSUBV.H"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_H(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_H(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_H__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_H__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_w.c b/= tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_w.c new file mode 100644 index 0000000..171b717 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/int-multiply/test_msa_msubv_w.c @@ -0,0 +1,214 @@ +/* + * Test program for MSA instruction MSUBV.W + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + *` + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_msa.h" +#include "../../../../include/test_inputs_128.h" +#include "../../../../include/test_utils_128.h" + +#define TEST_COUNT_TOTAL ( \ + (PATTERN_INPUTS_SHORT_COUNT) * (PATTERN_INPUTS_SHORT_COUNT) + \ + 3 * (RANDOM_INPUTS_SHORT_COUNT) * (RANDOM_INPUTS_SHORT_COUNT)) + + +int32_t main(void) +{ + char *isa_ase_name =3D "MSA"; + char *group_name =3D "Int Multiply"; + char *instruction_name =3D "MSUBV.W"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b128_result[TEST_COUNT_TOTAL][2]; + uint64_t b128_expect[TEST_COUNT_TOTAL][2] =3D { + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, /* 0 */ + { 0x0000000000000002ULL, 0x0000000000000002ULL, }, + { 0x00000000aaaaaaaeULL, 0x00000000aaaaaaaeULL, }, + { 0x0000000000000004ULL, 0x0000000000000004ULL, }, + { 0x000000006666666cULL, 0x000000006666666cULL, }, + { 0x0000000000000006ULL, 0x0000000000000006ULL, }, + { 0x000000008e38e395ULL, 0xffffffffe38e38ebULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, /* 8 */ + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x0000000000000008ULL, 0x0000000000000008ULL, }, + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, /* 16 */ + { 0x00000000aaaaaab4ULL, 0x00000000aaaaaab4ULL, }, + { 0x38e38e3a71c71c7cULL, 0x38e38e3a71c71c7cULL, }, + { 0x0000000155555560ULL, 0x0000000155555560ULL, }, + { 0x2222222444444450ULL, 0x2222222444444450ULL, }, + { 0x000000020000000cULL, 0x000000020000000cULL, }, + { 0x2f684bdcb425ed16ULL, 0xf684bda397b425faULL, }, + { 0x00000002aaaaaab8ULL, 0x00000002aaaaaab8ULL, }, + { 0x000000020000000eULL, 0x000000020000000eULL, }, /* 24 */ + { 0x000000020000000eULL, 0x000000020000000eULL, }, + { 0xc71c71c8e38e38f2ULL, 0xc71c71c8e38e38f2ULL, }, + { 0x0000000155555564ULL, 0x0000000155555564ULL, }, + { 0xdddddddeccccccdcULL, 0xdddddddeccccccdcULL, }, + { 0x00000000aaaaaabaULL, 0x00000000aaaaaabaULL, }, + { 0xd097b42684bda13fULL, 0x097b425ef684bdb1ULL, }, + { 0x0000000000000010ULL, 0x0000000000000010ULL, }, + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, /* 32 */ + { 0x0000000066666678ULL, 0x0000000066666678ULL, }, + { 0x2222222355555568ULL, 0x2222222355555568ULL, }, + { 0x00000000cccccce0ULL, 0x00000000cccccce0ULL, }, + { 0x147ae1491eb85200ULL, 0x147ae1491eb85200ULL, }, + { 0x0000000133333348ULL, 0x0000000133333348ULL, }, + { 0x1c71c71e3e93e954ULL, 0xfa4fa4fbb60b60ccULL, }, + { 0x00000001999999b0ULL, 0x00000001999999b0ULL, }, + { 0x000000013333334aULL, 0x000000013333334aULL, }, /* 40 */ + { 0x000000013333334aULL, 0x000000013333334aULL, }, + { 0xdddddddeeeeeef06ULL, 0xdddddddeeeeeef06ULL, }, + { 0x00000000cccccce4ULL, 0x00000000cccccce4ULL, }, + { 0xeb851eb8e147ae2cULL, 0xeb851eb8e147ae2cULL, }, + { 0x000000006666667eULL, 0x000000006666667eULL, }, + { 0xe38e38e3e93e9401ULL, 0x05b05b05c71c71dfULL, }, + { 0x0000000000000018ULL, 0x0000000000000018ULL, }, + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, /* 48 */ + { 0x000000008e38e3a7ULL, 0xffffffffe38e38fdULL, }, + { 0x2f684bdb425ed0b1ULL, 0xf684bda17b425eebULL, }, + { 0x000000011c71c736ULL, 0xffffffffc71c71e2ULL, }, + { 0x1c71c71e27d27d42ULL, 0xfa4fa4fa49f49f66ULL, }, + { 0x00000001aaaaaac5ULL, 0xffffffffaaaaaac7ULL, }, + { 0x35ba781b4587e6d2ULL, 0x0fcd6e9d6b74f050ULL, }, + { 0x0000000238e38e54ULL, 0xffffffff8e38e3acULL, }, + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, /* 56 */ + { 0x00000001aaaaaac7ULL, 0xffffffffaaaaaac9ULL, }, + { 0xd097b427a12f6869ULL, 0x097b425ebda12f87ULL, }, + { 0x000000011c71c73aULL, 0xffffffffc71c71e6ULL, }, + { 0xe38e38e477777796ULL, 0x05b05b05aaaaaacaULL, }, + { 0x000000008e38e3adULL, 0xffffffffe38e3903ULL, }, + { 0xca4587e781948b2fULL, 0xf032916206522c5fULL, }, + { 0x0000000000000020ULL, 0x0000000000000020ULL, }, + { 0x3e3ad4ae1266c2b0ULL, 0x1637d725aebdb734ULL, }, /* 64 */ + { 0x4c74e0d60a3d6d94ULL, 0x1badd2dd9f4dac90ULL, }, + { 0x6874e8f94205b90cULL, 0x27eb0c41af2c3022ULL, }, + { 0x42dab657e16f25e8ULL, 0x06d6782e137656f2ULL, }, + { 0x5114c27fd945d0ccULL, 0x0c4c73e604064c4eULL, }, + { 0x68a91e898c276755ULL, 0x0f77ad378bdfb302ULL, }, + { 0x54c82cde41d1cf13ULL, 0x0b6108a5f38e1598ULL, }, + { 0x6f755d3eddd1234aULL, 0xfbbaace2f5421908ULL, }, + { 0x8b75656215996ec2ULL, 0x07f7e64705209c9aULL, }, /* 72 */ + { 0x779473b6cb43d680ULL, 0x03e141b56cceff30ULL, }, + { 0xa6279a1866fb9f64ULL, 0x2631668db9e53ac1ULL, }, + { 0x67a1f71bd99e4586ULL, 0x312ec9f6206e6e69ULL, }, + { 0x4207c47a7907b262ULL, 0x101a35e284b89539ULL, }, + { 0x5cb4f4db15070699ULL, 0x0073da1f866c98a9ULL, }, + { 0x1e2f51de87a9acbbULL, 0x0b713d87ecf5cc51ULL, }, + { 0x721d49ba5f0acfa8ULL, 0x5ba5bbe9afeae691ULL, }, + { 0x4bcd68690d995de0ULL, 0x771da6b4b6c967ebULL, }, /* 80 */ + { 0x4ea9a2cfbb5acd7bULL, 0x79dd6a73439e6387ULL, }, + { 0x47c800b999dd2371ULL, 0x766d25914ef7a7a0ULL, }, + { 0x41b0fa10eb77cf84ULL, 0x26e85189458965f8ULL, }, + { 0x1fc448ce062c2944ULL, 0x31f490a9422a80e6ULL, }, + { 0x211bdfadfd79770eULL, 0x3b25f4cac5763378ULL, }, + { 0x16fbb87edd87b6f0ULL, 0x57c0b65fabdda20eULL, }, + { 0x14621091eac4a5f6ULL, 0x4d29a25d32fa9ef6ULL, }, + { 0x07832ded1c464b02ULL, 0x6396905709e3cfa4ULL, }, /* 88 */ + { 0x0ff4a84eab8df3b9ULL, 0x6bc9a7d8c6adf2eaULL, }, + { 0x21e53326bfbd0b05ULL, 0x8f8f3b9c679dff5aULL, }, + { 0x191ed6a24e1576f9ULL, 0x9e8c2e402760373aULL, }, + { 0x19b438400fc27751ULL, 0x819c4bbfd3ee6972ULL, }, + { 0x1e0d5dc1094ae999ULL, 0x7496a289f5eff010ULL, }, + { 0x11af620b7bc03943ULL, 0x8a11f229836addc7ULL, }, + { 0x46fa45d0e84440fcULL, 0xe8d2c0211fb042bfULL, }, + { 0x22142516b5a8adbcULL, 0xe1cf1923e186aad1ULL, }, /* 96 */ + { 0x066ebbbb4ff6da44ULL, 0xd918d7e6a7e61877ULL, }, + { 0x100acc9d22839a48ULL, 0xce291932929e367fULL, }, + { 0x0dfe419d62a62f64ULL, 0xc020fe45a8cf7acfULL, }, + { 0x2ba79b6ffbf3c63bULL, 0xb428f52c49fce695ULL, }, + { 0x29b3b85200bdf100ULL, 0xb4ae7ea2f52aa5b9ULL, }, + { 0x293bb84d6360c0b6ULL, 0xae33b26e4c493c49ULL, }, + { 0x46a99fdf54f4862dULL, 0xae790dc5055f6f51ULL, }, + { 0x18480e0fd728c7c3ULL, 0xa000ad7b15f8ebe0ULL, }, /* 104 */ + { 0x1b8b97aa205e1239ULL, 0x89c78b8909c4a8e5ULL, }, + { 0x09abb26b05ef649dULL, 0x74242fa1bd49e740ULL, }, + { 0x04e233bc861d272bULL, 0x9c5343ab30f62f9fULL, }, + { 0xda2da0d0884dc3d1ULL, 0xb824f201640b4147ULL, }, + { 0x9d8b22ee1b9a2e0fULL, 0xb642ddf1edb0747fULL, }, + { 0x7c81956533686a37ULL, 0xdd5181781dc3ad37ULL, }, + { 0xc60b1905717ff25aULL, 0xe2af726e71ad7ad7ULL, }, + }; + + reset_msa_registers(); + + gettimeofday(&start, NULL); + + for (i =3D 0; i < PATTERN_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < PATTERN_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_W(b128_pattern[i], b128_pattern[j], + b128_result[PATTERN_INPUTS_SHORT_COUNT * i + j]= ); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_W(b128_random[i], b128_random[j], + b128_result[((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_W__DDT(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + ((RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + for (i =3D 0; i < RANDOM_INPUTS_SHORT_COUNT; i++) { + for (j =3D 0; j < RANDOM_INPUTS_SHORT_COUNT; j++) { + do_msa_MSUBV_W__DSD(b128_random[i], b128_random[j], + b128_result[ + ((PATTERN_INPUTS_SHORT_COUNT) * + (PATTERN_INPUTS_SHORT_COUNT)) + + (2 * (RANDOM_INPUTS_SHORT_COUNT) * + (RANDOM_INPUTS_SHORT_COUNT)) + + RANDOM_INPUTS_SHORT_COUNT * i + j]); + } + } + + gettimeofday(&end, NULL); + + elapsed_time =3D (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time +=3D (end.tv_usec - start.tv_usec) / 1000.0; + + ret =3D check_results_128(isa_ase_name, group_name, instruction_name, + TEST_COUNT_TOTAL, elapsed_time, + &b128_result[0][0], &b128_expect[0][0]); + + return ret; +} diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh b/tests/tcg/mi= ps/user/ase/msa/test_msa_compile.sh index 16920e8..d45ee4b 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile.sh @@ -397,6 +397,22 @@ # Int Multiply # ------------ # +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_b.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_b +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_h +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_w +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_d +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_b.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_b +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_h +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_w +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_d /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_b.c = \ -EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_b /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_h.c = \ --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550999; cv=none; d=zoho.com; s=zohoarc; b=CEkINmxI87OMmWOmqK2gU8KffQHSYgOZSGkLRwQLWQIcy5u+7vUSGVB/q5SdL1TpyYXl2T4hD/NkR7pBugZX2hDPOfGnJ+F0BsG7f5LK2+vNWCVcrTOErYUKJiZHxjzFURf9Xz7UcOlBd7cfVXQNthMU3x7U/gO6zRNHDm5rET0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550999; 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([2001:470:142:3::10]:43820) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6Nc-0001lf-CO for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NQ-0006Ns-It for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:23 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60784 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NP-0005uC-I6 for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8AF641A46A7; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3C7351A46A3; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:47 +0200 Message-Id: <1561549550-3501-15-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 14/17] tests/tcg: target/mips: Add support for MSA big-endian target testings X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add files for MSA big-endian target testings (copiling and running). Little-endian files are renamed and ammended too. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-6-git-send-email-aleksandar.markovic@rt-rk.co= m> --- .../mips/user/ase/msa/test_msa_compile_64r6eb.sh | 627 +++++++++++++++++= ++++ ...t_msa_compile.sh =3D> test_msa_compile_64r6el.sh} | 556 +++++++++------= --- tests/tcg/mips/user/ase/msa/test_msa_run.sh | 355 ------------ tests/tcg/mips/user/ase/msa/test_msa_run_64r6eb.sh | 363 ++++++++++++ tests/tcg/mips/user/ase/msa/test_msa_run_64r6el.sh | 363 ++++++++++++ 5 files changed, 1631 insertions(+), 633 deletions(-) create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_compile_64r6eb.sh rename tests/tcg/mips/user/ase/msa/{test_msa_compile.sh =3D> test_msa_comp= ile_64r6el.sh} (88%) delete mode 100755 tests/tcg/mips/user/ase/msa/test_msa_run.sh create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_run_64r6eb.sh create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_run_64r6el.sh diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile_64r6eb.sh b/tests= /tcg/mips/user/ase/msa/test_msa_compile_64r6eb.sh new file mode 100755 index 0000000..73adabb --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile_64r6eb.sh @@ -0,0 +1,627 @@ + +# +# Bit Count +# --------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_d_64= r6eb + +# +# Bit move +# -------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmnz_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmnz_v_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmz_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmz_v_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bsel_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bsel_v_6= 4r6eb + +# +# Bit Set +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_d_64= r6eb + +# +# Fixed Multiply +# -------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_w_= 64r6eb + +# +# Float Max Min +# ------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_a_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_a_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_a_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_a_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_d_64= r6eb + +# +# Int Add +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_d_= 64r6eb + +# +# Int Average +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_d_= 64r6eb + +# +# Int Compare +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_b_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_h_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_w_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_d_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_d_6= 4r6eb + +# +# Int Divide +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_d_6= 4r6eb + +# +# Int Dot Product +# --------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_h= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_w= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_d= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_h= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_w= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_d= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_h= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_w= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_d= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_h= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_w= _64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_d= _64r6eb + +# +# Int Max Min +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_d_6= 4r6eb + +# +# Int Modulo +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_d_6= 4r6eb + +# +# Int Multiply +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_d_64= r6eb + +# +# Int Subtract +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_b_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_h_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_w_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_d_= 64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= b_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= h_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= w_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= d_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= b_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= h_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= w_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= d_64r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_d_64= r6eb + +# +# Interleave +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_d_64= r6eb + +# +# Logic +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_and_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_and_v_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_nor_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nor_v_64r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_or_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_or_v_64r6= eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_xor_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_xor_v_64r= 6eb + +# +# Move +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc move/test_msa_move_v.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_move_v_64= r6eb + +# +# Pack +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_d_64= r6eb + +# +# Shift +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_d_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_b_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_h_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_w_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_d_64= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_b.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_b_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_h.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_h_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_w.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_w_6= 4r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_d.c = \ +-EB -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_d_6= 4r6eb diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh b/tests/tcg/mi= ps/user/ase/msa/test_msa_compile_64r6el.sh similarity index 88% rename from tests/tcg/mips/user/ase/msa/test_msa_compile.sh rename to tests/tcg/mips/user/ase/msa/test_msa_compile_64r6el.sh index d45ee4b..afe4311 100755 --- a/tests/tcg/mips/user/ase/msa/test_msa_compile.sh +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile_64r6el.sh @@ -4,624 +4,624 @@ # --------- # /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nloc_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nlzc_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pcnt_d_64= r6el =20 # # Bit move # -------- # /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsl_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_binsr_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmnz_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmnz_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmnz_v_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmz_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmz_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bmz_v_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bsel_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bsel_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bsel_v_6= 4r6el =20 # # Bit Set # ------- # /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bclr_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bneg_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_bset_d_64= r6el =20 # # Fixed Multiply # -------------- # -/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_h -/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_w -/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_h -/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_w +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_h_6= 4r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mul_q_w_6= 4r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_h.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_h_= 64r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulr_q_w_= 64r6el =20 # # Float Max Min # ------------- # -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_= w.c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fma= x_a_w -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_= d.c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fma= x_a_d -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_w.= c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fma= x_w -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_d.= c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fma= x_d -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_= w.c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmi= n_a_w -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_= d.c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmi= n_a_d -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_w.= c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmi= n_w -/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_d.= c \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmi= n_d +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_a_w_= 64r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_a_d_= 64r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_w_64= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmax_d_64= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_a_w_= 64r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_a_d_= 64r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_w.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_w_64= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_d.c = \ +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_fmin_d_64= r6el =20 # # Int Add # ------- # /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_add_a_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_a_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_adds_u_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_addv_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hadd_u_d_= 64r6el =20 # # Int Average # ----------- # /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ave_u_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_aver_u_d_= 64r6el =20 # # Int Compare # ----------- # /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_b_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_h_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_w_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ceq_d_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_cle_u_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_clt_u_d_6= 4r6el =20 # # Int Divide # ---------- # /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_div_u_d_6= 4r6el =20 # # Int Dot Product # --------------- # /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dotp_u_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_h= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_w= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_s_d= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_h= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_w= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpadd_u_d= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_h= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_w= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_s_d= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_h= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_w= _64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_dpsub_u_d= _64r6el =20 # # Int Max Min # ----------- # /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_a_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_max_u_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_a_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_min_u_d_6= 4r6el =20 # # Int Modulo # ---------- # /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_s_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mod_u_d_6= 4r6el =20 # # Int Multiply # ------------ # /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_maddv_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_msubv_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_mulv_d_64= r6el =20 # # Int Subtract # ------------ # /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_asub_u_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_hsub_u_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_s_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_b_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_h_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_w_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subs_u_d_= 64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= b_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= h_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= w_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsuu_s_= d_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= b_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= h_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= w_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subsus_u_= d_64r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_subv_d_64= r6el =20 # # Interleave # ---------- # /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvev_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvod_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvl_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_ilvr_d_64= r6el =20 # # Logic # ----- # /opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_and_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_and_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_and_v_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_nor_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nor_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_nor_v_64r= 6el /opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_or_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_or_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_or_v_64r6= el /opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_xor_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_xor_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_xor_v_64r= 6el =20 # # Move # ---- # /opt/img/bin/mips-img-linux-gnu-gcc move/test_msa_move_v.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_move_v +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_move_v_64= r6el =20 # # Pack # ---- # /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckev_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_pckod_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_vshf_d_64= r6el =20 # # Shift # ----- # /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sll_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_sra_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srar_d_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_b_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_h_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_w_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srl_d_64= r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_b.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_b +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_b_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_h.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_h +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_h_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_w.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_w +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_w_6= 4r6el /opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_d.c = \ --EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_d +-EL -static -mabi=3D64 -march=3Dmips64r6 -mmsa -o /tmp/test_msa_srlr_d_6= 4r6el diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run.sh b/tests/tcg/mips/u= ser/ase/msa/test_msa_run.sh deleted file mode 100755 index 181f67d..0000000 --- a/tests/tcg/mips/user/ase/msa/test_msa_run.sh +++ /dev/null @@ -1,355 +0,0 @@ -PATH_TO_QEMU=3D"../../../../../../mips64el-linux-user/qemu-mips64el" - - -# -# Bit Count -# --------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d - -# -# Bit move -# -------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v - -# -# Bit Set -# ------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_d - -# -# Fixed Multiply -# -------------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_w - -# -# Float Max Min -# ------------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_d - -# -# Int Add -# ------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_d - -# -# Int Average -# ----------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_d - -# -# Int Compare -# ----------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_d - -# -# Int Divide -# ---------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_d - -# -# Int Dot Product -# --------------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d - -# -# Int Max Min -# ----------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_d - -# -# Int Modulo -# ---------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_d - -# -# Int Multiply -# ------------ -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_d - -# -# Int Subtract -# ------------ -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_d - -# -# Interleave -# ---------- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_d - -# -# Logic -# ----- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_and_v -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nor_v -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v - -# -# Move -# ---- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v - -# -# Pack -# ---- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_d - -# -# Shift -# ----- -# -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_d -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_b -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_h -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_w -$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_d diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run_64r6eb.sh b/tests/tcg= /mips/user/ase/msa/test_msa_run_64r6eb.sh new file mode 100755 index 0000000..c127c1a --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_run_64r6eb.sh @@ -0,0 +1,363 @@ +PATH_TO_QEMU=3D"../../../../../../mips64-linux-user/qemu-mips64" + + +# +# Bit Count +# --------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d_64r6eb + +# +# Bit move +# -------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v_64r6eb + +# +# Bit Set +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_d_64r6eb + +# +# Fixed Multiply +# -------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_w_64r6eb + +# +# Float Max Min +# ------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_d_64r6eb + +# +# Int Add +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_d_64r6eb + +# +# Int Average +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_d_64r6eb + +# +# Int Compare +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_d_64r6eb + +# +# Int Divide +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_d_64r6eb + +# +# Int Dot Product +# --------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d_64r6eb + +# +# Int Max Min +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_d_64r6eb + +# +# Int Modulo +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_d_64r6eb + +# +# Int Multiply +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_d_64r6eb + +# +# Int Subtract +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_d_64r6eb + +# +# Interleave +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_d_64r6eb + +# +# Logic +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_and_v_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nor_v_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v_64r6eb + +# +# Move +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v_64r6eb + +# +# Pack +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_d_64r6eb + +# +# Shift +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_d_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_b_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_h_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_w_64r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_d_64r6eb diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run_64r6el.sh b/tests/tcg= /mips/user/ase/msa/test_msa_run_64r6el.sh new file mode 100755 index 0000000..380d876 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_run_64r6el.sh @@ -0,0 +1,363 @@ +PATH_TO_QEMU=3D"../../../../../../mips64el-linux-user/qemu-mips64el" + + +# +# Bit Count +# --------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d_64r6el + +# +# Bit move +# -------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v_64r6el + +# +# Bit Set +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_d_64r6el + +# +# Fixed Multiply +# -------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_w_64r6el + +# +# Float Max Min +# ------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_d_64r6el + +# +# Int Add +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_d_64r6el + +# +# Int Average +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_d_64r6el + +# +# Int Compare +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_d_64r6el + +# +# Int Divide +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_d_64r6el + +# +# Int Dot Product +# --------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d_64r6el + +# +# Int Max Min +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_d_64r6el + +# +# Int Modulo +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_d_64r6el + +# +# Int Multiply +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_d_64r6el + +# +# Int Subtract +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_d_64r6el + +# +# Interleave +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_d_64r6el + +# +# Logic +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_and_v_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nor_v_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v_64r6el + +# +# Move +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v_64r6el + +# +# Pack +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_d_64r6el + +# +# Shift +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_d_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_b_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_h_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_w_64r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_d_64r6el --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561551070; cv=none; d=zoho.com; s=zohoarc; b=EMhmnVbgwcna5Kqg1kAeo5V8LJKbWaTccZnK9jevVoRFAaZ4igtf1B3gae11CnTJkmBoMkAW9iy1bJX8lHrejd3n5WpLkV/NHvQngy75k563m9O7z/KdnZAOCXqKyhGUYfulO4vRqerqqX7edEfdNzRxPger7W/vWS7193vY2SQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561551070; 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([2001:470:142:3::10]:43828) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6Nd-0001m0-3d for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NS-0006Rp-3z for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:25 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60817 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NR-0005wv-2Y for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:13 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A76C41A46A3; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 54F4B1A46AD; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:48 +0200 Message-Id: <1561549550-3501-16-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 15/17] tests/tcg: target/mips: Add support for MSA MIPS32R6 testings X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add files for MSA MIPS32R6 target testings (copiling and running). Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-7-git-send-email-aleksandar.markovic@rt-rk.co= m> --- .../mips/user/ase/msa/test_msa_compile_32r6eb.sh | 627 +++++++++++++++++= ++++ .../mips/user/ase/msa/test_msa_compile_32r6el.sh | 627 +++++++++++++++++= ++++ tests/tcg/mips/user/ase/msa/test_msa_run_32r6eb.sh | 363 ++++++++++++ tests/tcg/mips/user/ase/msa/test_msa_run_32r6el.sh | 363 ++++++++++++ 4 files changed, 1980 insertions(+) create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_compile_32r6eb.sh create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_compile_32r6el.sh create mode 100644 tests/tcg/mips/user/ase/msa/test_msa_run_32r6eb.sh create mode 100755 tests/tcg/mips/user/ase/msa/test_msa_run_32r6el.sh diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile_32r6eb.sh b/tests= /tcg/mips/user/ase/msa/test_msa_compile_32r6eb.sh new file mode 100755 index 0000000..7a88ca2 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile_32r6eb.sh @@ -0,0 +1,627 @@ + +# +# Bit Count +# --------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_d_32= r6eb + +# +# Bit move +# -------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmnz_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bmnz_v_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmz_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bmz_v_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bsel_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bsel_v_3= 2r6eb + +# +# Bit Set +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_d_32= r6eb + +# +# Fixed Multiply +# -------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mul_q_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mul_q_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulr_q_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulr_q_w_= 32r6eb + +# +# Float Max Min +# ------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_a_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_a_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_a_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_a_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_d_32= r6eb + +# +# Int Add +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_d_= 32r6eb + +# +# Int Average +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_d_= 32r6eb + +# +# Int Compare +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_b_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_h_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_w_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_d_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_d_3= 2r6eb + +# +# Int Divide +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_d_3= 2r6eb + +# +# Int Dot Product +# --------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_h= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_w= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_d= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_h= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_w= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_d= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_h= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_w= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_d= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_h= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_w= _32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_d= _32r6eb + +# +# Int Max Min +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_d_3= 2r6eb + +# +# Int Modulo +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_d_3= 2r6eb + +# +# Int Multiply +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_d_32= r6eb + +# +# Int Subtract +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_b_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_h_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_w_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_d_= 32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= b_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= h_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= w_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= d_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= b_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= h_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= w_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= d_32r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_d_32= r6eb + +# +# Interleave +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_d_32= r6eb + +# +# Logic +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_and_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_and_v_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_nor_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nor_v_32r= 6eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_or_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_or_v_32r6= eb +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_xor_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_xor_v_32r= 6eb + +# +# Move +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc move/test_msa_move_v.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_move_v_32= r6eb + +# +# Pack +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_d_32= r6eb + +# +# Shift +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_d_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_b_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_h_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_w_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_d_32= r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_b.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_b_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_h.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_h_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_w.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_w_3= 2r6eb +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_d.c = \ +-EB -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_d_3= 2r6eb diff --git a/tests/tcg/mips/user/ase/msa/test_msa_compile_32r6el.sh b/tests= /tcg/mips/user/ase/msa/test_msa_compile_32r6el.sh new file mode 100755 index 0000000..dbe04dc --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_compile_32r6el.sh @@ -0,0 +1,627 @@ + +# +# Bit Count +# --------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nloc_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nloc_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_nlzc_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nlzc_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-count/test_msa_pcnt_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pcnt_d_32= r6el + +# +# Bit move +# -------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsl_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsl_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_binsr_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_binsr_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmnz_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bmnz_v_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bmz_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bmz_v_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-move/test_msa_bsel_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bsel_v_3= 2r6el + +# +# Bit Set +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bclr_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bclr_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bneg_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bneg_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc bit-set/test_msa_bset_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_bset_d_32= r6el + +# +# Fixed Multiply +# -------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mul_q_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mul_q_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mul_q_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulr_q_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc fixed-multiply/test_msa_mulr_q_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulr_q_w_= 32r6el + +# +# Float Max Min +# ------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_a_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_a_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmax_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmax_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_a_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_a_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc float-max-min/test_msa_fmin_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_fmin_d_32= r6el + +# +# Int Add +# ------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_add_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_add_a_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_a_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_adds_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_adds_u_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_addv_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_addv_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-add/test_msa_hadd_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hadd_u_d_= 32r6el + +# +# Int Average +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_ave_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ave_u_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-average/test_msa_aver_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_aver_u_d_= 32r6el + +# +# Int Compare +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_b_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_h_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_w_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_ceq_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ceq_d_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_cle_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_cle_u_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-compare/test_msa_clt_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_clt_u_d_3= 2r6el + +# +# Int Divide +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-divide/test_msa_div_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_div_u_d_3= 2r6el + +# +# Int Dot Product +# --------------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dotp_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dotp_u_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_h= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_w= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_s_d= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_h= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_w= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpadd_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpadd_u_d= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_h= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_w= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_s_d= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_h= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_w= _32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-dot-product/test_msa_dpsub_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_dpsub_u_d= _32r6el + +# +# Int Max Min +# ----------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_a_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_max_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_max_u_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_a_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_a_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-max-min/test_msa_min_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_min_u_d_3= 2r6el + +# +# Int Modulo +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_s_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-modulo/test_msa_mod_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mod_u_d_3= 2r6el + +# +# Int Multiply +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_maddv_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_maddv_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_msubv_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_msubv_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-multiply/test_msa_mulv_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_mulv_d_32= r6el + +# +# Int Subtract +# ------------ +# +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_asub_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_asub_u_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_hsub_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_hsub_u_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_s_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_b_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_h_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_w_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subs_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subs_u_d_= 32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= b_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= h_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= w_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsuu_s_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsuu_s_= d_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= b_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= h_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= w_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subsus_u_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subsus_u_= d_32r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc int-subtract/test_msa_subv_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_subv_d_32= r6el + +# +# Interleave +# ---------- +# +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvev_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvev_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvod_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvod_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvl_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvl_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc interleave/test_msa_ilvr_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_ilvr_d_32= r6el + +# +# Logic +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_and_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_and_v_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_nor_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_nor_v_32r= 6el +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_or_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_or_v_32r6= el +/opt/img/bin/mips-img-linux-gnu-gcc logic/test_msa_xor_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_xor_v_32r= 6el + +# +# Move +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc move/test_msa_move_v.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_move_v_32= r6el + +# +# Pack +# ---- +# +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckev_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckev_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_pckod_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_pckod_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc pack/test_msa_vshf_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_vshf_d_32= r6el + +# +# Shift +# ----- +# +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sll_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sll_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_sra_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_sra_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srar_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srar_d_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_b_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_h_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_w_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srl_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srl_d_32= r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_b.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_b_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_h.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_h_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_w.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_w_3= 2r6el +/opt/img/bin/mips-img-linux-gnu-gcc shift/test_msa_srlr_d.c = \ +-EL -static -mabi=3D32 -march=3Dmips32r6 -mmsa -o /tmp/test_msa_srlr_d_3= 2r6el diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run_32r6eb.sh b/tests/tcg= /mips/user/ase/msa/test_msa_run_32r6eb.sh new file mode 100644 index 0000000..70b2549 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_run_32r6eb.sh @@ -0,0 +1,363 @@ +PATH_TO_QEMU=3D"../../../../../../mips64-linux-user/qemu-mips64" + + +# +# Bit Count +# --------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d_32r6eb + +# +# Bit move +# -------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v_32r6eb + +# +# Bit Set +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_d_32r6eb + +# +# Fixed Multiply +# -------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_w_32r6eb + +# +# Float Max Min +# ------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_d_32r6eb + +# +# Int Add +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_d_32r6eb + +# +# Int Average +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_d_32r6eb + +# +# Int Compare +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_d_32r6eb + +# +# Int Divide +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_d_32r6eb + +# +# Int Dot Product +# --------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d_32r6eb + +# +# Int Max Min +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_d_32r6eb + +# +# Int Modulo +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_d_32r6eb + +# +# Int Multiply +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_d_32r6eb + +# +# Int Subtract +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_d_32r6eb + +# +# Interleave +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_d_32r6eb + +# +# Logic +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_and_v_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nor_v_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v_32r6eb + +# +# Move +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v_32r6eb + +# +# Pack +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_d_32r6eb + +# +# Shift +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_d_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_b_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_h_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_w_32r6eb +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_d_32r6eb diff --git a/tests/tcg/mips/user/ase/msa/test_msa_run_32r6el.sh b/tests/tcg= /mips/user/ase/msa/test_msa_run_32r6el.sh new file mode 100755 index 0000000..4e07930 --- /dev/null +++ b/tests/tcg/mips/user/ase/msa/test_msa_run_32r6el.sh @@ -0,0 +1,363 @@ +PATH_TO_QEMU=3D"../../../../../../mips64el-linux-user/qemu-mips64el" + + +# +# Bit Count +# --------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pcnt_d_32r6el + +# +# Bit move +# -------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsl_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_binsr_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmnz_v_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bmz_v_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bsel_v_32r6el + +# +# Bit Set +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bclr_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bneg_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_bset_d_32r6el + +# +# Fixed Multiply +# -------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mul_q_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulr_q_w_32r6el + +# +# Float Max Min +# ------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmax_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_fmin_d_32r6el + +# +# Int Add +# ------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_add_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_adds_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_addv_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hadd_u_d_32r6el + +# +# Int Average +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ave_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_aver_u_d_32r6el + +# +# Int Compare +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ceq_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_cle_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_clt_u_d_32r6el + +# +# Int Divide +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_div_u_d_32r6el + +# +# Int Dot Product +# --------------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dotp_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpadd_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_dpsub_u_d_32r6el + +# +# Int Max Min +# ----------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_max_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_a_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_min_u_d_32r6el + +# +# Int Modulo +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mod_u_d_32r6el + +# +# Int Multiply +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_maddv_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_msubv_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_mulv_d_32r6el + +# +# Int Subtract +# ------------ +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_asub_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_hsub_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subs_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsuu_s_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subsus_u_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_subv_d_32r6el + +# +# Interleave +# ---------- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvev_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvod_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvl_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_ilvr_d_32r6el + +# +# Logic +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_and_v_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nor_v_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_or_v_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_xor_v_32r6el + +# +# Move +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_move_v_32r6el + +# +# Pack +# ---- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckev_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_pckod_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_vshf_d_32r6el + +# +# Shift +# ----- +# +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sll_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_sra_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srar_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srl_d_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_b_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_h_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_w_32r6el +$PATH_TO_QEMU -cpu I6400 /tmp/test_msa_srlr_d_32r6el --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550935; cv=none; d=zoho.com; s=zohoarc; b=Z5Bkw3ohYZKDshcEM0loxqvg3vNUObAiQHLarXPMFYFTxaa4gY5/ksNrTLHleAK7b0TtNZhKtNX4N44GbuG7KIMJ76w3ufo7pDe98WCjQsvhpFtWecDmAO1S3R6JpnR041VYAgDOnv+QgJDm+o9VB8SdqSYCKi8Zjaar+I6SmqA= ARC-Message-Signature: i=1; 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Wed, 26 Jun 2019 08:08:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43801) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6NY-0001hy-D0 for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NR-0006RL-Uy for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:20 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60815 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NR-0005wl-1z for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:13 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A6CFD1A4688; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 70F0F1A4697; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:49 +0200 Message-Id: <1561549550-3501-17-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 16/17] tests/tcg: target/mips: Fix some test cases for pack MSA instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Fix certian test cases for MSA pack instructions. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-8-git-send-email-aleksandar.markovic@rt-rk.co= m> --- .../tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c | 64 +++++++++++-------= ---- .../tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c | 64 +++++++++++-------= ---- tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c | 64 +++++++++++-------= ---- tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c | 64 +++++++++++-------= ---- tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c | 64 +++++++++++-------= ---- tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c | 64 +++++++++++-------= ---- 12 files changed, 384 insertions(+), 384 deletions(-) diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckev_b.c index 4a4c9d6..2f4ffd9 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_b.c @@ -123,38 +123,38 @@ int32_t main(void) { 0xf71a3ffcbe639308ULL, 0xf1d842a04f4d314eULL, }, { 0xd8ff2b145aaacf80ULL, 0xf1d842a04f4d314eULL, }, { 0xf1d842a04f4d314eULL, 0xf1d842a04f4d314eULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x675e7b0c6acc6240ULL, 0xd8a04d4ed8a04d4eULL, }, /* 80 */ + { 0xf71a3ffcbe639308ULL, 0xa04ea04e5e0ccc40ULL, }, + { 0xd8ff2b145aaacf80ULL, 0x4e4e0c401afc6308ULL, }, + { 0xf1d842a04f4d314eULL, 0x4e40fc08ff14aa80ULL, }, + { 0x675e7b0c6acc6240ULL, 0x40081480d8a04d4eULL, }, + { 0xf71a3ffcbe639308ULL, 0x0880a04e5e0ccc40ULL, }, + { 0xd8ff2b145aaacf80ULL, 0x804e0c401afc6308ULL, }, + { 0xf1d842a04f4d314eULL, 0x4e40fc08ff14aa80ULL, }, + { 0x675e7b0c6acc6240ULL, 0x40081480d8a04d4eULL, }, /* 88 */ + { 0xf71a3ffcbe639308ULL, 0x0880a04e5e0ccc40ULL, }, + { 0xd8ff2b145aaacf80ULL, 0x804e0c401afc6308ULL, }, + { 0xf1d842a04f4d314eULL, 0x4e40fc08ff14aa80ULL, }, + { 0x675e7b0c6acc6240ULL, 0x40081480d8a04d4eULL, }, + { 0xf71a3ffcbe639308ULL, 0x0880a04e5e0ccc40ULL, }, + { 0xd8ff2b145aaacf80ULL, 0x804e0c401afc6308ULL, }, + { 0xf1d842a04f4d314eULL, 0x4e40fc08ff14aa80ULL, }, + { 0x40081480d8a04d4eULL, 0x675e7b0c6acc6240ULL, }, /* 96 */ + { 0x5e0ccc400880a04eULL, 0x675e7b0c6acc6240ULL, }, + { 0x5e0ccc400c40804eULL, 0x675e7b0c6acc6240ULL, }, + { 0x5e0ccc400c40404eULL, 0x675e7b0c6acc6240ULL, }, + { 0x5e0ccc400c40404eULL, 0xf71a3ffcbe639308ULL, }, + { 0x1afc63080c40404eULL, 0xf71a3ffcbe639308ULL, }, + { 0x1afc6308fc08404eULL, 0xf71a3ffcbe639308ULL, }, + { 0x1afc6308fc08084eULL, 0xf71a3ffcbe639308ULL, }, + { 0x1afc6308fc08084eULL, 0xd8ff2b145aaacf80ULL, }, /* 104 */ + { 0xff14aa80fc08084eULL, 0xd8ff2b145aaacf80ULL, }, + { 0xff14aa801480084eULL, 0xd8ff2b145aaacf80ULL, }, + { 0xff14aa801480804eULL, 0xd8ff2b145aaacf80ULL, }, + { 0xff14aa801480804eULL, 0xf1d842a04f4d314eULL, }, + { 0xd8a04d4e1480804eULL, 0xf1d842a04f4d314eULL, }, + { 0xd8a04d4ea04e804eULL, 0xf1d842a04f4d314eULL, }, + { 0xd8a04d4ea04e4e4eULL, 0xf1d842a04f4d314eULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckev_d.c index 67df606..3f0bd47 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_d.c @@ -123,38 +123,38 @@ int32_t main(void) { 0xfbbe00634d93c708ULL, 0x704f164d5e31e24eULL, }, { 0xac5aaeaab9cf8b80ULL, 0x704f164d5e31e24eULL, }, { 0x704f164d5e31e24eULL, 0x704f164d5e31e24eULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x886ae6cc28625540ULL, 0x704f164d5e31e24eULL, }, /* 80 */ + { 0xfbbe00634d93c708ULL, 0x886ae6cc28625540ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x886ae6cc28625540ULL, 0x704f164d5e31e24eULL, }, + { 0xfbbe00634d93c708ULL, 0x886ae6cc28625540ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x886ae6cc28625540ULL, 0x704f164d5e31e24eULL, }, /* 88 */ + { 0xfbbe00634d93c708ULL, 0x886ae6cc28625540ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x886ae6cc28625540ULL, 0x704f164d5e31e24eULL, }, + { 0xfbbe00634d93c708ULL, 0x886ae6cc28625540ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x704f164d5e31e24eULL, 0x886ae6cc28625540ULL, }, /* 96 */ + { 0x704f164d5e31e24eULL, 0x886ae6cc28625540ULL, }, + { 0x704f164d5e31e24eULL, 0x886ae6cc28625540ULL, }, + { 0x704f164d5e31e24eULL, 0x886ae6cc28625540ULL, }, + { 0x704f164d5e31e24eULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xfbbe00634d93c708ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, /* 104 */ + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x704f164d5e31e24eULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x704f164d5e31e24eULL, 0x704f164d5e31e24eULL, }, + { 0x704f164d5e31e24eULL, 0x704f164d5e31e24eULL, }, + { 0x704f164d5e31e24eULL, 0x704f164d5e31e24eULL, }, + { 0x704f164d5e31e24eULL, 0x704f164d5e31e24eULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckev_h.c index 22d043c..2eae01f 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_h.c @@ -123,38 +123,38 @@ int32_t main(void) { 0xbb1a52fc0063c708ULL, 0x88d8e2a0164de24eULL, }, { 0xc6ff2514aeaa8b80ULL, 0x88d8e2a0164de24eULL, }, { 0x88d8e2a0164de24eULL, 0x88d8e2a0164de24eULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x0b5eb00ce6cc5540ULL, 0xe2a0e24ee2a0e24eULL, }, /* 80 */ + { 0xbb1a52fc0063c708ULL, 0xe24ee24eb00c5540ULL, }, + { 0xc6ff2514aeaa8b80ULL, 0xe24e554052fcc708ULL, }, + { 0x88d8e2a0164de24eULL, 0x5540c70825148b80ULL, }, + { 0x0b5eb00ce6cc5540ULL, 0xc7088b80e2a0e24eULL, }, + { 0xbb1a52fc0063c708ULL, 0x8b80e24eb00c5540ULL, }, + { 0xc6ff2514aeaa8b80ULL, 0xe24e554052fcc708ULL, }, + { 0x88d8e2a0164de24eULL, 0x5540c70825148b80ULL, }, + { 0x0b5eb00ce6cc5540ULL, 0xc7088b80e2a0e24eULL, }, /* 88 */ + { 0xbb1a52fc0063c708ULL, 0x8b80e24eb00c5540ULL, }, + { 0xc6ff2514aeaa8b80ULL, 0xe24e554052fcc708ULL, }, + { 0x88d8e2a0164de24eULL, 0x5540c70825148b80ULL, }, + { 0x0b5eb00ce6cc5540ULL, 0xc7088b80e2a0e24eULL, }, + { 0xbb1a52fc0063c708ULL, 0x8b80e24eb00c5540ULL, }, + { 0xc6ff2514aeaa8b80ULL, 0xe24e554052fcc708ULL, }, + { 0x88d8e2a0164de24eULL, 0x5540c70825148b80ULL, }, + { 0xc7088b80e2a0e24eULL, 0x0b5eb00ce6cc5540ULL, }, /* 96 */ + { 0xb00c55408b80e24eULL, 0x0b5eb00ce6cc5540ULL, }, + { 0xb00c55405540e24eULL, 0x0b5eb00ce6cc5540ULL, }, + { 0xb00c55405540e24eULL, 0x0b5eb00ce6cc5540ULL, }, + { 0xb00c55405540e24eULL, 0xbb1a52fc0063c708ULL, }, + { 0x52fcc7085540e24eULL, 0xbb1a52fc0063c708ULL, }, + { 0x52fcc708c708e24eULL, 0xbb1a52fc0063c708ULL, }, + { 0x52fcc708c708e24eULL, 0xbb1a52fc0063c708ULL, }, + { 0x52fcc708c708e24eULL, 0xc6ff2514aeaa8b80ULL, }, /* 104 */ + { 0x25148b80c708e24eULL, 0xc6ff2514aeaa8b80ULL, }, + { 0x25148b808b80e24eULL, 0xc6ff2514aeaa8b80ULL, }, + { 0x25148b808b80e24eULL, 0xc6ff2514aeaa8b80ULL, }, + { 0x25148b808b80e24eULL, 0x88d8e2a0164de24eULL, }, + { 0xe2a0e24e8b80e24eULL, 0x88d8e2a0164de24eULL, }, + { 0xe2a0e24ee24ee24eULL, 0x88d8e2a0164de24eULL, }, + { 0xe2a0e24ee24ee24eULL, 0x88d8e2a0164de24eULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckev_w.c index 1a9c2df..f7215d0 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckev_w.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x153f52fc4d93c708ULL, 0xa942e2a05e31e24eULL, }, { 0xab2b2514b9cf8b80ULL, 0xa942e2a05e31e24eULL, }, { 0xa942e2a05e31e24eULL, 0xa942e2a05e31e24eULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0xfe7bb00c28625540ULL, 0x5e31e24e5e31e24eULL, }, /* 80 */ + { 0x153f52fc4d93c708ULL, 0x5e31e24e28625540ULL, }, + { 0xab2b2514b9cf8b80ULL, 0x286255404d93c708ULL, }, + { 0xa942e2a05e31e24eULL, 0x4d93c708b9cf8b80ULL, }, + { 0xfe7bb00c28625540ULL, 0xb9cf8b805e31e24eULL, }, + { 0x153f52fc4d93c708ULL, 0x5e31e24e28625540ULL, }, + { 0xab2b2514b9cf8b80ULL, 0x286255404d93c708ULL, }, + { 0xa942e2a05e31e24eULL, 0x4d93c708b9cf8b80ULL, }, + { 0xfe7bb00c28625540ULL, 0xb9cf8b805e31e24eULL, }, /* 88 */ + { 0x153f52fc4d93c708ULL, 0x5e31e24e28625540ULL, }, + { 0xab2b2514b9cf8b80ULL, 0x286255404d93c708ULL, }, + { 0xa942e2a05e31e24eULL, 0x4d93c708b9cf8b80ULL, }, + { 0xfe7bb00c28625540ULL, 0xb9cf8b805e31e24eULL, }, + { 0x153f52fc4d93c708ULL, 0x5e31e24e28625540ULL, }, + { 0xab2b2514b9cf8b80ULL, 0x286255404d93c708ULL, }, + { 0xa942e2a05e31e24eULL, 0x4d93c708b9cf8b80ULL, }, + { 0xb9cf8b805e31e24eULL, 0xfe7bb00c28625540ULL, }, /* 96 */ + { 0x286255405e31e24eULL, 0xfe7bb00c28625540ULL, }, + { 0x286255405e31e24eULL, 0xfe7bb00c28625540ULL, }, + { 0x286255405e31e24eULL, 0xfe7bb00c28625540ULL, }, + { 0x286255405e31e24eULL, 0x153f52fc4d93c708ULL, }, + { 0x4d93c7085e31e24eULL, 0x153f52fc4d93c708ULL, }, + { 0x4d93c7085e31e24eULL, 0x153f52fc4d93c708ULL, }, + { 0x4d93c7085e31e24eULL, 0x153f52fc4d93c708ULL, }, + { 0x4d93c7085e31e24eULL, 0xab2b2514b9cf8b80ULL, }, /* 104 */ + { 0xb9cf8b805e31e24eULL, 0xab2b2514b9cf8b80ULL, }, + { 0xb9cf8b805e31e24eULL, 0xab2b2514b9cf8b80ULL, }, + { 0xb9cf8b805e31e24eULL, 0xab2b2514b9cf8b80ULL, }, + { 0xb9cf8b805e31e24eULL, 0xa942e2a05e31e24eULL, }, + { 0x5e31e24e5e31e24eULL, 0xa942e2a05e31e24eULL, }, + { 0x5e31e24e5e31e24eULL, 0xa942e2a05e31e24eULL, }, + { 0x5e31e24e5e31e24eULL, 0xa942e2a05e31e24eULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckod_b.c index 15ef377..6355338 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_b.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x12bb1552fb004dc7ULL, 0x8d88a9e270165ee2ULL, }, { 0x27c6ab25acaeb98bULL, 0x8d88a9e270165ee2ULL, }, { 0x8d88a9e270165ee2ULL, 0x8d88a9e270165ee2ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x4b0bfeb088e62855ULL, 0x8da9705e8da9705eULL, }, /* 80 */ + { 0x12bb1552fb004dc7ULL, 0x8d708d704bfe8828ULL, }, + { 0x27c6ab25acaeb98bULL, 0x8d8d4b881215fb4dULL, }, + { 0x8d88a9e270165ee2ULL, 0x8d4b12fb27abacb9ULL, }, + { 0x4b0bfeb088e62855ULL, 0x8d1227ac8da9705eULL, }, + { 0x12bb1552fb004dc7ULL, 0x8d278d704bfe8828ULL, }, + { 0x27c6ab25acaeb98bULL, 0x8d8d4b881215fb4dULL, }, + { 0x8d88a9e270165ee2ULL, 0x8d4b12fb27abacb9ULL, }, + { 0x4b0bfeb088e62855ULL, 0x8d1227ac8da9705eULL, }, /* 88 */ + { 0x12bb1552fb004dc7ULL, 0x8d278d704bfe8828ULL, }, + { 0x27c6ab25acaeb98bULL, 0x8d8d4b881215fb4dULL, }, + { 0x8d88a9e270165ee2ULL, 0x8d4b12fb27abacb9ULL, }, + { 0x4b0bfeb088e62855ULL, 0x8d1227ac8da9705eULL, }, + { 0x12bb1552fb004dc7ULL, 0x8d278d704bfe8828ULL, }, + { 0x27c6ab25acaeb98bULL, 0x8d8d4b881215fb4dULL, }, + { 0x8d88a9e270165ee2ULL, 0x8d4b12fb27abacb9ULL, }, + { 0x8d1227ac8da9705eULL, 0x4b0bfeb088e62855ULL, }, /* 96 */ + { 0x4bfe88288d278d70ULL, 0x4b0bfeb088e62855ULL, }, + { 0x4bfe88284b888d8dULL, 0x4b0bfeb088e62855ULL, }, + { 0x4bfe88284b884b8dULL, 0x4b0bfeb088e62855ULL, }, + { 0x4bfe88284b884b4bULL, 0x12bb1552fb004dc7ULL, }, + { 0x1215fb4d4b884b4bULL, 0x12bb1552fb004dc7ULL, }, + { 0x1215fb4d12fb4b4bULL, 0x12bb1552fb004dc7ULL, }, + { 0x1215fb4d12fb124bULL, 0x12bb1552fb004dc7ULL, }, + { 0x1215fb4d12fb1212ULL, 0x27c6ab25acaeb98bULL, }, /* 104 */ + { 0x27abacb912fb1212ULL, 0x27c6ab25acaeb98bULL, }, + { 0x27abacb927ac1212ULL, 0x27c6ab25acaeb98bULL, }, + { 0x27abacb927ac2712ULL, 0x27c6ab25acaeb98bULL, }, + { 0x27abacb927ac2727ULL, 0x8d88a9e270165ee2ULL, }, + { 0x8da9705e27ac2727ULL, 0x8d88a9e270165ee2ULL, }, + { 0x8da9705e8d702727ULL, 0x8d88a9e270165ee2ULL, }, + { 0x8da9705e8d708d27ULL, 0x8d88a9e270165ee2ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckod_d.c index e3997cd..ac75526 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_d.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x12f7bb1a153f52fcULL, 0x8df188d8a942e2a0ULL, }, { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x4b670b5efe7bb00cULL, 0x8df188d8a942e2a0ULL, }, /* 80 */ + { 0x12f7bb1a153f52fcULL, 0x8df188d8a942e2a0ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x4b670b5efe7bb00cULL, 0x8df188d8a942e2a0ULL, }, + { 0x12f7bb1a153f52fcULL, 0x8df188d8a942e2a0ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x4b670b5efe7bb00cULL, 0x8df188d8a942e2a0ULL, }, /* 88 */ + { 0x12f7bb1a153f52fcULL, 0x8df188d8a942e2a0ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x4b670b5efe7bb00cULL, 0x8df188d8a942e2a0ULL, }, + { 0x12f7bb1a153f52fcULL, 0x8df188d8a942e2a0ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x4b670b5efe7bb00cULL, }, /* 96 */ + { 0x4b670b5efe7bb00cULL, 0x4b670b5efe7bb00cULL, }, + { 0x4b670b5efe7bb00cULL, 0x4b670b5efe7bb00cULL, }, + { 0x4b670b5efe7bb00cULL, 0x4b670b5efe7bb00cULL, }, + { 0x4b670b5efe7bb00cULL, 0x12f7bb1a153f52fcULL, }, + { 0x12f7bb1a153f52fcULL, 0x12f7bb1a153f52fcULL, }, + { 0x12f7bb1a153f52fcULL, 0x12f7bb1a153f52fcULL, }, + { 0x12f7bb1a153f52fcULL, 0x12f7bb1a153f52fcULL, }, + { 0x12f7bb1a153f52fcULL, 0x27d8c6ffab2b2514ULL, }, /* 104 */ + { 0x27d8c6ffab2b2514ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x27d8c6ffab2b2514ULL, }, + { 0x27d8c6ffab2b2514ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, + { 0x8df188d8a942e2a0ULL, 0x8df188d8a942e2a0ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckod_h.c index 2a29ac0..12c1fa1 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_h.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x12f7153ffbbe4d93ULL, 0x8df1a942704f5e31ULL, }, { 0x27d8ab2bac5ab9cfULL, 0x8df1a942704f5e31ULL, }, { 0x8df1a942704f5e31ULL, 0x8df1a942704f5e31ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x4b67fe7b886a2862ULL, 0x8df1704f8df1704fULL, }, /* 80 */ + { 0x12f7153ffbbe4d93ULL, 0x8df18df14b67886aULL, }, + { 0x27d8ab2bac5ab9cfULL, 0x8df14b6712f7fbbeULL, }, + { 0x8df1a942704f5e31ULL, 0x8df112f727d8ac5aULL, }, + { 0x4b67fe7b886a2862ULL, 0x8df127d88df1704fULL, }, + { 0x12f7153ffbbe4d93ULL, 0x8df18df14b67886aULL, }, + { 0x27d8ab2bac5ab9cfULL, 0x8df14b6712f7fbbeULL, }, + { 0x8df1a942704f5e31ULL, 0x8df112f727d8ac5aULL, }, + { 0x4b67fe7b886a2862ULL, 0x8df127d88df1704fULL, }, /* 88 */ + { 0x12f7153ffbbe4d93ULL, 0x8df18df14b67886aULL, }, + { 0x27d8ab2bac5ab9cfULL, 0x8df14b6712f7fbbeULL, }, + { 0x8df1a942704f5e31ULL, 0x8df112f727d8ac5aULL, }, + { 0x4b67fe7b886a2862ULL, 0x8df127d88df1704fULL, }, + { 0x12f7153ffbbe4d93ULL, 0x8df18df14b67886aULL, }, + { 0x27d8ab2bac5ab9cfULL, 0x8df14b6712f7fbbeULL, }, + { 0x8df1a942704f5e31ULL, 0x8df112f727d8ac5aULL, }, + { 0x8df127d88df1704fULL, 0x4b67fe7b886a2862ULL, }, /* 96 */ + { 0x4b67886a8df18df1ULL, 0x4b67fe7b886a2862ULL, }, + { 0x4b67886a4b678df1ULL, 0x4b67fe7b886a2862ULL, }, + { 0x4b67886a4b674b67ULL, 0x4b67fe7b886a2862ULL, }, + { 0x4b67886a4b674b67ULL, 0x12f7153ffbbe4d93ULL, }, + { 0x12f7fbbe4b674b67ULL, 0x12f7153ffbbe4d93ULL, }, + { 0x12f7fbbe12f74b67ULL, 0x12f7153ffbbe4d93ULL, }, + { 0x12f7fbbe12f712f7ULL, 0x12f7153ffbbe4d93ULL, }, + { 0x12f7fbbe12f712f7ULL, 0x27d8ab2bac5ab9cfULL, }, /* 104 */ + { 0x27d8ac5a12f712f7ULL, 0x27d8ab2bac5ab9cfULL, }, + { 0x27d8ac5a27d812f7ULL, 0x27d8ab2bac5ab9cfULL, }, + { 0x27d8ac5a27d827d8ULL, 0x27d8ab2bac5ab9cfULL, }, + { 0x27d8ac5a27d827d8ULL, 0x8df1a942704f5e31ULL, }, + { 0x8df1704f27d827d8ULL, 0x8df1a942704f5e31ULL, }, + { 0x8df1704f8df127d8ULL, 0x8df1a942704f5e31ULL, }, + { 0x8df1704f8df18df1ULL, 0x8df1a942704f5e31ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c b/tests/tc= g/mips/user/ase/msa/pack/test_msa_pckod_w.c index a3fbe25..b8979c3 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_pckod_w.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x12f7bb1afbbe0063ULL, 0x8df188d8704f164dULL, }, { 0x27d8c6ffac5aaeaaULL, 0x8df188d8704f164dULL, }, { 0x8df188d8704f164dULL, 0x8df188d8704f164dULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x4b670b5e886ae6ccULL, 0x8df188d88df188d8ULL, }, /* 80 */ + { 0x12f7bb1afbbe0063ULL, 0x8df188d84b670b5eULL, }, + { 0x27d8c6ffac5aaeaaULL, 0x8df188d812f7bb1aULL, }, + { 0x8df188d8704f164dULL, 0x8df188d827d8c6ffULL, }, + { 0x4b670b5e886ae6ccULL, 0x8df188d88df188d8ULL, }, + { 0x12f7bb1afbbe0063ULL, 0x8df188d84b670b5eULL, }, + { 0x27d8c6ffac5aaeaaULL, 0x8df188d812f7bb1aULL, }, + { 0x8df188d8704f164dULL, 0x8df188d827d8c6ffULL, }, + { 0x4b670b5e886ae6ccULL, 0x8df188d88df188d8ULL, }, /* 88 */ + { 0x12f7bb1afbbe0063ULL, 0x8df188d84b670b5eULL, }, + { 0x27d8c6ffac5aaeaaULL, 0x8df188d812f7bb1aULL, }, + { 0x8df188d8704f164dULL, 0x8df188d827d8c6ffULL, }, + { 0x4b670b5e886ae6ccULL, 0x8df188d88df188d8ULL, }, + { 0x12f7bb1afbbe0063ULL, 0x8df188d84b670b5eULL, }, + { 0x27d8c6ffac5aaeaaULL, 0x8df188d812f7bb1aULL, }, + { 0x8df188d8704f164dULL, 0x8df188d827d8c6ffULL, }, + { 0x8df188d88df188d8ULL, 0x4b670b5e886ae6ccULL, }, /* 96 */ + { 0x4b670b5e8df188d8ULL, 0x4b670b5e886ae6ccULL, }, + { 0x4b670b5e4b670b5eULL, 0x4b670b5e886ae6ccULL, }, + { 0x4b670b5e4b670b5eULL, 0x4b670b5e886ae6ccULL, }, + { 0x4b670b5e4b670b5eULL, 0x12f7bb1afbbe0063ULL, }, + { 0x12f7bb1a4b670b5eULL, 0x12f7bb1afbbe0063ULL, }, + { 0x12f7bb1a12f7bb1aULL, 0x12f7bb1afbbe0063ULL, }, + { 0x12f7bb1a12f7bb1aULL, 0x12f7bb1afbbe0063ULL, }, + { 0x12f7bb1a12f7bb1aULL, 0x27d8c6ffac5aaeaaULL, }, /* 104 */ + { 0x27d8c6ff12f7bb1aULL, 0x27d8c6ffac5aaeaaULL, }, + { 0x27d8c6ff27d8c6ffULL, 0x27d8c6ffac5aaeaaULL, }, + { 0x27d8c6ff27d8c6ffULL, 0x27d8c6ffac5aaeaaULL, }, + { 0x27d8c6ff27d8c6ffULL, 0x8df188d8704f164dULL, }, + { 0x8df188d827d8c6ffULL, 0x8df188d8704f164dULL, }, + { 0x8df188d88df188d8ULL, 0x8df188d8704f164dULL, }, + { 0x8df188d88df188d8ULL, 0x8df188d8704f164dULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c b/tests/tcg= /mips/user/ase/msa/pack/test_msa_vshf_b.c index eedb7d8..1839a26 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_b.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x0000000000000000ULL, 0x0000000000000000ULL, }, { 0x8080808080808080ULL, 0x8080808080808080ULL, }, { 0x0000000000000000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x4040404040404040ULL, 0x4040404040404040ULL, }, /* 80 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8080808080808080ULL, 0x8080808080808080ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x4040404040404040ULL, 0x4040404040404040ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8080808080808080ULL, 0x8080808080808080ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x4040404040404040ULL, 0x4040404040404040ULL, }, /* 88 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8080808080808080ULL, 0x8080808080808080ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x4040404040404040ULL, 0x4040404040404040ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8080808080808080ULL, 0x8080808080808080ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 96 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 104 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c b/tests/tcg= /mips/user/ase/msa/pack/test_msa_vshf_d.c index 85a8f0d..ebc198f 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_d.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x0000000000000000ULL, 0x0000000000000000ULL, }, { 0xac5aaeaab9cf8b80ULL, 0xac5aaeaab9cf8b80ULL, }, { 0x0000000000000000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x886ae6cc28625540ULL, 0x886ae6cc28625540ULL, }, /* 80 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x886ae6cc28625540ULL, 0x886ae6cc28625540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x886ae6cc28625540ULL, 0x886ae6cc28625540ULL, }, /* 88 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x886ae6cc28625540ULL, 0x886ae6cc28625540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xac5aaeaab9cf8b80ULL, 0xac5aaeaab9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 96 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 104 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c b/tests/tcg= /mips/user/ase/msa/pack/test_msa_vshf_h.c index 8d416bc..a724013 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_h.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x0000000000000000ULL, 0x0000000000000000ULL, }, { 0x8b808b808b808b80ULL, 0x8b808b808b808b80ULL, }, { 0x0000000000000000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x5540554055405540ULL, 0x5540554055405540ULL, }, /* 80 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8b808b808b808b80ULL, 0x8b808b808b808b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x5540554055405540ULL, 0x5540554055405540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8b808b808b808b80ULL, 0x8b808b808b808b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x5540554055405540ULL, 0x5540554055405540ULL, }, /* 88 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8b808b808b808b80ULL, 0x8b808b808b808b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x5540554055405540ULL, 0x5540554055405540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x8b808b808b808b80ULL, 0x8b808b808b808b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 96 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 104 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, }; =20 reset_msa_registers(); diff --git a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c b/tests/tcg= /mips/user/ase/msa/pack/test_msa_vshf_w.c index fd8f02d..607ac4f 100644 --- a/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c +++ b/tests/tcg/mips/user/ase/msa/pack/test_msa_vshf_w.c @@ -123,38 +123,38 @@ int32_t main(void) { 0x0000000000000000ULL, 0x0000000000000000ULL, }, { 0xb9cf8b80b9cf8b80ULL, 0xb9cf8b80b9cf8b80ULL, }, { 0x0000000000000000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 80 */ - { 0x00000000fc000000ULL, 0x000015000000001aULL, }, - { 0x0000000014000000ULL, 0x0000ab00000000ffULL, }, - { 0x00000000a0000000ULL, 0x0000a900000000d8ULL, }, - { 0x000040000000000cULL, 0x9300003f00120000ULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000800000000014ULL, 0x9300003f00120000ULL, }, - { 0x00004e00000000a0ULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0x8800000000fee6aaULL, }, /* 88 */ - { 0x0000000000000000ULL, 0xfb000000001500aaULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x0000000000000000ULL, 0x7000000000a916aaULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 96 */ - { 0x00000800000000fcULL, 0x6200007be64b0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeccULL, }, - { 0x00006a0000550000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x9300003f00120000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae63ULL, }, - { 0x0000be0000c70000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, /* 104 */ - { 0x00000800000000fcULL, 0xcf00002bae270000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abaeaaULL, }, - { 0x00005a00008b0000ULL, 0x0000000000000000ULL, }, - { 0x000000000c000000ULL, 0x0000fe000000005eULL, }, - { 0x00000800000000fcULL, 0x31000042168d0000ULL, }, - { 0x0000000000000000ULL, 0xac00000000abae4dULL, }, - { 0x00004f0000e20000ULL, 0x0000000000000000ULL, }, + { 0x2862554028625540ULL, 0x2862554028625540ULL, }, /* 80 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xb9cf8b80b9cf8b80ULL, 0xb9cf8b80b9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x2862554028625540ULL, 0x2862554028625540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xb9cf8b80b9cf8b80ULL, 0xb9cf8b80b9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x2862554028625540ULL, 0x2862554028625540ULL, }, /* 88 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xb9cf8b80b9cf8b80ULL, 0xb9cf8b80b9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x2862554028625540ULL, 0x2862554028625540ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0xb9cf8b80b9cf8b80ULL, 0xb9cf8b80b9cf8b80ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 96 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, /* 104 */ + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, + { 0x0000000000000000ULL, 0x0000000000000000ULL, }, }; =20 reset_msa_registers(); --=20 2.7.4 From nobody Mon Apr 29 02:39:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561550232; cv=none; d=zoho.com; s=zohoarc; b=dime6ES/60qgQMRQ//6G2rNisVe10axFisake7TdoyR6p4pg5Y/dx+dQS5wmqPXeuPo52zWvFeM3ysrRMxmv+4nj01UYBKYLmDclgIAzH5TfbMdAKDmENQRrbilYhrY4GHQZsabMjnmFBGaXvCOkao92ChloDknS7cCJSx4vzuM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561550232; 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([2001:470:142:3::10]:43772) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hg6NS-0001d7-JS for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hg6NR-0006Os-33 for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60816 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hg6NQ-0005wm-IB for qemu-devel@nongnu.org; Wed, 26 Jun 2019 07:46:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A2A351A2276; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 802181A46B4; Wed, 26 Jun 2019 13:45:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Jun 2019 13:45:50 +0200 Message-Id: <1561549550-3501-18-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 17/17] target/mips: Fix big endian host behavior for interleave MSA instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Fix big endian host behavior for interleave MSA instructions. Previous fix used TARGET_WORDS_BIGENDIAN instead of HOST_WORDS_BIGENDIAN, which was a mistake. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1561543629-20327-9-git-send-email-aleksandar.markovic@rt-rk.co= m> --- target/mips/msa_helper.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 7a9bfb3..8bad636 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -1737,7 +1737,7 @@ void helper_msa_ilvev_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, =20 switch (df) { case DF_BYTE: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->b[8] =3D pws->b[9]; pwd->b[9] =3D pwt->b[9]; pwd->b[10] =3D pws->b[11]; @@ -1774,7 +1774,7 @@ void helper_msa_ilvev_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, #endif break; case DF_HALF: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->h[4] =3D pws->h[5]; pwd->h[5] =3D pwt->h[5]; pwd->h[6] =3D pws->h[7]; @@ -1795,7 +1795,7 @@ void helper_msa_ilvev_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, #endif break; case DF_WORD: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->w[2] =3D pws->w[3]; pwd->w[3] =3D pwt->w[3]; pwd->w[0] =3D pws->w[1]; @@ -1825,7 +1825,7 @@ void helper_msa_ilvod_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, =20 switch (df) { case DF_BYTE: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->b[7] =3D pwt->b[6]; pwd->b[6] =3D pws->b[6]; pwd->b[5] =3D pwt->b[4]; @@ -1862,7 +1862,7 @@ void helper_msa_ilvod_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, #endif break; case DF_HALF: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->h[3] =3D pwt->h[2]; pwd->h[2] =3D pws->h[2]; pwd->h[1] =3D pwt->h[0]; @@ -1883,7 +1883,7 @@ void helper_msa_ilvod_df(CPUMIPSState *env, uint32_t = df, uint32_t wd, #endif break; case DF_WORD: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->w[1] =3D pwt->w[0]; pwd->w[0] =3D pws->w[0]; pwd->w[3] =3D pwt->w[2]; @@ -1913,7 +1913,7 @@ void helper_msa_ilvl_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, =20 switch (df) { case DF_BYTE: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->b[7] =3D pwt->b[15]; pwd->b[6] =3D pws->b[15]; pwd->b[5] =3D pwt->b[14]; @@ -1950,7 +1950,7 @@ void helper_msa_ilvl_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, #endif break; case DF_HALF: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->h[3] =3D pwt->h[7]; pwd->h[2] =3D pws->h[7]; pwd->h[1] =3D pwt->h[6]; @@ -1971,7 +1971,7 @@ void helper_msa_ilvl_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, #endif break; case DF_WORD: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->w[1] =3D pwt->w[3]; pwd->w[0] =3D pws->w[3]; pwd->w[3] =3D pwt->w[2]; @@ -2001,7 +2001,7 @@ void helper_msa_ilvr_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, =20 switch (df) { case DF_BYTE: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->b[8] =3D pws->b[0]; pwd->b[9] =3D pwt->b[0]; pwd->b[10] =3D pws->b[1]; @@ -2038,7 +2038,7 @@ void helper_msa_ilvr_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, #endif break; case DF_HALF: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->h[4] =3D pws->h[0]; pwd->h[5] =3D pwt->h[0]; pwd->h[6] =3D pws->h[1]; @@ -2059,7 +2059,7 @@ void helper_msa_ilvr_df(CPUMIPSState *env, uint32_t d= f, uint32_t wd, #endif break; case DF_WORD: -#if defined(TARGET_WORDS_BIGENDIAN) +#if defined(HOST_WORDS_BIGENDIAN) pwd->w[2] =3D pws->w[0]; pwd->w[3] =3D pwt->w[0]; pwd->w[0] =3D pws->w[1]; --=20 2.7.4