From nobody Tue Feb 10 01:32:47 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1561310242; cv=none; d=zoho.com; s=zohoarc; b=Zskwt+XiaUAj/rNWHWlhMBjEdyO1B31rXI6MS9LToVobdX/4bo9DGFpMy0MwZOy1pZKpcpSmBfJDIPvzLXDor/Si6A+3T6LamOeuzFVchFzSHNMTxcNgLxzzY7kayTZUQ9ZwA2/dsIdJVxrLFLJ/rfq6Ouzuv7oN+VL3MvwsVus= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561310242; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=htkHTQbYIB06oT1HPZB53EDZOs75FT6kMfZg8Y8e7+0=; b=R9xLnjScSw3eSM3DwnuWA3kPnAV145ttJ7Mpgik4hB/j1/9QGIOxugQUWS2pkghObLe/wnMH3nUOpXO/CQk9Dr/Sh5PTlBkxzCmOUUa680bcW0plc0qsfct6L7L/J0Ob/F1b2CjiwzNnhZnzdLNftI3PxjCNaqZQQGbVoqgaczU= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561310242496582.4989751764683; Sun, 23 Jun 2019 10:17:22 -0700 (PDT) Received: from localhost ([::1]:45864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hf677-0002e0-EI for importer@patchew.org; Sun, 23 Jun 2019 13:17:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34153) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hf5wM-0001d1-Mh for qemu-devel@nongnu.org; Sun, 23 Jun 2019 13:06:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hf5wL-0004IZ-D8 for qemu-devel@nongnu.org; Sun, 23 Jun 2019 13:06:06 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:41126 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hf5wL-0004HA-5M for qemu-devel@nongnu.org; Sun, 23 Jun 2019 13:06:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 6421A1A1D78; Sun, 23 Jun 2019 19:05:45 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3FACD1A1D85; Sun, 23 Jun 2019 19:05:45 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Sun, 23 Jun 2019 19:04:40 +0200 Message-Id: <1561309489-16146-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1561309489-16146-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 07/16] tcg/ppc: Add support for vector add/subtract X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, "David Gibson --cc=amarkovic @ wavecomp . com" , Mark Cave-Ayland , Aleksandar Markovic , hsp.cat7@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Add support for vector add/subtract using Altivec instructions: VADDUBM, VADDUHM, VADDUWM, VSUBUBM, VSUBUHM, VSUBUWM. Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- tcg/ppc/tcg-target.inc.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index e1142e7..e254fa4 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -474,6 +474,14 @@ static int tcg_target_const_match(tcg_target_long val,= TCGType type, #define STVX XO31(231) #define STVEWX XO31(199) =20 +#define VADDUBM VX4(0) +#define VADDUHM VX4(64) +#define VADDUWM VX4(128) + +#define VSUBUBM VX4(1024) +#define VSUBUHM VX4(1088) +#define VSUBUWM VX4(1152) + #define VMAXSB VX4(258) #define VMAXSH VX4(322) #define VMAXSW VX4(386) @@ -2831,6 +2839,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, = unsigned vece) case INDEX_op_andc_vec: case INDEX_op_not_vec: return 1; + case INDEX_op_add_vec: + case INDEX_op_sub_vec: case INDEX_op_smax_vec: case INDEX_op_smin_vec: case INDEX_op_umax_vec: @@ -2932,6 +2942,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode o= pc, const TCGArg *args, const int *const_args) { static const uint32_t + add_op[4] =3D { VADDUBM, VADDUHM, VADDUWM, 0 }, + sub_op[4] =3D { VSUBUBM, VSUBUHM, VSUBUWM, 0 }, eq_op[4] =3D { VCMPEQUB, VCMPEQUH, VCMPEQUW, 0 }, gts_op[4] =3D { VCMPGTSB, VCMPGTSH, VCMPGTSW, 0 }, gtu_op[4] =3D { VCMPGTUB, VCMPGTUH, VCMPGTUW, 0 }, @@ -2955,6 +2967,12 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode = opc, tcg_out_dupm_vec(s, type, vece, a0, a1, a2); return; =20 + case INDEX_op_add_vec: + insn =3D add_op[vece]; + break; + case INDEX_op_sub_vec: + insn =3D sub_op[vece]; + break; case INDEX_op_smin_vec: insn =3D smin_op[vece]; break; @@ -3253,6 +3271,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpc= ode op) return (TCG_TARGET_REG_BITS =3D=3D 64 ? &S_S : TARGET_LONG_BITS =3D=3D 32 ? &S_S_S : &S_S_S_S); =20 + case INDEX_op_add_vec: + case INDEX_op_sub_vec: case INDEX_op_and_vec: case INDEX_op_or_vec: case INDEX_op_xor_vec: --=20 2.7.4