From nobody Mon Feb 9 09:21:57 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1559414062; cv=none; d=zoho.com; s=zohoarc; b=d82kgn/4gvgbBl2ghXRtyiqsYsdTew6672B3hIvrKZo0jDTjXGBvzktSZINTN5VQXGh4BJK+820oVVBRbaG9nZszhlO3WelHxvpaW7A2WrQVgqRMalUiNJuWwafq8S87G3Ueevqzk2z9rHmZsF+Dr+OCprXsHtLVgjNiZNhPCcY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1559414062; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=QDg91wec+fJqcygrhMbKKalnOSeOkVoN1erO4SfIL4o=; b=FL7+aQP7VT3j/kuzym5LBKBhsrYWqk9hazaVAkH54uwIpmP7mi+I9BwV/6qKxDHEghDdxRKGQ+BVw26WxtoVjIOpwOdqNkkiblkpCzGrI6oCHfVq/ds1A79onnVWWjrsMz2U7yL4JZ80LHpvoXwkY4/z+lvDVrtUlB0lT3ufyo8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1559414061615964.601799557603; Sat, 1 Jun 2019 11:34:21 -0700 (PDT) Received: from localhost ([127.0.0.1]:39948 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hX8pV-00044K-Bt for importer@patchew.org; Sat, 01 Jun 2019 14:34:09 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48210) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hX8nR-0002sY-SE for qemu-devel@nongnu.org; Sat, 01 Jun 2019 14:32:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hX8nQ-0005tG-K7 for qemu-devel@nongnu.org; Sat, 01 Jun 2019 14:32:01 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:59823 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hX8nQ-0005Pv-9c for qemu-devel@nongnu.org; Sat, 01 Jun 2019 14:32:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 575951A1D46; Sat, 1 Jun 2019 20:30:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 34EDC1A1CFE; Sat, 1 Jun 2019 20:30:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Sat, 1 Jun 2019 20:30:39 +0200 Message-Id: <1559413846-4402-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1559413846-4402-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1559413846-4402-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 1/8] target/mips: Add emulation of MMI instruction PCPYH X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Mateja Marjanovic Add emulation of MMI instruction PCPYH. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Rikalo Message-Id: <1551712405-2530-2-git-send-email-mateja.marjanovic@rt-rk.com> --- target/mips/translate.c | 66 +++++++++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 65 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 70552fe..704eb2b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24357,6 +24357,68 @@ static void decode_opc_special(CPUMIPSState *env, = DisasContext *ctx) * PEXTUW */ =20 +/* + * PCPYH rd, rt + * + * Parallel Copy Halfword + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---------+---------+-----------+ + * | MMI |0 0 0 0 0| rt | rd | PCPYH | MMI3 | + * +-----------+---------+---------+---------+---------+-----------+ + */ +static void gen_mmi_pcpyh(DisasContext *ctx) +{ + uint32_t pd, rt, rd; + uint32_t opcode; + + opcode =3D ctx->opcode; + + pd =3D extract32(opcode, 21, 5); + rt =3D extract32(opcode, 16, 5); + rd =3D extract32(opcode, 11, 5); + + if (unlikely(pd !=3D 0)) { + generate_exception_end(ctx, EXCP_RI); + } else if (rd =3D=3D 0) { + /* nop */ + } else if (rt =3D=3D 0) { + tcg_gen_movi_i64(cpu_gpr[rd], 0); + tcg_gen_movi_i64(cpu_mmr[rd], 0); + } else { + TCGv_i64 t0 =3D tcg_temp_new(); + TCGv_i64 t1 =3D tcg_temp_new(); + uint64_t mask =3D (1ULL << 16) - 1; + + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask); + tcg_gen_movi_i64(t1, 0); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + + tcg_gen_mov_i64(cpu_gpr[rd], t1); + + tcg_gen_andi_i64(t0, cpu_mmr[rt], mask); + tcg_gen_movi_i64(t1, 0); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_or_i64(t1, t0, t1); + + tcg_gen_mov_i64(cpu_mmr[rd], t1); + + tcg_temp_free(t0); + tcg_temp_free(t1); + } +} + #endif =20 =20 @@ -27409,10 +27471,12 @@ static void decode_mmi3(CPUMIPSState *env, DisasC= ontext *ctx) case MMI_OPC_3_POR: /* TODO: MMI_OPC_3_POR */ case MMI_OPC_3_PNOR: /* TODO: MMI_OPC_3_PNOR */ case MMI_OPC_3_PEXCH: /* TODO: MMI_OPC_3_PEXCH */ - case MMI_OPC_3_PCPYH: /* TODO: MMI_OPC_3_PCPYH */ case MMI_OPC_3_PEXCW: /* TODO: MMI_OPC_3_PEXCW */ generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI3 = */ break; + case MMI_OPC_3_PCPYH: + gen_mmi_pcpyh(ctx); + break; default: MIPS_INVAL("TX79 MMI class MMI3"); generate_exception_end(ctx, EXCP_RI); --=20 2.7.4