From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833076; cv=none; d=zoho.com; s=zohoarc; b=UVcs79QMdItXct9/KxQTNQbSmYERZ8GIC7EYMMstaxhWltwxEAj3PnI21JCgBi2C7S7U2C5JcF1rhiNmFlKQtducl3maEx71nLF4h+/p2LlGM04uB2vXFChhe+JaJ9hpaXOnWx5gRGDNUiDnKE4FIGXyVQGkmxmWTfXH0CuhdBc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833076; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=YRM/madZ1Dbrz5/sYHgeB1CEkIqLHKvQHJKeSTHEcks=; b=Dfo1mD/QTC9eqnlrkJ1sdl06r+bFuTdqo6O9CySLDfiFiuQ52RN0Rd/DfbKbA3k+iOaG0IwEEART+l0jIBgtUwRIaGU2jIsAgujzCrw1+aYClUwMU73qoBNTXouyWzZG5m93L6OT5+jF5dH0CwwxCUD1JPTg2YI1AZh+JUEyIZA= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557833076089369.8318804844554; Tue, 14 May 2019 04:24:36 -0700 (PDT) Received: from localhost ([127.0.0.1]:45890 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVXs-0007QS-1J for importer@patchew.org; Tue, 14 May 2019 07:24:32 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48275) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVVX-0005zN-Nb for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQVVW-0002Bu-My for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:07 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33832 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVT-00024G-BN; Tue, 14 May 2019 07:22:03 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 2FDC12560BFF5A8ED008; Tue, 14 May 2019 19:22:00 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:49 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:14 -0700 Message-ID: <1557832703-42620-2-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 01/10] hw/arm/virt: Add RAS platform version for migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support this feature since version 4.1, disable it by default in the old version. Signed-off-by: Dongjiu Geng --- hw/arm/virt.c | 6 ++++++ include/hw/arm/virt.h | 1 + 2 files changed, 7 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5331ab7..7bdd41b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2043,8 +2043,14 @@ DEFINE_VIRT_MACHINE_AS_LATEST(4, 1) =20 static void virt_machine_4_0_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_4_1_options(mc); compat_props_add(mc->compat_props, hw_compat_4_0, hw_compat_4_0_len); + /* Disable memory recovery feature for 4.0 as RAS support was + * introduced with 4.1. + */ + vmc->no_ras =3D true; } DEFINE_VIRT_MACHINE(4, 0) =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 4240709..7f1a033 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -104,6 +104,7 @@ typedef struct { bool disallow_affinity_adjustment; bool no_its; bool no_pmu; + bool no_ras; bool claim_edge_triggered_timers; bool smbios_old_sys_ver; bool no_highmem_ecam; --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833248; cv=none; d=zoho.com; s=zohoarc; b=S+ZoujZWfo4GqVLgKW/Nz0dTtWMtxVnjtpULzpFL7mRx8JqdHjY5vcY07ZfRloJ/DNSciLPMJTBtA9ikycMeP7E2Z8vXOMe4k8tJ0i4D6Q7Rn9t553+PUQZ1d+wQFyx7LUjysDs4G6na9Y2fO/Q9euhzLV9nnb1xWAIfeicT4oQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833248; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=qapzenOGreaDitxTOg43001wTBKi9+y3Bs2GK236WG0=; b=iakaJAsuyWmdctWFBbO1TL0Lz+INjrG5SbHzhZOBcuPh4/GPhS2gX6U5LJazoCdwRDXSWdTFLCJMvYJvpzYBg2l07hynAXMV8UzBmMWr5wEtTSXzSP7NZ1xDhYLCVqOoIMMU/MjxMlugVFvfvsfWCuVNBg06GFyvuZCaUZboDzM= ARC-Authentication-Results: i=1; mx.zoho.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557833248423686.4192138028886; Tue, 14 May 2019 04:27:28 -0700 (PDT) Received: from localhost ([127.0.0.1]:45955 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVaT-0001TR-3d for importer@patchew.org; Tue, 14 May 2019 07:27:13 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48282) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVVX-0005zf-Ve for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQVVW-0002C1-NH for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:07 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33848 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVT-00024O-CY; Tue, 14 May 2019 07:22:03 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3F83D18CFD8C6B38241D; Tue, 14 May 2019 19:22:00 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:50 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:15 -0700 Message-ID: <1557832703-42620-3-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 02/10] ACPI: add some GHES structures and macros definition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add Generic Error Status Block structures and some macros definitions, which is referred to the ACPI 4.0 or ACPI 6.2. The HEST table generation and CPER record will use them. Signed-off-by: Dongjiu Geng --- include/hw/acpi/acpi-defs.h | 52 +++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index f9aa4bd..d1996fb 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -224,6 +224,25 @@ typedef struct AcpiMultipleApicTable AcpiMultipleApicT= able; #define ACPI_APIC_RESERVED 16 /* 16 and greater are reserve= d */ =20 /* + * Values for Hardware Error Notification Type field + */ +enum AcpiHestNotifyType { + ACPI_HEST_NOTIFY_POLLED =3D 0, + ACPI_HEST_NOTIFY_EXTERNAL =3D 1, + ACPI_HEST_NOTIFY_LOCAL =3D 2, + ACPI_HEST_NOTIFY_SCI =3D 3, + ACPI_HEST_NOTIFY_NMI =3D 4, + ACPI_HEST_NOTIFY_CMCI =3D 5, /* ACPI 5.0: 18.3.2.7, Table 18-290 */ + ACPI_HEST_NOTIFY_MCE =3D 6, /* ACPI 5.0: 18.3.2.7, Table 18-290 */ + ACPI_HEST_NOTIFY_GPIO =3D 7, /* ACPI 6.0: 18.3.2.7, Table 18-332 */ + ACPI_HEST_NOTIFY_SEA =3D 8, /* ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_HEST_NOTIFY_SEI =3D 9, /* ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_HEST_NOTIFY_GSIV =3D 10, /* ACPI 6.1: 18.3.2.9, Table 18-345 */ + ACPI_HEST_NOTIFY_SDEI =3D 11, /* ACPI 6.2: 18.3.2.9, Table 18-383 */ + ACPI_HEST_NOTIFY_RESERVED =3D 12 /* 12 and greater are reserved */ +}; + +/* * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE) */ #define ACPI_SUB_HEADER_DEF /* Common ACPI sub-structure header */\ @@ -400,6 +419,39 @@ struct AcpiSystemResourceAffinityTable { } QEMU_PACKED; typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityT= able; =20 +/* + * Generic Error Status Block + */ +struct AcpiGenericErrorStatus { + /* It is a bitmask composed of ACPI_GEBS_xxx macros */ + uint32_t block_status; + uint32_t raw_data_offset; + uint32_t raw_data_length; + uint32_t data_length; + uint32_t error_severity; +} QEMU_PACKED; +typedef struct AcpiGenericErrorStatus AcpiGenericErrorStatus; + +/* + * Masks for block_status flags above + */ +#define ACPI_GEBS_UNCORRECTABLE 1 + +/* + * Values for error_severity field above + */ +enum AcpiGenericErrorSeverity { + ACPI_CPER_SEV_RECOVERABLE, + ACPI_CPER_SEV_FATAL, + ACPI_CPER_SEV_CORRECTED, + ACPI_CPER_SEV_NONE, +}; + +/* + * Generic Hardware Error Source version 2 + */ +#define ACPI_HEST_SOURCE_GENERIC_ERROR_V2 10 + #define ACPI_SRAT_PROCESSOR_APIC 0 #define ACPI_SRAT_MEMORY 1 #define ACPI_SRAT_PROCESSOR_x2APIC 2 --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155783307578415.245800161011744; Tue, 14 May 2019 04:24:35 -0700 (PDT) Received: from localhost ([127.0.0.1]:45892 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVXs-0007RB-Lx for importer@patchew.org; Tue, 14 May 2019 07:24:32 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48280) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVVX-0005za-Sa for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQVVW-0002Bp-MY for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:07 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33838 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVS-00024N-W6; Tue, 14 May 2019 07:22:03 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3790D76FB4572CE937D8; Tue, 14 May 2019 19:22:00 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:51 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:16 -0700 Message-ID: <1557832703-42620-4-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 03/10] acpi: add build_append_ghes_notify() helper for Hardware Error Notification X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It will help to add Hardware Error Notification to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Dongjiu Geng --- hw/acpi/aml-build.c | 22 ++++++++++++++++++++++ include/hw/acpi/aml-build.h | 8 ++++++++ 2 files changed, 30 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 555c24f..fb53f21 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -274,6 +274,28 @@ void build_append_gas(GArray *table, AmlAddressSpace a= s, build_append_int_noprefix(table, address, 8); } =20 +/* Hardware Error Notification + * ACPI 4.0: 17.3.2.7 Hardware Error Notification + */ +void build_append_ghes_notify(GArray *table, const uint8_t type, + uint8_t length, uint16_t config_write_enable, + uint32_t poll_interval, uint32_t vector, + uint32_t polling_threshold_value, + uint32_t polling_threshold_window, + uint32_t error_threshold_value, + uint32_t error_threshold_window) +{ + build_append_int_noprefix(table, type, 1); /* type */ + build_append_int_noprefix(table, length, 1); + build_append_int_noprefix(table, config_write_enable, 2); + build_append_int_noprefix(table, poll_interval, 4); + build_append_int_noprefix(table, vector, 4); + build_append_int_noprefix(table, polling_threshold_value, 4); + build_append_int_noprefix(table, polling_threshold_window, 4); + build_append_int_noprefix(table, error_threshold_value, 4); + build_append_int_noprefix(table, error_threshold_window, 4); +} + /* * Build NAME(XXXX, 0x00000000) where 0x00000000 is encoded as a dword, * and return the offset to 0x00000000 for runtime patching. diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 1a563ad..90c8ef8 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -411,6 +411,14 @@ build_append_gas_from_struct(GArray *table, const stru= ct AcpiGenericAddress *s) s->access_width, s->address); } =20 +void build_append_ghes_notify(GArray *table, const uint8_t type, + uint8_t length, uint16_t config_write_enable, + uint32_t poll_interval, uint32_t vector, + uint32_t polling_threshold_value, + uint32_t polling_threshold_window, + uint32_t error_threshold_value, + uint32_t error_threshold_window); + void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, uint64_t len, int node, MemoryAffinityFlags flags); =20 --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833078; cv=none; d=zoho.com; s=zohoarc; b=kJMyYXBMYHQ1r3HIpcaWkHBSu7ImIA+goGoqMS7qx/wG/L6X5y6lzG9hB0Fil/aNW+NtU1A9okkx2eDB2M99vCwOcWeD9gZEHeYuOAkFtZIl1kwWQXi9/359BCgEUpq/ep/2ujFYTVRtTAPRnlRwzYZTWQg4/L0j94j29jd5slA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833078; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Tue, 14 May 2019 07:22:09 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2214 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVU-00024W-NK; Tue, 14 May 2019 07:22:04 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 62B9D52063AC7E564E84; Tue, 14 May 2019 19:22:00 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:52 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:17 -0700 Message-ID: <1557832703-42620-5-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.190 Subject: [Qemu-devel] [PATCH v17 04/10] acpi: add build_append_ghes_generic_data() helper for Generic Error Data Entry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It will help to add Generic Error Data Entry to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Dongjiu Geng --- hw/acpi/aml-build.c | 32 ++++++++++++++++++++++++++++++++ include/hw/acpi/aml-build.h | 6 ++++++ 2 files changed, 38 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index fb53f21..102a288 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -296,6 +296,38 @@ void build_append_ghes_notify(GArray *table, const uin= t8_t type, build_append_int_noprefix(table, error_threshold_window, 4); } =20 +/* Generic Error Data Entry + * ACPI 4.0: 17.3.2.6.1 Generic Error Data + */ +void build_append_ghes_generic_data(GArray *table, const char *section_typ= e, + uint32_t error_severity, uint16_t revi= sion, + uint8_t validation_bits, uint8_t flags, + uint32_t error_data_length, uint8_t *f= ru_id, + uint8_t *fru_text, uint64_t time_stamp) +{ + int i; + + for (i =3D 0; i < 16; i++) { + build_append_int_noprefix(table, section_type[i], 1); + } + + build_append_int_noprefix(table, error_severity, 4); + build_append_int_noprefix(table, revision, 2); + build_append_int_noprefix(table, validation_bits, 1); + build_append_int_noprefix(table, flags, 1); + build_append_int_noprefix(table, error_data_length, 4); + + for (i =3D 0; i < 16; i++) { + build_append_int_noprefix(table, fru_id[i], 1); + } + + for (i =3D 0; i < 20; i++) { + build_append_int_noprefix(table, fru_text[i], 1); + } + + build_append_int_noprefix(table, time_stamp, 8); +} + /* * Build NAME(XXXX, 0x00000000) where 0x00000000 is encoded as a dword, * and return the offset to 0x00000000 for runtime patching. diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 90c8ef8..a71db2f 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -419,6 +419,12 @@ void build_append_ghes_notify(GArray *table, const uin= t8_t type, uint32_t error_threshold_value, uint32_t error_threshold_window); =20 +void build_append_ghes_generic_data(GArray *table, const char *section_typ= e, + uint32_t error_severity, uint16_t revi= sion, + uint8_t validation_bits, uint8_t flags, + uint32_t error_data_length, uint8_t *f= ru_id, + uint8_t *fru_text, uint64_t time_stamp= ); + void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, uint64_t len, int node, MemoryAffinityFlags flags); =20 --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833372; cv=none; d=zoho.com; s=zohoarc; b=P06vm4cLXB9CAqBSEQOW9BjbuvXmla0PNR949LfRae0XHXTEi6WVDuAio3FqyFH47J3Dzl0hwg6uo7l2PIFKQ3CEVu9mAozeXE8GyFAs5Nd5nHs/Bp0XVaPiKaaQ1oInZkBTLLzuFZapn/IsBQBLAYQv2LuAZhr14zGTtW+U9Jk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833372; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Tue, 14 May 2019 07:22:09 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2215 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVU-00024X-Eh; Tue, 14 May 2019 07:22:04 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 6B7BAB2814CF99DB80C7; Tue, 14 May 2019 19:22:00 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:53 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:18 -0700 Message-ID: <1557832703-42620-6-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.190 Subject: [Qemu-devel] [PATCH v17 05/10] acpi: add build_append_ghes_generic_status() helper for Generic Error Status Block X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It will help to add Generic Error Status Block to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Dongjiu Geng --- hw/acpi/aml-build.c | 14 ++++++++++++++ include/hw/acpi/aml-build.h | 6 ++++++ 2 files changed, 20 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 102a288..ce90970 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -296,6 +296,20 @@ void build_append_ghes_notify(GArray *table, const uin= t8_t type, build_append_int_noprefix(table, error_threshold_window, 4); } =20 +/* Generic Error Status Block + * ACPI 4.0: 17.3.2.6.1 Generic Error Data + */ +void build_append_ghes_generic_status(GArray *table, uint32_t block_status, + uint32_t raw_data_offset, uint32_t raw_data_length, + uint32_t data_length, uint32_t error_severity) +{ + build_append_int_noprefix(table, block_status, 4); + build_append_int_noprefix(table, raw_data_offset, 4); + build_append_int_noprefix(table, raw_data_length, 4); + build_append_int_noprefix(table, data_length, 4); + build_append_int_noprefix(table, error_severity, 4); +} + /* Generic Error Data Entry * ACPI 4.0: 17.3.2.6.1 Generic Error Data */ diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index a71db2f..1ec7e1b 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -425,6 +425,12 @@ void build_append_ghes_generic_data(GArray *table, con= st char *section_type, uint32_t error_data_length, uint8_t *f= ru_id, uint8_t *fru_text, uint64_t time_stamp= ); =20 +void +build_append_ghes_generic_status(GArray *table, uint32_t block_status, + uint32_t raw_data_offset, + uint32_t raw_data_length, + uint32_t data_length, uint32_t error_seve= rity); + void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, uint64_t len, int node, MemoryAffinityFlags flags); =20 --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833119; cv=none; d=zoho.com; s=zohoarc; b=K7cRUXpR3WNF6j5DAnWpZSnBIPyY/9Svo3RC3fB+FgMCBHtgIp6fOXNhkAqQx6ArY+YCj2gWr4G7TGclE4YKzWgqg985g6gMiMyOm2kAz6yJ28D5RRChnWf26JhyHQkmFBjtdYL/k9Hu0sX/07YwNPySUicII+L5BDgRIblTxQI= ARC-Message-Signature: i=1; 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Tue, 14 May 2019 07:25:16 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48426) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVVe-000660-23 for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQVVc-0002Hq-I5 for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:14 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34236 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVY-0002CL-Cc; Tue, 14 May 2019 07:22:08 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id F3D1959367B837C2F810; Tue, 14 May 2019 19:22:05 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:54 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:19 -0700 Message-ID: <1557832703-42620-7-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 06/10] docs: APEI GHES generation and CPER record description X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APEI/GHES detailed design document Signed-off-by: Dongjiu Geng --- docs/specs/acpi_hest_ghes.txt | 97 +++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 97 insertions(+) create mode 100644 docs/specs/acpi_hest_ghes.txt diff --git a/docs/specs/acpi_hest_ghes.txt b/docs/specs/acpi_hest_ghes.txt new file mode 100644 index 0000000..fbfc787 --- /dev/null +++ b/docs/specs/acpi_hest_ghes.txt @@ -0,0 +1,97 @@ +APEI tables generating and CPER record +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D + +Copyright (C) 2017 HuaWei Corporation. + +Design Details: +------------------- + + etc/acpi/tables etc/hardware_errors + =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D = =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D ++ +--------------------------+ +-----------------------+ +| | HEST | | address | = +--------------+ +| +--------------------------+ | registers | = | Error Status | +| | GHES1 | | +---------------------+ = | Data Block 1 | +| +--------------------------+ +--------->| |error_block_address1 |-------= ---->| +------------+ +| | ................. | | | +---------------------+ = | | CPER | +| | error_status_address-----+-+ +------->| |error_block_address2 |-------= -+ | | CPER | +| | ................. | | | +---------------------+ = | | | .... | +| | read_ack_register--------+-+ | | | .............. | = | | | CPER | +| | read_ack_preserve | | | +-----------------------+ = | | +------------+ +| | read_ack_write | | | +----->| |error_block_addressN |------+= | | Error Status | ++ +--------------------------+ | | | | +---------------------+ |= | | Data Block 2 | +| | GHES2 | +-+-+----->| |read_ack_register1 | |= +-->| +------------+ ++ +--------------------------+ | | | +---------------------+ |= | | CPER | +| | ................. | | | +--->| |read_ack_register2 | |= | | CPER | +| | error_status_address-----+---+ | | | +---------------------+ |= | | .... | +| | ................. | | | | | ............. | |= | | CPER | +| | read_ack_register--------+-----+-+ | +---------------------+ |= +-+------------+ +| | read_ack_preserve | | +->| |read_ack_registerN | |= | |.......... | +| | read_ack_write | | | | +---------------------+ |= | +------------+ ++ +--------------------------| | | |= | Error Status | +| | ............... | | | |= | Data Block N | ++ +--------------------------+ | | += ---->| +------------+ +| | GHESN | | | = | | CPER | ++ +--------------------------+ | | = | | CPER | +| | ................. | | | = | | .... | +| | error_status_address-----+-----+ | = | | CPER | +| | ................. | | = +-+------------+ +| | read_ack_register--------+---------+ +| | read_ack_preserve | +| | read_ack_write | ++ +--------------------------+ + +(1) QEMU generates the ACPI HEST table. This table goes in the current + "etc/acpi/tables" fw_cfg blob. Each error source has different + notification type. + +(2) A new fw_cfg blob called "etc/hardware_errors" is introduced. QEMU + also need to populate this blob. The "etc/hardwre_errors" fw_cfg blob + contains one address registers table and one Error Status Data Block + table, all of which are pre-allocated. + +(3) The address registers table contains N Error Block Address entries + and N Read Ack Address entries, the size for each entry is 8-byte. + The Error Status Data Block table contains N Error Status Data Block + entries, the size for each entry is 4096(0x1000) bytes. The total size + for "etc/hardware_errors" fw_cfg blob is (N * 8 * 2 + N * 4096) bytes. + +(4) QEMU generates the ACPI linker/loader script for the firmware + +(4a) The HEST table is part of "etc/acpi/tables", the firmware already + allocates the memory for it, because QEMU already generates an ALLOCATE + linker/loader command for it + +(4b) QEMU creates another ALLOCATE command for the "etc/hardware_errors" + blob. The firmware allocates memory for this blob and downloads it. + +(5) QEMU generates N ADD_POINTER commands, which patch address in the + "error_status_address" fields of the HEST table with a pointer to the + corresponding "address registers" in the downloaded "etc/hardware_erro= rs" + blob. + +(6) QEMU generates N ADD_POINTER commands, which patch address in the + "read_ack_register" fields of the HEST table with a pointer to the + corresponding "address registers" in the downloaded "etc/hardware_erro= rs" blob. + +(7) QEMU generates N ADD_POINTER commands for the firmware, which patch + address in the " error_block_address" fields with a pointer to the + respective "Error Status Data Block" in the downloaded "etc/hardware_e= rrors" + blob. + +(8) QEMU Defines a third and write-only fw_cfg blob which is called + "etc/hardware_errors_addr". Through that blob, the firmware can send b= ack + the guest-side allocation addresses to QEMU. The "etc/hardware_errors_= addr" + blob contains a 8-byte entry. QEMU generates a single WRITE_POINTER co= mmands + for the firmware, the firmware will write back the start address of + "etc/hardware_errors" blob to fw_cfg file "etc/hardware_errors_addr". = Then + Qemu will know the Error Status Data Block for every error source. Eac= h of + Error Status Data Block has fixed size which is 4096(0x1000). + +(9) When QEMU gets SIGBUS from the kernel, QEMU formats the CPER right into + guest memory, and then injects whatever interrupt (or assert whatever = GPIO line) + as a notification which is necessary for notifying the guest. + +(10) This notification (in virtual hardware) will be handled by guest kern= el, + guest APEI driver will read the CPER which is recorded by QEMU and do = the + recovery. --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833280; cv=none; d=zoho.com; s=zohoarc; b=bEFh2iQhrk3ZoGtpPRuu/UvFYFdsCsWoK38fI9sdMRmBTp319d+xRw5FdvDNPPzL8H60KuCxy/Gpbz3bK8H7llyA+OjATyyWPWRC9PwgzzMlXFUeuwEaZqXyBsB79d09T017J0c90S0hmPejSMNDjl51WMQxlCgDaomhyPCWAHk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833280; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=R72JTN82WjSohN6ylntW80LEOZjPETaoaCrAB+25uhM=; b=d1iSEFgxUcWA1l6Jxyde5XLbidjMAzR3sbk13GzBPWgHWdRBTXRXYBIvGyax7i5eLrhbsS+s11VXac95t9J5fo0LYmmEJnFJOrSDmWvjIGInNCbub2nTjkdwAf4V/BkHs7P1UmqMKBm5pR4q08bTPYfFDE9qMPxiBSrKxnUsf4M= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1557833280215650.338559004186; Tue, 14 May 2019 04:28:00 -0700 (PDT) Received: from localhost ([127.0.0.1]:45959 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVb4-0001zx-3W for importer@patchew.org; Tue, 14 May 2019 07:27:50 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48452) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hQVVj-00068n-Df for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hQVVh-0002Jw-7o for qemu-devel@nongnu.org; Tue, 14 May 2019 07:22:19 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34058 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVX-0002Ap-OO; Tue, 14 May 2019 07:22:08 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 429A2BF31E2B0D305826; Tue, 14 May 2019 19:22:05 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:55 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:20 -0700 Message-ID: <1557832703-42620-8-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 07/10] ACPI: Add APEI GHES table generation support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This implements APEI GHES Table generation via fw_cfg blobs. Now it only support GPIO-Signal and ARMv8 SEA two types of GHESv2 error source. Afterwards, we can extend the supported types if needed. For the CPER section type, currently it is memory section because kernel mainly wants userspace to handle the memory errors. This patch follows the spec ACPI 6.2 to build the Hardware Error Source table, for the detailed information, please refer to document: docs/specs/acpi_hest_ghes.txt Suggested-by: Laszlo Ersek Signed-off-by: Dongjiu Geng --- default-configs/arm-softmmu.mak | 1 + hw/acpi/Kconfig | 4 + hw/acpi/Makefile.objs | 1 + hw/acpi/acpi_ghes.c | 171 ++++++++++++++++++++++++++++++++++++= ++++ hw/acpi/aml-build.c | 2 + hw/arm/virt-acpi-build.c | 12 +++ include/hw/acpi/acpi_ghes.h | 79 +++++++++++++++++++ include/hw/acpi/aml-build.h | 1 + 8 files changed, 271 insertions(+) create mode 100644 hw/acpi/acpi_ghes.c create mode 100644 include/hw/acpi/acpi_ghes.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.= mak index 613d19a..7b33ae9 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -160,3 +160,4 @@ CONFIG_MUSICPAL=3Dy =20 # for realview and versatilepb CONFIG_LSI_SCSI_PCI=3Dy +CONFIG_ACPI_APEI=3Dy diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index eca3bee..5228a4b 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -23,6 +23,10 @@ config ACPI_NVDIMM bool depends on ACPI =20 +config ACPI_APEI + bool + depends on ACPI + config ACPI_VMGENID bool default y diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs index 2d46e37..5099ada 100644 --- a/hw/acpi/Makefile.objs +++ b/hw/acpi/Makefile.objs @@ -6,6 +6,7 @@ common-obj-$(CONFIG_ACPI_MEMORY_HOTPLUG) +=3D memory_hotplu= g.o common-obj-$(CONFIG_ACPI_CPU_HOTPLUG) +=3D cpu.o common-obj-$(CONFIG_ACPI_NVDIMM) +=3D nvdimm.o common-obj-$(CONFIG_ACPI_VMGENID) +=3D vmgenid.o +common-obj-$(CONFIG_ACPI_APEI) +=3D acpi_ghes.o common-obj-$(call lnot,$(CONFIG_ACPI_X86)) +=3D acpi-stub.o =20 common-obj-y +=3D acpi_interface.o diff --git a/hw/acpi/acpi_ghes.c b/hw/acpi/acpi_ghes.c new file mode 100644 index 0000000..d03e797 --- /dev/null +++ b/hw/acpi/acpi_ghes.c @@ -0,0 +1,171 @@ +/* Support for generating APEI tables and record CPER for Guests + * + * Copyright (C) 2017 HuaWei Corporation. + * + * Author: Dongjiu Geng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/acpi_ghes.h" +#include "hw/nvram/fw_cfg.h" +#include "sysemu/sysemu.h" +#include "qemu/error-report.h" + +/* Build table for the hardware error fw_cfg blob */ +void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linke= r) +{ + int i; + + /* + * | +--------------------------+ + * | | error_block_address | + * | | .......... | + * | +--------------------------+ + * | | read_ack_register | + * | | ........... | + * | +--------------------------+ + * | | Error Status Data Block | + * | | ........ | + * | +--------------------------+ + */ + + /* Build error_block_address */ + build_append_int_noprefix((void *)hardware_errors, 0, + GHES_ADDRESS_SIZE * ACPI_HEST_ERROR_SOURCE_COUNT); + + /* Build read_ack_register */ + for (i =3D 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++) + /* Initialize the value of read_ack_register to 1, so GHES can be + * writeable in the first time + */ + build_append_int_noprefix((void *)hardware_errors, 1, GHES_ADDRESS= _SIZE); + + /* Build Error Status Data Block */ + build_append_int_noprefix((void *)hardware_errors, 0, + GHES_MAX_RAW_DATA_LENGTH * ACPI_HEST_ERROR_SOURCE_COUN= T); + + /* Allocate guest memory for the hardware error fw_cfg blob */ + bios_linker_loader_alloc(linker, GHES_ERRORS_FW_CFG_FILE, hardware_err= ors, + 1, false); +} + +/* Build Hardware Error Source Table */ +void build_apei_hest(GArray *table_data, GArray *hardware_errors, + BIOSLinker *linker) +{ + uint32_t i, error_status_block_offset, length =3D table_data->len; + + /* Reserve Hardware Error Source Table header size */ + acpi_data_push(table_data, sizeof(AcpiTableHeader)); + + /* Set the error source counts */ + build_append_int_noprefix(table_data, ACPI_HEST_ERROR_SOURCE_COUNT, 4); + + for (i =3D 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++) { + /* Generic Hardware Error Source version 2(GHESv2 - Type 10) + */ + build_append_int_noprefix(table_data, + ACPI_HEST_SOURCE_GENERIC_ERROR_V2, 2); /* type */ + build_append_int_noprefix(table_data, cpu_to_le16(i), 2); /* sourc= e id */ + build_append_int_noprefix(table_data, 0xffff, 2); /* related sourc= e id */ + build_append_int_noprefix(table_data, 0, 1); /* flags */ + + build_append_int_noprefix(table_data, 1, 1); /* enabled */ + + /* Number of Records To Pre-allocate */ + build_append_int_noprefix(table_data, 1, 4); + /* Max Sections Per Record */ + build_append_int_noprefix(table_data, 1, 4); + /* Max Raw Data Length */ + build_append_int_noprefix(table_data, GHES_MAX_RAW_DATA_LENGTH, 4); + + /* Build error status address*/ + build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWor= d access */, 0); + bios_linker_loader_add_pointer(linker, + ACPI_BUILD_TABLE_FILE, ERROR_STATUS_ADDRESS_OFFSET(length, i), + GHES_ADDRESS_SIZE, GHES_ERRORS_FW_CFG_FILE, i * GHES_ADDRESS_S= IZE); + + /* Build Hardware Error Notification + * Now only enable GPIO-Signal and ARMv8 SEA notification types + */ + if (i =3D=3D 0) { + build_append_ghes_notify(table_data, ACPI_HEST_NOTIFY_GPIO, 28, + 0, 0, 0, 0, 0, 0, 0); + } else if (i =3D=3D 1) { + build_append_ghes_notify(table_data, ACPI_HEST_NOTIFY_SEA, 28,= 0, + 0, 0, 0, 0, 0, 0); + } + + /* Error Status Block Length */ + build_append_int_noprefix(table_data, + cpu_to_le32(GHES_MAX_RAW_DATA_LENGTH), 4); + + /* Build Read ACK register + * ACPI 6.1/6.2: 18.3.2.8 Generic Hardware Error Source + * version 2 (GHESv2 - Type 10) + */ + build_append_gas(table_data, AML_SYSTEM_MEMORY, 0x40, 0, 4 /* QWor= d access */, 0); + bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, + READ_ACK_REGISTER_ADDRESS_OFFSET(length, i), GHES_ADDRESS_SIZE, + GHES_ERRORS_FW_CFG_FILE, + (ACPI_HEST_ERROR_SOURCE_COUNT + i) * GHES_ADDRESS_SIZE); + + /* Build Read Ack Preserve and Read Ack Writer */ + build_append_int_noprefix(table_data, cpu_to_le64(ReadAckPreserve)= , 8); + build_append_int_noprefix(table_data, cpu_to_le64(ReadAckWrite), 8= ); + } + + /* Generic Error Status Block offset in the hardware error fw_cfg blob= */ + error_status_block_offset =3D GHES_ADDRESS_SIZE * 2 * + ACPI_HEST_ERROR_SOURCE_COUNT; + + for (i =3D 0; i < ACPI_HEST_ERROR_SOURCE_COUNT; i++) + /* Patch address of Error Status Data Block into + * the error_block_address of hardware_errors fw_cfg blob + */ + bios_linker_loader_add_pointer(linker, + GHES_ERRORS_FW_CFG_FILE, GHES_ADDRESS_SIZE * i, GHES_ADDRESS_S= IZE, + GHES_ERRORS_FW_CFG_FILE, + error_status_block_offset + i * GHES_MAX_RAW_DATA_LENGTH); + + /* write address of hardware_errors fw_cfg blob into the + * hardware_errors_addr fw_cfg blob. + */ + bios_linker_loader_write_pointer(linker, GHES_DATA_ADDR_FW_CFG_FILE, + 0, GHES_ADDRESS_SIZE, GHES_ERRORS_FW_CFG_FILE, 0); + + build_header(linker, table_data, + (void *)(table_data->data + length), "HEST", + table_data->len - length, 1, NULL, "GHES"); +} + +static GhesState ges; +void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_error) +{ + + size_t size =3D 2 * GHES_ADDRESS_SIZE + GHES_MAX_RAW_DATA_LENGTH; + size_t request_block_size =3D ACPI_HEST_ERROR_SOURCE_COUNT * size; + + /* Create a read-only fw_cfg file for GHES */ + fw_cfg_add_file(s, GHES_ERRORS_FW_CFG_FILE, hardware_error->data, + request_block_size); + + /* Create a read-write fw_cfg file for Address */ + fw_cfg_add_file_callback(s, GHES_DATA_ADDR_FW_CFG_FILE, NULL, NULL, NU= LL, + &ges.ghes_addr_le, sizeof(ges.ghes_addr_le), false); +} diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index ce90970..3f2b84f 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1645,6 +1645,7 @@ void acpi_build_tables_init(AcpiBuildTables *tables) tables->table_data =3D g_array_new(false, true /* clear */, 1); tables->tcpalog =3D g_array_new(false, true /* clear */, 1); tables->vmgenid =3D g_array_new(false, true /* clear */, 1); + tables->hardware_errors =3D g_array_new(false, true /* clear */, 1); tables->linker =3D bios_linker_loader_init(); } =20 @@ -1655,6 +1656,7 @@ void acpi_build_tables_cleanup(AcpiBuildTables *table= s, bool mfre) g_array_free(tables->table_data, true); g_array_free(tables->tcpalog, mfre); g_array_free(tables->vmgenid, mfre); + g_array_free(tables->hardware_errors, mfre); } =20 /* diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index bf9c0bc..54f4ba5 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -45,6 +45,7 @@ #include "hw/arm/virt.h" #include "sysemu/numa.h" #include "kvm_arm.h" +#include "hw/acpi/acpi_ghes.h" =20 #define ARM_SPI_BASE 32 #define ACPI_POWER_BUTTON_DEVICE "PWRB" @@ -808,6 +809,12 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildT= ables *tables) acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); =20 + if (!vmc->no_ras) { + acpi_add_table(table_offsets, tables_blob); + build_hardware_error_table(tables->hardware_errors, tables->linker= ); + build_apei_hest(tables_blob, tables->hardware_errors, tables->link= er); + } + if (nb_numa_nodes > 0) { acpi_add_table(table_offsets, tables_blob); build_srat(tables_blob, tables->linker, vms); @@ -901,6 +908,7 @@ static const VMStateDescription vmstate_virt_acpi_build= =3D { =20 void virt_acpi_setup(VirtMachineState *vms) { + VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); AcpiBuildTables tables; AcpiBuildState *build_state; =20 @@ -932,6 +940,10 @@ void virt_acpi_setup(VirtMachineState *vms) fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->d= ata, acpi_data_len(tables.tcpalog)); =20 + if (!vmc->no_ras) { + ghes_add_fw_cfg(vms->fw_cfg, tables.hardware_errors); + } + build_state->rsdp_mr =3D acpi_add_rom_blob(build_state, tables.rsdp, ACPI_BUILD_RSDP_FILE, 0); =20 diff --git a/include/hw/acpi/acpi_ghes.h b/include/hw/acpi/acpi_ghes.h new file mode 100644 index 0000000..38fd87c --- /dev/null +++ b/include/hw/acpi/acpi_ghes.h @@ -0,0 +1,79 @@ +/* Support for generating APEI tables and record CPER for Guests + * + * Copyright (C) 2017 HuaWei Corporation. + * + * Author: Dongjiu Geng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#ifndef ACPI_GHES_H +#define ACPI_GHES_H + +#include "hw/acpi/bios-linker-loader.h" + +#define GHES_ERRORS_FW_CFG_FILE "etc/hardware_errors" +#define GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr" + +/* The size of Address field in Generic Address Structure, + * ACPI 2.0/3.0: 5.2.3.1 Generic Address Structure. + */ +#define GHES_ADDRESS_SIZE 8 + +#define GHES_DATA_LENGTH 72 +#define GHES_CPER_LENGTH 80 + +#define ReadAckPreserve 0xfffffffe +#define ReadAckWrite 0x1 + +/* The max size in bytes for one error block */ +#define GHES_MAX_RAW_DATA_LENGTH 0x1000 +/* Now only have GPIO-Signal and ARMv8 SEA notification types error sources + */ +#define ACPI_HEST_ERROR_SOURCE_COUNT 2 + +/* + * | +--------------------------+ 0 + * | | Header | + * | +--------------------------+ 40---+- + * | | ................. | | + * | | error_status_address-----+ 60 | + * | | ................. | | + * | | read_ack_register--------+ 104 92 + * | | read_ack_preserve | | + * | | read_ack_write | | + * + +--------------------------+ 132--+- + * + * From above GHES definition, the error status address offset is 60; + * the Read ack register offset is 104, the whole size of GHESv2 is 92 + */ + +/* The error status address offset in GHES */ +#define ERROR_STATUS_ADDRESS_OFFSET(start_addr, n) (start_addr + 60 + \ + offsetof(struct AcpiGenericAddress, address) + n * 92) + +/* The read Ack register offset in GHES */ +#define READ_ACK_REGISTER_ADDRESS_OFFSET(start_addr, n) (start_addr + 104 = + \ + offsetof(struct AcpiGenericAddress, address) + n * 92) + +typedef struct GhesState { + uint64_t ghes_addr_le; +} GhesState; + +void build_apei_hest(GArray *table_data, GArray *hardware_error, + BIOSLinker *linker); + +void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linke= r); +void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_errors); +#endif diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 1ec7e1b..78c0252 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -220,6 +220,7 @@ struct AcpiBuildTables { GArray *rsdp; GArray *tcpalog; GArray *vmgenid; + GArray *hardware_errors; BIOSLinker *linker; } AcpiBuildTables; =20 --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833755; cv=none; d=zoho.com; s=zohoarc; b=E2fsiF9mUnR8L/QvzBPFGTa+Igfyv5VToO5eT+vTEcTwI6CQpwovOYqcC3gD0o5BAKKTVjSKyvBnwOG9O8aF5MRVjax/6nuEn2X6mEcNaTelsqs7DxyANK+6HnfXnbOkgQiYs7EuhkoC73nTyzyt4XQYQ0NCDmtDZSxIteUy1Ug= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833755; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Tue, 14 May 2019 07:22:13 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34212 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVY-0002BX-0H; Tue, 14 May 2019 07:22:08 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 56F04EF173E4AFE96C18; Tue, 14 May 2019 19:22:05 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:56 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:21 -0700 Message-ID: <1557832703-42620-9-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 08/10] KVM: Move related hwpoison page functions to accel/kvm/ folder X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" kvm_hwpoison_page_add() and kvm_unpoison_all() will be used both by X86 and ARM platforms, so move these functions to a common accel/kvm/ folder to avoid duplicate code. Signed-off-by: Dongjiu Geng --- accel/kvm/kvm-all.c | 33 +++++++++++++++++++++++++++++++++ include/exec/ram_addr.h | 24 ++++++++++++++++++++++++ target/arm/kvm.c | 3 +++ target/i386/kvm.c | 34 +--------------------------------- 4 files changed, 61 insertions(+), 33 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 524c4dd..b9f9f29 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -625,6 +625,39 @@ int kvm_vm_check_extension(KVMState *s, unsigned int e= xtension) return ret; } =20 +typedef struct HWPoisonPage { + ram_addr_t ram_addr; + QLIST_ENTRY(HWPoisonPage) list; +} HWPoisonPage; + +static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =3D + QLIST_HEAD_INITIALIZER(hwpoison_page_list); + +void kvm_unpoison_all(void *param) +{ + HWPoisonPage *page, *next_page; + + QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) { + QLIST_REMOVE(page, list); + qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE); + g_free(page); + } +} + +void kvm_hwpoison_page_add(ram_addr_t ram_addr) +{ + HWPoisonPage *page; + + QLIST_FOREACH(page, &hwpoison_page_list, list) { + if (page->ram_addr =3D=3D ram_addr) { + return; + } + } + page =3D g_new(HWPoisonPage, 1); + page->ram_addr =3D ram_addr; + QLIST_INSERT_HEAD(&hwpoison_page_list, page, list); +} + static uint32_t adjust_ioeventfd_endianness(uint32_t val, uint32_t size) { #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TARGET_WORDS_BIGENDIAN) diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 139ad79..193b0a7 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -116,6 +116,30 @@ void qemu_ram_free(RAMBlock *block); =20 int qemu_ram_resize(RAMBlock *block, ram_addr_t newsize, Error **errp); =20 +/** + * kvm_hwpoison_page_add: + * + * Parameters: + * @ram_addr: the address in the RAM for the poisoned page + * + * Add a poisoned page to the list + * + * Return: None. + */ +void kvm_hwpoison_page_add(ram_addr_t ram_addr); + +/** + * kvm_unpoison_all: + * + * Parameters: + * @param: some data may be passed to this function + * + * Free and remove all the poisoned pages in the list + * + * Return: None. + */ +void kvm_unpoison_all(void *param); + #define DIRTY_CLIENTS_ALL ((1 << DIRTY_MEMORY_NUM) - 1) #define DIRTY_CLIENTS_NOCODE (DIRTY_CLIENTS_ALL & ~(1 << DIRTY_MEMORY_COD= E)) =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 5995634..6d3b25b 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -29,6 +29,7 @@ #include "exec/address-spaces.h" #include "hw/boards.h" #include "qemu/log.h" +#include "exec/ram_addr.h" =20 const KVMCapabilityInfo kvm_arch_required_capabilities[] =3D { KVM_CAP_LAST_INFO @@ -187,6 +188,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s) =20 cap_has_mp_state =3D kvm_check_extension(s, KVM_CAP_MP_STATE); =20 + qemu_register_reset(kvm_unpoison_all, NULL); + return 0; } =20 diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 3b29ce5..9bdb879 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -46,6 +46,7 @@ #include "migration/blocker.h" #include "exec/memattrs.h" #include "trace.h" +#include "exec/ram_addr.h" =20 //#define DEBUG_KVM =20 @@ -467,39 +468,6 @@ uint32_t kvm_arch_get_supported_msr_feature(KVMState *= s, uint32_t index) } =20 =20 -typedef struct HWPoisonPage { - ram_addr_t ram_addr; - QLIST_ENTRY(HWPoisonPage) list; -} HWPoisonPage; - -static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =3D - QLIST_HEAD_INITIALIZER(hwpoison_page_list); - -static void kvm_unpoison_all(void *param) -{ - HWPoisonPage *page, *next_page; - - QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) { - QLIST_REMOVE(page, list); - qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE); - g_free(page); - } -} - -static void kvm_hwpoison_page_add(ram_addr_t ram_addr) -{ - HWPoisonPage *page; - - QLIST_FOREACH(page, &hwpoison_page_list, list) { - if (page->ram_addr =3D=3D ram_addr) { - return; - } - } - page =3D g_new(HWPoisonPage, 1); - page->ram_addr =3D ram_addr; - QLIST_INSERT_HEAD(&hwpoison_page_list, page, list); -} - static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap, int *max_banks) { --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Tue, 14 May 2019 07:22:08 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id C7B803012A4F42748010; Tue, 14 May 2019 19:22:05 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:57 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:22 -0700 Message-ID: <1557832703-42620-10-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 09/10] target-arm: kvm64: inject synchronous External Abort X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add synchronous external abort injection logic, setup exception type and syndrome value. When switch to guest, it will jump to the synchronous external abort vector table entry. The ESR_ELx.DFSC is set to synchronous external abort(0x10), and ESR_ELx.FnV is set to not valid(0x1), which will tell guest that FAR is not valid and hold an UNKNOWN value. These value will be set to KVM register structures through KVM_SET_ONE_REG IOCTL. Signed-off-by: Dongjiu Geng --- target/arm/internals.h | 5 +++-- target/arm/kvm64.c | 34 ++++++++++++++++++++++++++++++++++ target/arm/op_helper.c | 2 +- 3 files changed, 38 insertions(+), 3 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 587a1dd..4d67a91 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -451,13 +451,14 @@ static inline uint32_t syn_insn_abort(int same_el, in= t ea, int s1ptw, int fsc) | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc; } =20 -static inline uint32_t syn_data_abort_no_iss(int same_el, +static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv, int ea, int cm, int s1ptw, int wnr, int fsc) { return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) | ARM_EL_IL - | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc; + | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7) + | (wnr << 6) | fsc; } =20 static inline uint32_t syn_data_abort_with_iss(int same_el, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index e3ba149..c7bdc6a 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -697,6 +697,40 @@ int kvm_arm_cpreg_level(uint64_t regidx) return KVM_PUT_RUNTIME_STATE; } =20 +/* Inject synchronous external abort */ +static void kvm_inject_arm_sea(CPUState *c) +{ + ARMCPU *cpu =3D ARM_CPU(c); + CPUARMState *env =3D &cpu->env; + CPUClass *cc =3D CPU_GET_CLASS(c); + uint32_t esr; + bool same_el; + + /** + * set the exception type to synchronous data abort + * and the target exception Level to EL1. + */ + c->exception_index =3D EXCP_DATA_ABORT; + env->exception.target_el =3D 1; + + /* + * Set the DFSC to synchronous external abort and set FnV to not valid, + * this will tell guest the FAR_ELx is UNKNOWN for this abort. + */ + + /* This exception comes from lower or current exception level. */ + same_el =3D arm_current_el(env) =3D=3D env->exception.target_el; + esr =3D syn_data_abort_no_iss(same_el, 1, 0, 0, 0, 0, 0x10); + + env->exception.syndrome =3D esr; + + /** + * The vcpu thread already hold BQL, so no need hold again when + * calling do_interrupt + */ + cc->do_interrupt(c); +} + #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) =20 diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 8698b4d..d43134a 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -109,7 +109,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t te= mplate_syn, * ISV field. */ if (!(template_syn & ARM_EL_ISV) || target_el !=3D 2 || s1ptw) { - syn =3D syn_data_abort_no_iss(same_el, + syn =3D syn_data_abort_no_iss(same_el, 0, ea, 0, s1ptw, is_write, fsc); } else { /* Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template --=20 1.8.3.1 From nobody Fri Apr 26 02:38:39 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1557833641; cv=none; d=zoho.com; s=zohoarc; b=Ly2GUCd4BzOVQqE84ul84uLtltORRQDepl8Ox9kHkeetNLgxfgDheYTm9iKDIbxWcADU/tHHTXK+M40l8Mts5M1J+uICRCxBBUVWylcwWVUkoC74PNGg/fu6QrmhsoJNYPuDU5jmPAwSJYNyGhmwF+/2SMqw8AQx5GYsGKDbsok= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1557833641; h=Content-Type:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Tue, 14 May 2019 07:22:14 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34060 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hQVVX-0002Am-NE; Tue, 14 May 2019 07:22:08 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 4D939F7E121535E2F3EE; Tue, 14 May 2019 19:22:05 +0800 (CST) Received: from ros.huawei.com (10.143.28.118) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Tue, 14 May 2019 19:21:58 +0800 From: Dongjiu Geng To: , , , , , , , , , , , , , , , , , Date: Tue, 14 May 2019 04:18:23 -0700 Message-ID: <1557832703-42620-11-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> References: <1557832703-42620-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.118] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 45.249.212.32 Subject: [Qemu-devel] [PATCH v17 10/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add SIGBUS signal handler. In this handler, it checks the SIGBUS type, translates the host VA delivered by host to guest PA, then fill this PA to guest APEI GHES memory, then notify guest according to the SIGBUS type. If guest accesses the poisoned memory, it generates Synchronous External Abort(SEA). Then host kernel gets an APEI notification and call memory_fail= ure() to unmapped the affected page for the guest's stage 2, finally return to guest. Guest continues to access PG_hwpoison page, it will trap to KVM as stage2 f= ault, then a SIGBUS_MCEERR_AR synchronous signal is delivered to Qemu, Qemu recor= d this error address into guest APEI GHES memory and notify guest using Synchronous-External-Abort(SEA). Suggested-by: James Morse Signed-off-by: Dongjiu Geng --- hw/acpi/acpi_ghes.c | 177 ++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/acpi/acpi_ghes.h | 6 +- include/sysemu/kvm.h | 2 +- target/arm/kvm64.c | 39 ++++++++++ 4 files changed, 222 insertions(+), 2 deletions(-) diff --git a/hw/acpi/acpi_ghes.c b/hw/acpi/acpi_ghes.c index d03e797..06b7374 100644 --- a/hw/acpi/acpi_ghes.c +++ b/hw/acpi/acpi_ghes.c @@ -26,6 +26,101 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" =20 +/* UEFI 2.6: N.2.5 Memory Error Section */ +static void build_append_mem_cper(GArray *table, uint64_t error_physical_a= ddr) +{ + /* + * Memory Error Record + */ + build_append_int_noprefix(table, + (1UL << 14) | /* Type Valid */ + (1UL << 1) /* Physical Address Valid */, + 8); + /* Memory error status information */ + build_append_int_noprefix(table, 0, 8); + /* The physical address at which the memory error occurred */ + build_append_int_noprefix(table, error_physical_addr, 8); + build_append_int_noprefix(table, 0, 48); + build_append_int_noprefix(table, 0 /* Unknown error */, 1); + build_append_int_noprefix(table, 0, 7); +} + +static int ghes_record_mem_error(uint64_t error_block_address, + uint64_t error_physical_addr) +{ + GArray *block; + uint64_t current_block_length; + uint32_t data_length; + /* Memory section */ + char mem_section_id_le[] =3D {0x14, 0x11, 0xBC, 0xA5, 0x64, 0x6F, 0xDE, + 0x4E, 0xB8, 0x63, 0x3E, 0x83, 0xED, 0x7C, + 0x83, 0xB1}; + uint8_t fru_id[16] =3D {0}; + uint8_t fru_text[20] =3D {0}; + + /* Generic Error Status Block + * | +---------------------+ + * | | block_status | + * | +---------------------+ + * | | raw_data_offset | + * | +---------------------+ + * | | raw_data_length | + * | +---------------------+ + * | | data_length | + * | +---------------------+ + * | | error_severity | + * | +---------------------+ + */ + block =3D g_array_new(false, true /* clear */, 1); + + /* Get the length of the Generic Error Data Entries */ + cpu_physical_memory_read(error_block_address + + offsetof(AcpiGenericErrorStatus, data_length), &data_length, 4); + + /* The current whole length of the generic error status block */ + current_block_length =3D sizeof(AcpiGenericErrorStatus) + le32_to_cpu(= data_length); + + /* This is the length if adding a new generic error data entry*/ + data_length +=3D GHES_DATA_LENGTH; + data_length +=3D GHES_MEM_CPER_LENGTH; + + /* Check whether it will run out of the preallocated memory if adding = a new + * generic error data entry + */ + if ((data_length + sizeof(AcpiGenericErrorStatus)) > GHES_MAX_RAW_DATA= _LENGTH) { + error_report("Record CPER out of boundary!!!"); + return GHES_CPER_FAIL; + } + + /* Build the new generic error status block header */ + build_append_ghes_generic_status(block, cpu_to_le32(ACPI_GEBS_UNCORREC= TABLE), 0, 0, + cpu_to_le32(data_length), cpu_to_le32(ACPI_CPER_SEV_RECOVERABLE)); + + /* Write back above generic error status block header to guest memory = */ + cpu_physical_memory_write(error_block_address, block->data, + block->len); + + /* Add a new generic error data entry */ + + data_length =3D block->len; + /* Build this new generic error data entry header */ + build_append_ghes_generic_data(block, mem_section_id_le, + cpu_to_le32(ACPI_CPER_SEV_RECOVERABLE), cpu_to_le32(0x= 300), 0, 0, + cpu_to_le32(80)/* the total size of Memory Error Recor= d */, fru_id, + fru_text, 0); + + /* Build the memory section CPER for above new generic error data entr= y */ + build_append_mem_cper(block, error_physical_addr); + + /* Write back above this new generic error data entry to guest memory = */ + cpu_physical_memory_write(error_block_address + current_block_length, + block->data + data_length, block->len - data_length); + + g_array_free(block, true); + + return GHES_CPER_OK; +} + /* Build table for the hardware error fw_cfg blob */ void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linke= r) { @@ -169,3 +264,85 @@ void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_e= rror) fw_cfg_add_file_callback(s, GHES_DATA_ADDR_FW_CFG_FILE, NULL, NULL, NU= LL, &ges.ghes_addr_le, sizeof(ges.ghes_addr_le), false); } + +bool ghes_record_errors(uint32_t notify, uint64_t physical_address) +{ + uint64_t error_block_addr, read_ack_register_addr; + int read_ack_register =3D 0, loop =3D 0; + uint64_t start_addr =3D le32_to_cpu(ges.ghes_addr_le); + bool ret =3D GHES_CPER_FAIL; + const uint8_t error_source_id[] =3D { 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0, 1}; + + /* + * | +---------------------+ ges.ghes_addr_le + * | |error_block_address0 | + * | +---------------------+ --+-- + * | | ............. | GHES_ADDRESS_SIZE + * | +---------------------+ --+-- + * | |error_block_addressN | + * | +---------------------+ + * | | read_ack_register0 | + * | +---------------------+ --+-- + * | | ............. | GHES_ADDRESS_SIZE + * | +---------------------+ --+-- + * | | read_ack_registerN | + * | +---------------------+ --+-- + * | | CPER | | + * | | .... | GHES_MAX_RAW_DATA_LENGT + * | | CPER | | + * | +---------------------+ --+-- + * | | .......... | + * | +---------------------+ + * | | CPER | + * | | .... | + * | | CPER | + * | +---------------------+ + */ + if (physical_address && notify < ACPI_HEST_NOTIFY_RESERVED) { + /* Find and check the source id for this new CPER */ + if (error_source_id[notify] !=3D 0xff) { + start_addr +=3D error_source_id[notify] * GHES_ADDRESS_SIZE; + } else { + goto out; + } + + cpu_physical_memory_read(start_addr, &error_block_addr, + GHES_ADDRESS_SIZE); + + read_ack_register_addr =3D start_addr + + ACPI_HEST_ERROR_SOURCE_COUNT * GHES_ADDRESS_SIZE; +retry: + cpu_physical_memory_read(read_ack_register_addr, + &read_ack_register, GHES_ADDRESS_SIZE); + + /* zero means OSPM does not acknowledge the error */ + if (!read_ack_register) { + if (loop < 3) { + usleep(100 * 1000); + loop++; + goto retry; + } else { + error_report("OSPM does not acknowledge previous error," + " so can not record CPER for current error, forcibly a= cknowledge" + " previous error to avoid blocking next time CPER reco= rd! Exit"); + read_ack_register =3D 1; + cpu_physical_memory_write(read_ack_register_addr, + &read_ack_register, GHES_ADDRESS_SIZE); + } + } else { + if (error_block_addr) { + read_ack_register =3D 0; + /* Clear the Read Ack Register, OSPM will write it to 1 wh= en + * acknowledge this error. + */ + cpu_physical_memory_write(read_ack_register_addr, + &read_ack_register, GHES_ADDRESS_SIZE); + ret =3D ghes_record_mem_error(error_block_addr, physical_a= ddress); + } + } + } + +out: + return ret; +} diff --git a/include/hw/acpi/acpi_ghes.h b/include/hw/acpi/acpi_ghes.h index 38fd87c..6b38097 100644 --- a/include/hw/acpi/acpi_ghes.h +++ b/include/hw/acpi/acpi_ghes.h @@ -32,11 +32,14 @@ #define GHES_ADDRESS_SIZE 8 =20 #define GHES_DATA_LENGTH 72 -#define GHES_CPER_LENGTH 80 +#define GHES_MEM_CPER_LENGTH 80 =20 #define ReadAckPreserve 0xfffffffe #define ReadAckWrite 0x1 =20 +#define GHES_CPER_OK 1 +#define GHES_CPER_FAIL 0 + /* The max size in bytes for one error block */ #define GHES_MAX_RAW_DATA_LENGTH 0x1000 /* Now only have GPIO-Signal and ARMv8 SEA notification types error sources @@ -76,4 +79,5 @@ void build_apei_hest(GArray *table_data, GArray *hardware= _error, =20 void build_hardware_error_table(GArray *hardware_errors, BIOSLinker *linke= r); void ghes_add_fw_cfg(FWCfgState *s, GArray *hardware_errors); +bool ghes_record_errors(uint32_t notify, uint64_t error_physical_addr); #endif diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index a6d1cd1..1d1a7a8 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -377,7 +377,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id); /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ unsigned long kvm_arch_vcpu_id(CPUState *cpu); =20 -#ifdef TARGET_I386 +#if defined(TARGET_I386) || defined(TARGET_AARCH64) #define KVM_HAVE_MCE_INJECTION 1 void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); #endif diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index c7bdc6a..d2eac28 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -27,6 +27,10 @@ #include "kvm_arm.h" #include "internals.h" #include "hw/arm/arm.h" +#include "exec/ram_addr.h" +#include "hw/acpi/acpi-defs.h" +#include "hw/acpi/acpi_ghes.h" +#include "hw/acpi/acpi.h" =20 static bool have_guest_debug; =20 @@ -1029,6 +1033,41 @@ int kvm_arch_get_registers(CPUState *cs) return ret; } =20 +void kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr) +{ + ram_addr_t ram_addr; + hwaddr paddr; + + assert(code =3D=3D BUS_MCEERR_AR || code =3D=3D BUS_MCEERR_AO); + + if (acpi_enabled && addr) { + ram_addr =3D qemu_ram_addr_from_host(addr); + if (ram_addr !=3D RAM_ADDR_INVALID && + kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)= ) { + kvm_hwpoison_page_add(ram_addr); + /* Asynchronous signal will be masked by main thread, so + * only handle synchronous signal. + */ + if (code =3D=3D BUS_MCEERR_AR) { + kvm_cpu_synchronize_state(c); + if (GHES_CPER_FAIL !=3D ghes_record_errors(ACPI_HEST_NOTIF= Y_SEA, paddr)) { + kvm_inject_arm_sea(c); + } else { + fprintf(stderr, "failed to record the error\n"); + } + } + return; + } + fprintf(stderr, "Hardware memory error for memory used by " + "QEMU itself instead of guest system!\n"); + } + + if (code =3D=3D BUS_MCEERR_AR) { + fprintf(stderr, "Hardware memory error!\n"); + exit(1); + } +} + /* C6.6.29 BRK instruction */ static const uint32_t brk_insn =3D 0xd4200000; =20 --=20 1.8.3.1