From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849551353211.63461083079767; Fri, 29 Mar 2019 01:52:31 -0700 (PDT) Received: from localhost ([127.0.0.1]:48850 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nFQ-0001NA-2L for importer@patchew.org; Fri, 29 Mar 2019 04:52:24 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48176) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nCs-0007fK-TQ for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nCq-0006X5-Ub for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:46 -0400 Received: from mga06.intel.com ([134.134.136.31]:30613) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCn-0006TI-Pm; Fri, 29 Mar 2019 04:49:42 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:35 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:34 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706905" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:37 +0800 Message-Id: <1553849325-44201-2-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 1/9] cpu/topology: add struct CpuTopology to MachineState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- include/hw/arm/virt.h | 2 +- include/hw/boards.h | 8 ++++++++ include/sysemu/sysemu.h | 2 +- vl.c | 7 ++++++- 4 files changed, 16 insertions(+), 3 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 507517c..724da0c 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -123,7 +123,7 @@ typedef struct { struct arm_boot_info bootinfo; MemMapEntry *memmap; const int *irqmap; - int smp_cpus; + unsigned int smp_cpus; void *fdt; int fdt_size; uint32_t clock_phandle; diff --git a/include/hw/boards.h b/include/hw/boards.h index e231860..cbde276 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -231,6 +231,13 @@ typedef struct DeviceMemoryState { MemoryRegion mr; } DeviceMemoryState; =20 +typedef struct CpuTopology { + unsigned int smp_cpus; + unsigned int smp_cores; + unsigned int smp_threads; + unsigned int max_cpus; +} CpuTopology; + /** * MachineState: */ @@ -273,6 +280,7 @@ struct MachineState { const char *cpu_type; AccelState *accelerator; CPUArchIdList *possible_cpus; + CpuTopology topo; struct NVDIMMState *nvdimms_state; }; =20 diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 6065d9e..c0d7d7c 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -100,7 +100,7 @@ extern const char *keyboard_layout; extern int win2k_install_hack; extern int alt_grab; extern int ctrl_grab; -extern int smp_cpus; +extern unsigned int smp_cpus; extern unsigned int max_cpus; extern int cursor_hide; extern int graphic_rotate; diff --git a/vl.c b/vl.c index d61d560..9089253 100644 --- a/vl.c +++ b/vl.c @@ -162,7 +162,7 @@ static Chardev **serial_hds; Chardev *parallel_hds[MAX_PARALLEL_PORTS]; int win2k_install_hack =3D 0; int singlestep =3D 0; -int smp_cpus; +unsigned int smp_cpus; unsigned int max_cpus; int smp_cores =3D 1; int smp_threads =3D 1; @@ -4116,6 +4116,11 @@ int main(int argc, char **argv, char **envp) =20 smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL)); =20 + current_machine->topo.smp_cpus =3D smp_cpus; + current_machine->topo.max_cpus =3D max_cpus; + current_machine->topo.smp_cores =3D smp_cores; + current_machine->topo.smp_threads =3D smp_threads; + /* sanity-check smp_cpus and max_cpus against machine_class */ if (smp_cpus < machine_class->min_cpus) { error_report("Invalid SMP CPUs %d. The min CPUs " --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849748841639.2504858961423; Fri, 29 Mar 2019 01:55:48 -0700 (PDT) Received: from localhost ([127.0.0.1]:48910 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nIf-0004ti-Sw for importer@patchew.org; Fri, 29 Mar 2019 04:55:45 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48194) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nCu-0007jP-Uh for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nCs-0006Xb-T0 for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:48 -0400 Received: from mga06.intel.com ([134.134.136.31]:30614) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCn-0006Ts-Pk; Fri, 29 Mar 2019 04:49:42 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:37 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:36 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706910" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:38 +0800 Message-Id: <1553849325-44201-3-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 2/9] cpu/topology: add general support for machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- accel/kvm/kvm-all.c | 3 +++ backends/hostmem.c | 4 ++++ cpus.c | 4 ++++ exec.c | 2 ++ gdbstub.c | 7 ++++++- hw/cpu/core.c | 3 +++ hw/smbios/smbios.c | 11 +++++++++++ migration/postcopy-ram.c | 7 +++++++ numa.c | 1 + tcg/tcg.c | 15 +++++++++++++++ 10 files changed, 56 insertions(+), 1 deletion(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 241db49..5385218 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -1526,6 +1526,9 @@ bool kvm_vcpu_id_is_valid(int vcpu_id) static int kvm_init(MachineState *ms) { MachineClass *mc =3D MACHINE_GET_CLASS(ms); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + unsigned int max_cpus =3D ms->topo.max_cpus; + static const char upgrade_note[] =3D "Please upgrade to at least kernel 2.6.29 or recent kvm-kmod\n" "(see http://sourceforge.net/projects/kvm).\n"; diff --git a/backends/hostmem.c b/backends/hostmem.c index 04baf47..cecdfd5 100644 --- a/backends/hostmem.c +++ b/backends/hostmem.c @@ -222,6 +222,8 @@ static void host_memory_backend_set_prealloc(Object *ob= j, bool value, { Error *local_err =3D NULL; HostMemoryBackend *backend =3D MEMORY_BACKEND(obj); + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 if (backend->force_prealloc) { if (value) { @@ -311,6 +313,8 @@ host_memory_backend_memory_complete(UserCreatable *uc, = Error **errp) { HostMemoryBackend *backend =3D MEMORY_BACKEND(uc); HostMemoryBackendClass *bc =3D MEMORY_BACKEND_GET_CLASS(uc); + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; Error *local_err =3D NULL; void *ptr; uint64_t sz; diff --git a/cpus.c b/cpus.c index e83f72b..834a697 100644 --- a/cpus.c +++ b/cpus.c @@ -2067,6 +2067,10 @@ static void qemu_dummy_start_vcpu(CPUState *cpu) =20 void qemu_init_vcpu(CPUState *cpu) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; + cpu->nr_cores =3D smp_cores; cpu->nr_threads =3D smp_threads; cpu->stopped =3D true; diff --git a/exec.c b/exec.c index 86a38d3..a3c3db7 100644 --- a/exec.c +++ b/exec.c @@ -1829,6 +1829,8 @@ static void *file_ram_alloc(RAMBlock *block, bool truncate, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; void *area; =20 block->page_size =3D qemu_fd_getpagesize(fd); diff --git a/gdbstub.c b/gdbstub.c index d54abd1..35f6bbc 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -30,6 +30,7 @@ #include "sysemu/sysemu.h" #include "exec/gdbstub.h" #include "hw/cpu/cluster.h" +#include "hw/boards.h" #endif =20 #define MAX_PACKET_LENGTH 4096 @@ -1154,11 +1155,15 @@ static int gdb_handle_vcont(GDBState *s, const char= *p) CPUState *cpu; GDBThreadIdKind kind; #ifdef CONFIG_USER_ONLY - int max_cpus =3D 1; /* global variable max_cpus exists only in system = mode */ + /* global variable max_cpus exists only in system mode */ + unsigned int max_cpus =3D 1; =20 CPU_FOREACH(cpu) { max_cpus =3D max_cpus <=3D cpu->cpu_index ? cpu->cpu_index + 1 : m= ax_cpus; } +#else + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; #endif /* uninitialised CPUs stay 0 */ newstates =3D g_new0(char, max_cpus); diff --git a/hw/cpu/core.c b/hw/cpu/core.c index 7e42e2c..b75ffbb 100644 --- a/hw/cpu/core.c +++ b/hw/cpu/core.c @@ -11,6 +11,7 @@ #include "qapi/visitor.h" #include "qapi/error.h" #include "sysemu/cpus.h" +#include "hw/boards.h" =20 static void core_prop_get_core_id(Object *obj, Visitor *v, const char *nam= e, void *opaque, Error **errp) @@ -69,6 +70,8 @@ static void core_prop_set_nr_threads(Object *obj, Visitor= *v, const char *name, =20 static void cpu_core_instance_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_threads =3D ms->topo.smp_threads; CPUCore *core =3D CPU_CORE(obj); =20 object_property_add(obj, "core-id", "int", core_prop_get_core_id, diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 47be907..a5eabe7 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -28,6 +28,7 @@ #include "hw/loader.h" #include "exec/cpu-common.h" #include "smbios_build.h" +#include "hw/boards.h" =20 /* legacy structures and constants for <=3D 2.0 machines */ struct smbios_header { @@ -342,6 +343,9 @@ opts_init(smbios_register_config); =20 static void smbios_validate_table(void) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + uint32_t expect_t4_count =3D smbios_legacy ? smp_cpus : smbios_smp_soc= kets; =20 if (smbios_type4_count && smbios_type4_count !=3D expect_t4_count) { @@ -571,6 +575,9 @@ static void smbios_build_type_3_table(void) =20 static void smbios_build_type_4_table(unsigned instance) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_threads =3D ms->topo.smp_threads; + unsigned int smp_cores =3D ms->topo.smp_cores; char sock_str[128]; =20 SMBIOS_BUILD_TABLE_PRE(4, 0x400 + instance, true); /* required */ @@ -843,7 +850,11 @@ void smbios_get_tables(const struct smbios_phys_mem_ar= ea *mem_array, uint8_t **tables, size_t *tables_len, uint8_t **anchor, size_t *anchor_len) { + MachineState *ms =3D MACHINE(qdev_get_machine()); unsigned i, dimm_cnt; + unsigned int smp_cpus =3D ms->topo.smp_cpus; + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; =20 if (smbios_legacy) { *tables =3D *anchor =3D NULL; diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c index e2aa57a..ae92f6e 100644 --- a/migration/postcopy-ram.c +++ b/migration/postcopy-ram.c @@ -29,6 +29,7 @@ #include "sysemu/balloon.h" #include "qemu/error-report.h" #include "trace.h" +#include "hw/boards.h" =20 /* Arbitrary limit on size of each discard command, * keeps them around ~200 bytes @@ -128,6 +129,8 @@ static void migration_exit_cb(Notifier *n, void *data) =20 static struct PostcopyBlocktimeContext *blocktime_context_new(void) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; PostcopyBlocktimeContext *ctx =3D g_new0(PostcopyBlocktimeContext, 1); ctx->page_fault_vcpu_time =3D g_new0(uint32_t, smp_cpus); ctx->vcpu_addr =3D g_new0(uintptr_t, smp_cpus); @@ -141,6 +144,8 @@ static struct PostcopyBlocktimeContext *blocktime_conte= xt_new(void) =20 static uint32List *get_vcpu_blocktime_list(PostcopyBlocktimeContext *ctx) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; uint32List *list =3D NULL, *entry =3D NULL; int i; =20 @@ -806,8 +811,10 @@ static void mark_postcopy_blocktime_begin(uintptr_t ad= dr, uint32_t ptid, static void mark_postcopy_blocktime_end(uintptr_t addr) { MigrationIncomingState *mis =3D migration_incoming_get_current(); + MachineState *ms =3D MACHINE(qdev_get_machine()); PostcopyBlocktimeContext *dc =3D mis->blocktime_ctx; int i, affected_cpu =3D 0; + unsigned int smp_cpus =3D ms->topo.smp_cpus; bool vcpu_total_blocktime =3D false; uint32_t read_vcpu_time, low_time_offset; =20 diff --git a/numa.c b/numa.c index 3875e1e..127ddbe 100644 --- a/numa.c +++ b/numa.c @@ -64,6 +64,7 @@ static void parse_numa_node(MachineState *ms, NumaNodeOpt= ions *node, uint16_t nodenr; uint16List *cpus =3D NULL; MachineClass *mc =3D MACHINE_GET_CLASS(ms); + unsigned int max_cpus =3D ms->topo.max_cpus; =20 if (node->has_nodeid) { nodenr =3D node->nodeid; diff --git a/tcg/tcg.c b/tcg/tcg.c index 9b2bf7f..d1501eb 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -44,6 +44,10 @@ #include "exec/cpu-common.h" #include "exec/exec-all.h" =20 +#if !defined(CONFIG_USER_ONLY) +#include "hw/boards.h" +#endif + #include "tcg-op.h" =20 #if UINTPTR_MAX =3D=3D UINT32_MAX @@ -602,6 +606,10 @@ static size_t tcg_n_regions(void) size_t i; =20 /* Use a single region if all we have is one vCPU thread */ +#if !defined(CONFIG_USER_ONLY) + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; +#endif if (max_cpus =3D=3D 1 || !qemu_tcg_mttcg_enabled()) { return 1; } @@ -751,7 +759,12 @@ void tcg_register_thread(void) =20 /* Claim an entry in tcg_ctxs */ n =3D atomic_fetch_inc(&n_tcg_ctxs); +#if !defined(CONFIG_USER_ONLY) + MachineState *ms =3D MACHINE(qdev_get_machine()); + g_assert(n < ms->topo.max_cpus); +#elif g_assert(n < max_cpus); +#endif atomic_set(&tcg_ctxs[n], s); =20 tcg_ctx =3D s; @@ -961,6 +974,8 @@ void tcg_context_init(TCGContext *s) tcg_ctxs =3D &tcg_ctx; n_tcg_ctxs =3D 1; #else + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; tcg_ctxs =3D g_new(TCGContext *, max_cpus); #endif =20 --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849589473459.5003377791071; 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29 Mar 2019 01:49:37 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706914" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:39 +0800 Message-Id: <1553849325-44201-4-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 3/9] cpu/topology: add uncommon arch support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/alpha/dp264.c | 1 + hw/hppa/machine.c | 4 ++++ hw/mips/boston.c | 1 + hw/mips/mips_malta.c | 9 +++++++++ hw/sparc/sun4m.c | 2 ++ hw/sparc64/sun4u.c | 2 ++ hw/xtensa/sim.c | 1 + hw/xtensa/xtfpga.c | 1 + 8 files changed, 21 insertions(+) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 0347eb8..ee5d432 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -63,6 +63,7 @@ static void clipper_init(MachineState *machine) char *palcode_filename; uint64_t palcode_entry, palcode_low, palcode_high; uint64_t kernel_entry, kernel_low, kernel_high; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 /* Create up to 4 cpus. */ memset(cpus, 0, sizeof(cpus)); diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index d1b1d3c..f652891 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -16,6 +16,7 @@ #include "hw/ide.h" #include "hw/timer/i8254.h" #include "hw/char/serial.h" +#include "hw/boards.h" #include "hppa_sys.h" #include "qemu/units.h" #include "qapi/error.h" @@ -72,6 +73,7 @@ static void machine_hppa_init(MachineState *machine) MemoryRegion *ram_region; MemoryRegion *cpu_region; long i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 ram_size =3D machine->ram_size; =20 @@ -242,7 +244,9 @@ static void machine_hppa_init(MachineState *machine) =20 static void hppa_machine_reset(void) { + MachineState *ms =3D MACHINE(qdev_get_machine()); int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 qemu_devices_reset(); =20 diff --git a/hw/mips/boston.c b/hw/mips/boston.c index e5bab3c..7752c10 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -434,6 +434,7 @@ static void boston_mach_init(MachineState *machine) DriveInfo *hd[6]; Chardev *chr; int fw_size, fit_err; + unsigned int smp_cpus =3D machine->topo.smp_cpus; bool is_64b; =20 if ((machine->ram_size % GiB) || diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 439665a..d595375 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1095,6 +1095,8 @@ static int64_t load_kernel (void) =20 static void malta_mips_config(MIPSCPU *cpu) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; CPUMIPSState *env =3D &cpu->env; CPUState *cs =3D CPU(cpu); =20 @@ -1127,9 +1129,11 @@ static void main_cpu_reset(void *opaque) static void create_cpu_without_cps(const char *cpu_type, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { + MachineState *ms =3D MACHINE(qdev_get_machine()); CPUMIPSState *env; MIPSCPU *cpu; int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 for (i =3D 0; i < smp_cpus; i++) { cpu =3D MIPS_CPU(cpu_create(cpu_type)); @@ -1149,7 +1153,9 @@ static void create_cpu_without_cps(const char *cpu_ty= pe, static void create_cps(MaltaState *s, const char *cpu_type, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { + MachineState *ms =3D MACHINE(qdev_get_machine()); Error *err =3D NULL; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 s->cps =3D MIPS_CPS(object_new(TYPE_MIPS_CPS)); qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default()); @@ -1171,6 +1177,9 @@ static void create_cps(MaltaState *s, const char *cpu= _type, static void mips_create_cpu(MaltaState *s, const char *cpu_type, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_type)) { create_cps(s, cpu_type, cbus_irq, i8259_irq); } else { diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index ca1e382..2321cfb 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -853,6 +853,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwd= ef, unsigned int num_vsimms; DeviceState *dev; SysBusDevice *s; + unsigned int smp_cpus =3D machine->topo.smp_cpus; + unsigned int max_cpus =3D machine->topo.max_cpus; =20 /* init CPUs */ for(i =3D 0; i < smp_cpus; i++) { diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 399f2d7..d089c4d 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -546,6 +546,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem, NICInfo *nd; MACAddr macaddr; bool onboard_nic; + unsigned int smp_cpus =3D machine->topo.smp_cpus; + unsigned int max_cpus =3D machine->topo.max_cpus; =20 /* init CPUs */ cpu =3D sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr); diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 12c7437..cc0396b 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -59,6 +59,7 @@ static void xtensa_sim_init(MachineState *machine) ram_addr_t ram_size =3D machine->ram_size; const char *kernel_filename =3D machine->kernel_filename; int n; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 for (n =3D 0; n < smp_cpus; n++) { cpu =3D XTENSA_CPU(cpu_create(machine->cpu_type)); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index e05ef75..f71a15e 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -238,6 +238,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, M= achineState *machine) const unsigned system_io_size =3D 224 * MiB; uint32_t freq =3D 10000000; int n; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 if (smp_cpus > 1) { mx_pic =3D xtensa_mx_pic_init(31); --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849547224535.7350834094535; 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29 Mar 2019 01:49:39 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706920" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:40 +0800 Message-Id: <1553849325-44201-5-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 4/9] cpu/topology: add ARM support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/arm/fsl-imx6.c | 5 +++++ hw/arm/fsl-imx6ul.c | 5 +++++ hw/arm/fsl-imx7.c | 5 +++++ hw/arm/highbank.c | 1 + hw/arm/mcimx6ul-evk.c | 1 + hw/arm/mcimx7d-sabre.c | 3 +++ hw/arm/raspi.c | 2 ++ hw/arm/realview.c | 1 + hw/arm/sabrelite.c | 1 + hw/arm/vexpress.c | 3 +++ hw/arm/virt.c | 7 +++++++ hw/arm/xlnx-zynqmp.c | 7 +++++++ target/arm/cpu.c | 7 +++++++ 13 files changed, 48 insertions(+) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 7b7b97f..efed3a4 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -23,6 +23,7 @@ #include "qapi/error.h" #include "qemu-common.h" #include "hw/arm/fsl-imx6.h" +#include "hw/boards.h" #include "sysemu/sysemu.h" #include "chardev/char.h" #include "qemu/error-report.h" @@ -33,9 +34,11 @@ =20 static void fsl_imx6_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX6State *s =3D FSL_IMX6(obj); char name[NAME_SIZE]; int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 for (i =3D 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); @@ -93,9 +96,11 @@ static void fsl_imx6_init(Object *obj) =20 static void fsl_imx6_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX6State *s =3D FSL_IMX6(dev); uint16_t i; Error *err =3D NULL; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 if (smp_cpus > FSL_IMX6_NUM_CPUS) { error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 4b56bfa..426bf8e 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -23,14 +23,17 @@ #include "hw/misc/unimp.h" #include "sysemu/sysemu.h" #include "qemu/error-report.h" +#include "hw/boards.h" =20 #define NAME_SIZE 20 =20 static void fsl_imx6ul_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX6ULState *s =3D FSL_IMX6UL(obj); char name[NAME_SIZE]; int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 for (i =3D 0; i < MIN(smp_cpus, FSL_IMX6UL_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); @@ -156,10 +159,12 @@ static void fsl_imx6ul_init(Object *obj) =20 static void fsl_imx6ul_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX6ULState *s =3D FSL_IMX6UL(dev); int i; qemu_irq irq; char name[NAME_SIZE]; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 if (smp_cpus > FSL_IMX6UL_NUM_CPUS) { error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 7663ad6..b759f7b 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -25,11 +25,14 @@ #include "hw/misc/unimp.h" #include "sysemu/sysemu.h" #include "qemu/error-report.h" +#include "hw/boards.h" =20 #define NAME_SIZE 20 =20 static void fsl_imx7_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; FslIMX7State *s =3D FSL_IMX7(obj); char name[NAME_SIZE]; int i; @@ -155,11 +158,13 @@ static void fsl_imx7_init(Object *obj) =20 static void fsl_imx7_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX7State *s =3D FSL_IMX7(dev); Object *o; int i; qemu_irq irq; char name[NAME_SIZE]; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 if (smp_cpus > FSL_IMX7_NUM_CPUS) { error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 96ccf18..58c77f6 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -240,6 +240,7 @@ static void calxeda_init(MachineState *machine, enum cx= machines machine_id) SysBusDevice *busdev; qemu_irq pic[128]; int n; + unsigned int smp_cpus =3D machine->topo.smp_cpus; qemu_irq cpu_irq[4]; qemu_irq cpu_fiq[4]; qemu_irq cpu_virq[4]; diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c index fb2b015..29fb706 100644 --- a/hw/arm/mcimx6ul-evk.c +++ b/hw/arm/mcimx6ul-evk.c @@ -29,6 +29,7 @@ static void mcimx6ul_evk_init(MachineState *machine) static struct arm_boot_info boot_info; MCIMX6ULEVK *s =3D g_new0(MCIMX6ULEVK, 1); int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) { error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)= ", diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c index 9c5f0e7..c2cdaf9 100644 --- a/hw/arm/mcimx7d-sabre.c +++ b/hw/arm/mcimx7d-sabre.c @@ -20,6 +20,7 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" #include "sysemu/qtest.h" +#include "hw/boards.h" =20 typedef struct { FslIMX7State soc; @@ -28,10 +29,12 @@ typedef struct { =20 static void mcimx7d_sabre_init(MachineState *machine) { + MachineState *ms =3D MACHINE(qdev_get_machine()); static struct arm_boot_info boot_info; MCIMX7Sabre *s =3D g_new0(MCIMX7Sabre, 1); Object *soc; int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 if (machine->ram_size > FSL_IMX7_MMDC_SIZE) { error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)= ", diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 66899c2..8ab8e10 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -113,6 +113,7 @@ static void setup_boot(MachineState *machine, int versi= on, size_t ram_size) { static struct arm_boot_info binfo; int r; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 binfo.board_id =3D raspi_boardid[version]; binfo.ram_size =3D ram_size; @@ -174,6 +175,7 @@ static void raspi_init(MachineState *machine, int versi= on) BlockBackend *blk; BusState *bus; DeviceState *carddev; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 object_initialize(&s->soc, sizeof(s->soc), version =3D=3D 3 ? TYPE_BCM2837 : TYPE_BCM2836); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 242f5a8..517c275 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -69,6 +69,7 @@ static void realview_init(MachineState *machine, NICInfo *nd; I2CBus *i2c; int n; + unsigned int smp_cpus =3D machine->topo.smp_cpus; int done_nic =3D 0; qemu_irq cpu_irq[4]; int is_mpcore =3D 0; diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index ee140e5..108faab 100644 --- a/hw/arm/sabrelite.c +++ b/hw/arm/sabrelite.c @@ -47,6 +47,7 @@ static void sabrelite_init(MachineState *machine) { IMX6Sabrelite *s =3D g_new0(IMX6Sabrelite, 1); Error *err =3D NULL; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 /* Check the amount of memory is compatible with the SOC */ if (machine->ram_size > FSL_IMX6_MMDC_SIZE) { diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index f07134c..1927d12 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -206,9 +206,11 @@ struct VEDBoardInfo { static void init_cpus(const char *cpu_type, const char *privdev, hwaddr periphbase, qemu_irq *pic, bool secure, bool = virt) { + MachineState *ms =3D MACHINE(qdev_get_machine()); DeviceState *dev; SysBusDevice *busdev; int n; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 /* Create the actual CPUs */ for (n =3D 0; n < smp_cpus; n++) { @@ -558,6 +560,7 @@ static void vexpress_common_init(MachineState *machine) MemoryRegion *flash0mem; const hwaddr *map =3D daughterboard->motherboard_map; int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 daughterboard->init(vms, machine->ram_size, machine->cpu_type, pic); =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ce2664a..ff1dff3 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -555,11 +555,13 @@ static void create_v2m(VirtMachineState *vms, qemu_ir= q *pic) =20 static void create_gic(VirtMachineState *vms, qemu_irq *pic) { + MachineState *ms =3D MACHINE(vms); /* We create a standalone GIC */ DeviceState *gicdev; SysBusDevice *gicbusdev; const char *gictype; int type =3D vms->gic_version, i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; uint32_t nb_redist_regions =3D 0; =20 gictype =3D (type =3D=3D 3) ? gicv3_class_name() : gic_class_name(); @@ -984,10 +986,12 @@ static void create_flash(const VirtMachineState *vms, =20 static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace= *as) { + MachineState *ms =3D MACHINE(vms); hwaddr base =3D vms->memmap[VIRT_FW_CFG].base; hwaddr size =3D vms->memmap[VIRT_FW_CFG].size; FWCfgState *fw_cfg; char *nodename; + unsigned int smp_cpus =3D ms->topo.smp_cpus; =20 fw_cfg =3D fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); @@ -1423,6 +1427,8 @@ static void machvirt_init(MachineState *machine) MemoryRegion *ram =3D g_new(MemoryRegion, 1); bool firmware_loaded =3D bios_name || drive_get(IF_PFLASH, 0, 0); bool aarch64 =3D true; + unsigned int smp_cpus =3D machine->topo.smp_cpus; + unsigned int max_cpus =3D machine->topo.max_cpus; =20 /* * In accelerated mode, the memory map is computed earlier in kvm_type= () @@ -1786,6 +1792,7 @@ static int64_t virt_get_default_cpu_node_id(const Mac= hineState *ms, int idx) static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) { int n; + unsigned int max_cpus =3D ms->topo.max_cpus; VirtMachineState *vms =3D VIRT_MACHINE(ms); =20 if (ms->possible_cpus) { diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 4f8bc41..29b9427 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -19,6 +19,7 @@ #include "qapi/error.h" #include "qemu-common.h" #include "cpu.h" +#include "hw/boards.h" #include "hw/arm/xlnx-zynqmp.h" #include "hw/intc/arm_gic_common.h" #include "exec/address-spaces.h" @@ -174,8 +175,10 @@ static inline int arm_gic_ppi_index(int cpu_nr, int pp= i_index) static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cp= u, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); Error *err =3D NULL; int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; int num_rpus =3D MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_= NUM_RPU_CPUS); =20 if (num_rpus <=3D 0) { @@ -221,8 +224,10 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s,= const char *boot_cpu, =20 static void xlnx_zynqmp_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); XlnxZynqMPState *s =3D XLNX_ZYNQMP(obj); int i; + unsigned int smp_cpus =3D ms->topo.smp_cpus; int num_apus =3D MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); =20 object_initialize_child(obj, "apu-cluster", &s->apu_cluster, @@ -290,10 +295,12 @@ static void xlnx_zynqmp_init(Object *obj) =20 static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); XlnxZynqMPState *s =3D XLNX_ZYNQMP(dev); MemoryRegion *system_memory =3D get_system_memory(); uint8_t i; uint64_t ram_size; + unsigned int smp_cpus =3D ms->topo.smp_cpus; int num_apus =3D MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); const char *boot_cpu =3D s->boot_cpu ? s->boot_cpu : "apu-cpu[0]"; ram_addr_t ddr_low_size, ddr_high_size; diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4155782..e5d7e3b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -30,6 +30,7 @@ #include "hw/qdev-properties.h" #if !defined(CONFIG_USER_ONLY) #include "hw/loader.h" +#include "hw/boards.h" #endif #include "hw/arm/arm.h" #include "sysemu/sysemu.h" @@ -1183,6 +1184,9 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) init_cpreg_list(cpu); =20 #ifndef CONFIG_USER_ONLY + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + if (cpu->has_el3 || arm_feature(env, ARM_FEATURE_M_SECURITY)) { cs->num_ases =3D 2; =20 @@ -1713,6 +1717,9 @@ static void cortex_a9_initfn(Object *obj) #ifndef CONFIG_USER_ONLY static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + /* Linux wants the number of processors from here. * Might as well set the interrupt-controller bit too. */ --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849820641788.8076268817969; Fri, 29 Mar 2019 01:57:00 -0700 (PDT) Received: from localhost ([127.0.0.1]:48929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nJn-0005r2-P2 for importer@patchew.org; Fri, 29 Mar 2019 04:56:55 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48227) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nCw-0007lY-Su for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nCu-0006YR-TS for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:50 -0400 Received: from mga06.intel.com ([134.134.136.31]:30613) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCp-0006TI-5W; Fri, 29 Mar 2019 04:49:43 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:42 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:40 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706927" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:41 +0800 Message-Id: <1553849325-44201-6-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 5/9] cpu/topology: add i386 support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/i386/acpi-build.c | 3 +++ hw/i386/kvmvapic.c | 5 +++++ hw/i386/pc.c | 12 ++++++++++++ target/i386/cpu.c | 4 ++++ 4 files changed, 24 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 416da31..3813c28 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -44,6 +44,7 @@ #include "sysemu/tpm.h" #include "hw/acpi/tpm.h" #include "hw/acpi/vmgenid.h" +#include "hw/boards.h" #include "sysemu/tpm_backend.h" #include "hw/timer/mc146818rtc_regs.h" #include "hw/mem/memory-device.h" @@ -127,6 +128,8 @@ typedef struct FwCfgTPMConfig { =20 static void init_common_fadt_data(Object *o, AcpiFadtData *data) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; uint32_t io =3D object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, N= ULL); AmlAddressSpace as =3D AML_AS_SYSTEM_IO; AcpiFadtData fadt =3D { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 70f6f26..2463f8a 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -17,6 +17,7 @@ #include "sysemu/kvm.h" #include "hw/i386/apic_internal.h" #include "hw/sysbus.h" +#include "hw/boards.h" #include "tcg/tcg.h" =20 #define VAPIC_IO_PORT 0x7e @@ -441,6 +442,8 @@ static void do_patch_instruction(CPUState *cs, run_on_c= pu_data data) =20 static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong = ip) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; CPUState *cs =3D CPU(cpu); VAPICHandlers *handlers; PatchInfo *info; @@ -746,6 +749,8 @@ static void do_vapic_enable(CPUState *cs, run_on_cpu_da= ta data) static void kvmvapic_vm_state_change(void *opaque, int running, RunState state) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; VAPICROMState *s =3D opaque; uint8_t *zero; =20 diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 6077d27..2816bfd 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -931,6 +931,9 @@ void enable_compat_apic_id_mode(void) */ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; uint32_t correct_id; static bool warned; =20 @@ -1562,6 +1565,7 @@ void pc_cpus_init(PCMachineState *pcms) const CPUArchIdList *possible_cpus; MachineState *ms =3D MACHINE(pcms); MachineClass *mc =3D MACHINE_GET_CLASS(pcms); + unsigned int smp_cpus =3D ms->topo.smp_cpus, max_cpus =3D ms->topo.max= _cpus; =20 /* Calculates the limit to CPU APIC ID values * @@ -2291,6 +2295,9 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, X86CPU *cpu =3D X86_CPU(dev); MachineState *ms =3D MACHINE(hotplug_dev); PCMachineState *pcms =3D PC_MACHINE(hotplug_dev); + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; + unsigned int max_cpus =3D ms->topo.max_cpus; =20 if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", @@ -2646,6 +2653,8 @@ pc_cpu_index_to_props(MachineState *ms, unsigned cpu_= index) static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx) { X86CPUTopoInfo topo; + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; =20 assert(idx < ms->possible_cpus->len); x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, @@ -2656,6 +2665,9 @@ static int64_t pc_get_default_cpu_node_id(const Machi= neState *ms, int idx) static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) { int i; + unsigned int max_cpus =3D ms->topo.max_cpus; + unsigned int smp_cores =3D ms->topo.smp_cores; + unsigned int smp_threads =3D ms->topo.smp_threads; =20 if (ms->possible_cpus) { /* diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d6bb57d..6dcdad4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -53,6 +53,7 @@ #include "hw/hw.h" #include "hw/xen/xen.h" #include "hw/i386/apic_internal.h" +#include "hw/boards.h" #endif =20 #include "disas/capstone.h" @@ -5291,6 +5292,9 @@ static void x86_cpu_realizefn(DeviceState *dev, Error= **errp) } =20 #ifndef CONFIG_USER_ONLY + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; + qemu_register_reset(x86_cpu_machine_reset_cb, cpu); =20 if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || smp_cpus > 1) { --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849929414190.5885631471548; Fri, 29 Mar 2019 01:58:49 -0700 (PDT) Received: from localhost ([127.0.0.1]:48945 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nLR-0006pJ-UV for importer@patchew.org; Fri, 29 Mar 2019 04:58:37 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48289) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nD1-0007oa-0D for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nCy-0006bj-To for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:54 -0400 Received: from mga06.intel.com ([134.134.136.31]:30619) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCr-0006Wc-3c; Fri, 29 Mar 2019 04:49:46 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:43 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:42 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706933" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:42 +0800 Message-Id: <1553849325-44201-7-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 6/9] cpu/topology: add PPC support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/ppc/e500.c | 3 +++ hw/ppc/mac_newworld.c | 2 ++ hw/ppc/mac_oldworld.c | 2 ++ hw/ppc/pnv.c | 3 +++ hw/ppc/prep.c | 2 ++ hw/ppc/spapr.c | 29 +++++++++++++++++++++++++++++ hw/ppc/spapr_rtas.c | 3 +++ 7 files changed, 44 insertions(+) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index beb2efd..c854cb5 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -307,6 +307,7 @@ static int ppce500_load_device_tree(PPCE500MachineState= *pms, bool dry_run) { MachineState *machine =3D MACHINE(pms); + unsigned int smp_cpus =3D machine->topo.smp_cpus; const PPCE500MachineClass *pmc =3D PPCE500_MACHINE_GET_CLASS(pms); CPUPPCState *env =3D first_cpu->env_ptr; int ret =3D -1; @@ -734,6 +735,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500Machi= neState *pms, SysBusDevice *s; int i, j, k; MachineState *machine =3D MACHINE(pms); + unsigned int smp_cpus =3D machine->topo.smp_cpus; const PPCE500MachineClass *pmc =3D PPCE500_MACHINE_GET_CLASS(pms); =20 dev =3D qdev_create(NULL, TYPE_OPENPIC); @@ -846,6 +848,7 @@ void ppce500_init(MachineState *machine) struct boot_info *boot_info; int dt_size; int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and * 4 respectively */ unsigned int pci_irq_nrs[PCI_NUM_PINS] =3D {1, 2, 3, 4}; diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 02d8559..ce236ee 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -131,10 +131,12 @@ static void ppc_core99_init(MachineState *machine) DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; void *fw_cfg; int machine_arch; + unsigned int smp_cpus =3D machine->topo.smp_cpus; SysBusDevice *s; DeviceState *dev, *pic_dev; hwaddr nvram_addr =3D 0xFFF04000; uint64_t tbfreq; + unsigned int max_cpus =3D machine->topo.max_cpus; =20 linux_boot =3D (kernel_filename !=3D NULL); =20 diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 460cbc7..cde20c9 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -99,6 +99,8 @@ static void ppc_heathrow_init(MachineState *machine) DeviceState *dev, *pic_dev; BusState *adb_bus; int bios_size; + unsigned int smp_cpus =3D machine->topo.smp_cpus; + unsigned int max_cpus =3D machine->topo.max_cpus; uint16_t ppc_boot_device; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; void *fw_cfg; diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index dfb4ea5..c99c0b2 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -596,6 +596,7 @@ static void pnv_init(MachineState *machine) long fw_size; int i; char *chip_typename; + unsigned int smp_cores =3D machine->topo.smp_cores; =20 /* allocate RAM */ if (machine->ram_size < (1 * GiB)) { @@ -1135,6 +1136,8 @@ static void pnv_chip_instance_init(Object *obj) =20 static void pnv_chip_core_realize(PnvChip *chip, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_threads =3D ms->topo.smp_threads; Error *error =3D NULL; PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); const char *typename =3D pnv_chip_core_typename(chip); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 847d320..86aa021 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -423,6 +423,7 @@ static void ppc_prep_init(MachineState *machine) ISADevice *isa; int ppc_boot_device; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 sysctrl =3D g_malloc0(sizeof(sysctrl_t)); =20 @@ -630,6 +631,7 @@ static void ibm_40p_init(MachineState *machine) uint32_t kernel_base =3D 0, initrd_base =3D 0; long kernel_size =3D 0, initrd_size =3D 0; char boot_device; + unsigned int max_cpus =3D machine->topo.max_cpus; =20 /* init CPU */ cpu =3D POWERPC_CPU(cpu_create(machine->cpu_type)); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6c16d6c..bf70121 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -105,6 +105,9 @@ */ static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index) { + MachineState *ms =3D MACHINE(spapr); + unsigned int smp_threads =3D ms->topo.smp_threads; + assert(spapr->vsmt); return (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads; @@ -152,6 +155,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int = i) =20 int spapr_max_server_number(SpaprMachineState *spapr) { + MachineState *ms =3D MACHINE(spapr); + unsigned int smp_threads =3D ms->topo.smp_threads; + unsigned int max_cpus =3D ms->topo.max_cpus; + assert(spapr->vsmt); return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads); } @@ -286,10 +293,12 @@ static void spapr_populate_pa_features(SpaprMachineSt= ate *spapr, =20 static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr) { + MachineState *ms =3D MACHINE(spapr); int ret =3D 0, offset, cpus_offset; CPUState *cs; char cpu_model[32]; uint32_t pft_size_prop[] =3D {0, cpu_to_be32(spapr->htab_shift)}; + unsigned int smp_threads =3D ms->topo.smp_threads; =20 CPU_FOREACH(cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); @@ -441,6 +450,7 @@ static int spapr_populate_memory(SpaprMachineState *spa= pr, void *fdt) static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset, SpaprMachineState *spapr) { + MachineState *ms =3D MACHINE(spapr); PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D &cpu->env; PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cs); @@ -452,6 +462,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, uint32_t cpufreq =3D kvm_enabled() ? kvmppc_get_clockfreq() : 10000000= 00; uint32_t page_sizes_prop[64]; size_t page_sizes_prop_size; + unsigned int smp_threads =3D ms->topo.smp_threads; + unsigned int smp_cores =3D ms->topo.smp_cores; uint32_t vcpus_per_socket =3D smp_threads * smp_cores; uint32_t pft_size_prop[] =3D {0, cpu_to_be32(spapr->htab_shift)}; int compat_smt =3D MIN(smp_threads, ppc_compat_max_vthreads(cpu)); @@ -1022,6 +1034,9 @@ int spapr_h_cas_compose_response(SpaprMachineState *s= papr, =20 static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt) { + MachineState *ms =3D MACHINE(spapr); + unsigned int max_cpus =3D ms->topo.max_cpus; + unsigned int smp_threads =3D ms->topo.smp_threads; int rtas; GString *hypertas =3D g_string_sized_new(256); GString *qemu_hypertas =3D g_string_sized_new(256); @@ -2513,6 +2528,7 @@ static void spapr_validate_node_memory(MachineState *= machine, Error **errp) /* find cpu slot in machine->possible_cpus by core_id */ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *= idx) { + unsigned int smp_threads =3D ms->topo.smp_threads; int index =3D id / smp_threads; =20 if (index >=3D ms->possible_cpus->len) { @@ -2526,10 +2542,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState = *ms, uint32_t id, int *idx) =20 static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp) { + MachineState *ms =3D MACHINE(spapr); Error *local_err =3D NULL; bool vsmt_user =3D !!spapr->vsmt; int kvm_smt =3D kvmppc_smt_threads(); int ret; + unsigned int smp_threads =3D ms->topo.smp_threads; =20 if (!kvm_enabled() && (smp_threads > 1)) { error_setg(&local_err, "TCG cannot support more than 1 thread/core= " @@ -2603,6 +2621,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr) SpaprMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); const char *type =3D spapr_get_cpu_core_type(machine->cpu_type); const CPUArchIdList *possible_cpus; + unsigned int smp_cpus =3D machine->topo.smp_cpus; + unsigned int smp_threads =3D machine->topo.smp_threads; + unsigned int max_cpus =3D machine->topo.max_cpus; int boot_cores_nr =3D smp_cpus / smp_threads; int i; =20 @@ -3835,6 +3856,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotpl= ug_dev, DeviceState *dev, const char *type =3D object_get_typename(OBJECT(dev)); CPUArchId *core_slot; int index; + unsigned int smp_threads =3D machine->topo.smp_threads; =20 if (dev->hotplugged && !mc->has_hotpluggable_cpus) { error_setg(&local_err, "CPU hotplug not supported for this machine= "); @@ -4087,12 +4109,17 @@ spapr_cpu_index_to_props(MachineState *machine, uns= igned cpu_index) =20 static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int i= dx) { + unsigned int smp_cores =3D ms->topo.smp_cores; + return idx / smp_cores % nb_numa_nodes; } =20 static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *mach= ine) { int i; + unsigned int max_cpus =3D machine->topo.max_cpus; + unsigned int smp_threads =3D machine->topo.smp_threads; + unsigned int smp_cpus =3D machine->topo.smp_cpus; const char *core_type; int spapr_max_cores =3D max_cpus / smp_threads; MachineClass *mc =3D MACHINE_GET_CLASS(machine); @@ -4213,6 +4240,8 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu) void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp) { SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + MachineState *ms =3D MACHINE(spapr); + unsigned int smp_threads =3D ms->topo.smp_threads; int vcpu_id; =20 vcpu_id =3D spapr_vcpu_id(spapr, cpu_index); diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 24c45b1..658f3f9 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -231,6 +231,9 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *c= pu, target_ulong args, uint32_t nret, target_ulong rets) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; + unsigned int smp_cpus =3D ms->topo.smp_cpus; target_ulong parameter =3D rtas_ld(args, 0); target_ulong buffer =3D rtas_ld(args, 1); target_ulong length =3D rtas_ld(args, 2); --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849989821196.11308217411158; Fri, 29 Mar 2019 01:59:49 -0700 (PDT) Received: from localhost ([127.0.0.1]:48956 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nMY-0007W7-Iz for importer@patchew.org; Fri, 29 Mar 2019 04:59:46 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48326) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nD5-0007r3-1S for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:50:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nD3-0006e1-0Z for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:58 -0400 Received: from mga06.intel.com ([134.134.136.31]:30620) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCs-0006Wd-W3; Fri, 29 Mar 2019 04:49:48 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:45 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:44 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706939" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:43 +0800 Message-Id: <1553849325-44201-8-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 7/9] cpu/topology: add riscv support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/openrisc/openrisc_sim.c | 1 + hw/riscv/sifive_e.c | 4 ++++ hw/riscv/sifive_plic.c | 3 +++ hw/riscv/sifive_u.c | 4 ++++ hw/riscv/spike.c | 2 ++ hw/riscv/virt.c | 1 + 6 files changed, 15 insertions(+) diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 7d3b734..ecfc973 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -131,6 +131,7 @@ static void openrisc_sim_init(MachineState *machine) qemu_irq *cpu_irqs[2]; qemu_irq serial_irq; int n; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 for (n =3D 0; n < smp_cpus; n++) { cpu =3D OPENRISC_CPU(cpu_create(machine->cpu_type)); diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index b1cd113..c65c7b5 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -137,6 +137,8 @@ static void riscv_sifive_e_init(MachineState *machine) =20 static void riscv_sifive_e_soc_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; SiFiveESoCState *s =3D RISCV_E_SOC(obj); =20 object_initialize_child(obj, "cpus", &s->cpus, @@ -150,6 +152,8 @@ static void riscv_sifive_e_soc_init(Object *obj) =20 static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; const struct MemmapEntry *memmap =3D sifive_e_memmap; =20 SiFiveESoCState *s =3D RISCV_E_SOC(dev); diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index ac768e6..161fbd9 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -23,6 +23,7 @@ #include "qemu/error-report.h" #include "hw/sysbus.h" #include "hw/pci/msi.h" +#include "hw/boards.h" #include "target/riscv/cpu.h" #include "sysemu/sysemu.h" #include "hw/riscv/sifive_plic.h" @@ -432,6 +433,8 @@ static void sifive_plic_irq_request(void *opaque, int i= rq, int level) =20 static void sifive_plic_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; SiFivePLICState *plic =3D SIFIVE_PLIC(dev); int i; =20 diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 5ecc47c..b4a8d66 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -321,6 +321,8 @@ static void riscv_sifive_u_init(MachineState *machine) =20 static void riscv_sifive_u_soc_init(Object *obj) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; SiFiveUSoCState *s =3D RISCV_U_SOC(obj); =20 object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), @@ -336,6 +338,8 @@ static void riscv_sifive_u_soc_init(Object *obj) =20 static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int smp_cpus =3D ms->topo.smp_cpus; SiFiveUSoCState *s =3D RISCV_U_SOC(dev); const struct MemmapEntry *memmap =3D sifive_u_memmap; MemoryRegion *system_memory =3D get_system_memory(); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 2a000a5..5fe441c 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -171,6 +171,7 @@ static void spike_v1_10_0_board_init(MachineState *mach= ine) MemoryRegion *main_mem =3D g_new(MemoryRegion, 1); MemoryRegion *mask_rom =3D g_new(MemoryRegion, 1); int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 /* Initialize SOC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), @@ -253,6 +254,7 @@ static void spike_v1_09_1_board_init(MachineState *mach= ine) MemoryRegion *main_mem =3D g_new(MemoryRegion, 1); MemoryRegion *mask_rom =3D g_new(MemoryRegion, 1); int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; =20 /* Initialize SOC */ object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc= ), diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index fc4c6b3..9d4d305 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -395,6 +395,7 @@ static void riscv_virt_board_init(MachineState *machine) char *plic_hart_config; size_t plic_hart_config_len; int i; + unsigned int smp_cpus =3D machine->topo.smp_cpus; void *fdt; =20 /* Initialize SOC */ --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155384954193630.264208813315236; Fri, 29 Mar 2019 01:52:21 -0700 (PDT) Received: from localhost ([127.0.0.1]:48846 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nFD-0001D3-AC for importer@patchew.org; Fri, 29 Mar 2019 04:52:11 -0400 Received: from eggs.gnu.org ([209.51.188.92]:48328) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h9nD4-0007r5-VM for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:50:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h9nD3-0006e5-0d for qemu-devel@nongnu.org; Fri, 29 Mar 2019 04:49:58 -0400 Received: from mga06.intel.com ([134.134.136.31]:30619) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h9nCw-0006Wc-Vd; Fri, 29 Mar 2019 04:49:52 -0400 Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2019 01:49:47 -0700 Received: from xulike-server.sh.intel.com ([10.239.48.134]) by orsmga008.jf.intel.com with ESMTP; 29 Mar 2019 01:49:45 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706947" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:44 +0800 Message-Id: <1553849325-44201-9-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 8/9] cpu/topology: add s390x support for smp machine properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- hw/s390x/s390-virtio-ccw.c | 2 ++ hw/s390x/sclp.c | 1 + target/openrisc/sys_helper.c | 5 +++++ target/s390x/cpu.c | 3 +++ target/s390x/excp_helper.c | 6 ++++++ 5 files changed, 17 insertions(+) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index d11069b..8cb71e0 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -77,6 +77,7 @@ out: static void s390_init_cpus(MachineState *machine) { MachineClass *mc =3D MACHINE_GET_CLASS(machine); + unsigned int smp_cpus =3D machine->topo.smp_cpus; int i; =20 /* initialize possible_cpus */ @@ -398,6 +399,7 @@ static CpuInstanceProperties s390_cpu_index_to_props(Ma= chineState *ms, static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms) { int i; + unsigned int max_cpus =3D ms->topo.max_cpus; =20 if (ms->possible_cpus) { g_assert(ms->possible_cpus && ms->possible_cpus->len =3D=3D max_cp= us); diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 4510a80..1de3fb6 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -56,6 +56,7 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb) { ReadInfo *read_info =3D (ReadInfo *) sccb; MachineState *machine =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D machine->topo.max_cpus; int cpu_count; int rnsize, rnmax; IplParameterBlock *ipib =3D s390_ipl_get_iplb(); diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index 05f66c4..a8b03c6 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -24,6 +24,9 @@ #include "exec/helper-proto.h" #include "exception.h" #include "sysemu/sysemu.h" +#ifndef CONFIG_USER_ONLY +#include "hw/boards.h" +#endif =20 #define TO_SPR(group, number) (((group) << 11) + (number)) =20 @@ -194,6 +197,8 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, targe= t_ulong rd, target_ulong spr) { #ifndef CONFIG_USER_ONLY + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; OpenRISCCPU *cpu =3D openrisc_env_get_cpu(env); CPUState *cs =3D CPU(cpu); int idx; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 698dd9c..4b614c5 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -37,6 +37,7 @@ #include "hw/qdev-properties.h" #ifndef CONFIG_USER_ONLY #include "hw/hw.h" +#include "hw/boards.h" #include "sysemu/arch_init.h" #include "sysemu/sysemu.h" #endif @@ -193,6 +194,8 @@ static void s390_cpu_realizefn(DeviceState *dev, Error = **errp) } =20 #if !defined(CONFIG_USER_ONLY) + MachineState *ms =3D MACHINE(qdev_get_machine()); + unsigned int max_cpus =3D ms->topo.max_cpus; if (cpu->env.core_id >=3D max_cpus) { error_setg(&err, "Unable to add CPU with core-id: %" PRIu32 ", maximum core-id: %d", cpu->env.core_id, diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index f84bfb1..d3eec86 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -31,6 +31,7 @@ #ifndef CONFIG_USER_ONLY #include "sysemu/sysemu.h" #include "hw/s390x/s390_flic.h" +#include "hw/boards.h" #endif =20 void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t= code, @@ -279,7 +280,12 @@ static void do_ext_interrupt(CPUS390XState *env) g_assert(cpu_addr < S390_MAX_CPUS); lowcore->cpu_addr =3D cpu_to_be16(cpu_addr); clear_bit(cpu_addr, env->emergency_signals); +#ifndef CONFIG_USER_ONLY + MachineState *ms =3D MACHINE(qdev_get_machine()); + if (bitmap_empty(env->emergency_signals, ms->topo.max_cpus)) { +#elif if (bitmap_empty(env->emergency_signals, max_cpus)) { +#endif env->pending_int &=3D ~INTERRUPT_EMERGENCY_SIGNAL; } } else if ((env->pending_int & INTERRUPT_EXTERNAL_CALL) && --=20 1.8.3.1 From nobody Tue May 7 06:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553849721322383.6723030980221; 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29 Mar 2019 01:49:47 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129706952" From: Like Xu To: qemu-trivial@nongnu.org Date: Fri, 29 Mar 2019 16:48:45 +0800 Message-Id: <1553849325-44201-10-git-send-email-like.xu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> References: <1553849325-44201-1-git-send-email-like.xu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 9/9] cpu/topology: replace smp global variables with machine propertie X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , like.xu@intel.com, qemu-devel@nongnu.org, Paolo Bonzini , Igor Mammedov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Like Xu --- vl.c | 53 ++++++++++++++++++++++++++--------------------------- 1 file changed, 26 insertions(+), 27 deletions(-) diff --git a/vl.c b/vl.c index 9089253..0c5a384 100644 --- a/vl.c +++ b/vl.c @@ -162,10 +162,6 @@ static Chardev **serial_hds; Chardev *parallel_hds[MAX_PARALLEL_PORTS]; int win2k_install_hack =3D 0; int singlestep =3D 0; -unsigned int smp_cpus; -unsigned int max_cpus; -int smp_cores =3D 1; -int smp_threads =3D 1; int acpi_enabled =3D 1; int no_hpet =3D 0; int fd_bootchk =3D 1; @@ -1281,8 +1277,9 @@ static void smp_parse(QemuOpts *opts) sockets =3D sockets > 0 ? sockets : 1; cpus =3D cores * threads * sockets; } else { - max_cpus =3D qemu_opt_get_number(opts, "maxcpus", cpus); - sockets =3D max_cpus / (cores * threads); + current_machine->topo.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); + sockets =3D current_machine->topo.max_cpus / (cores * thre= ads); } } else if (cores =3D=3D 0) { threads =3D threads > 0 ? threads : 1; @@ -1299,34 +1296,37 @@ static void smp_parse(QemuOpts *opts) exit(1); } =20 - max_cpus =3D qemu_opt_get_number(opts, "maxcpus", cpus); + current_machine->topo.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); =20 - if (max_cpus < cpus) { + if (current_machine->topo.max_cpus < cpus) { error_report("maxcpus must be equal to or greater than smp"); exit(1); } =20 - if (sockets * cores * threads > max_cpus) { + if (sockets * cores * threads > current_machine->topo.max_cpus) { error_report("cpu topology: " "sockets (%u) * cores (%u) * threads (%u) > " "maxcpus (%u)", - sockets, cores, threads, max_cpus); + sockets, cores, threads, + current_machine->topo.max_cpus); exit(1); } =20 - if (sockets * cores * threads !=3D max_cpus) { + if (sockets * cores * threads !=3D current_machine->topo.max_cpus)= { warn_report("Invalid CPU topology deprecated: " "sockets (%u) * cores (%u) * threads (%u) " "!=3D maxcpus (%u)", - sockets, cores, threads, max_cpus); + sockets, cores, threads, + current_machine->topo.max_cpus); } =20 - smp_cpus =3D cpus; - smp_cores =3D cores; - smp_threads =3D threads; + current_machine->topo.smp_cpus =3D cpus; + current_machine->topo.smp_cores =3D cores; + current_machine->topo.smp_threads =3D threads; } =20 - if (smp_cpus > 1) { + if (current_machine->topo.smp_cpus > 1) { Error *blocker =3D NULL; error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); replay_add_blocker(blocker); @@ -4111,26 +4111,25 @@ int main(int argc, char **argv, char **envp) machine_class->default_cpus =3D machine_class->default_cpus ?: 1; =20 /* default to machine_class->default_cpus */ - smp_cpus =3D machine_class->default_cpus; - max_cpus =3D machine_class->default_cpus; + current_machine->topo.smp_cpus =3D machine_class->default_cpus; + current_machine->topo.max_cpus =3D machine_class->max_cpus; + current_machine->topo.smp_cores =3D 1; + current_machine->topo.smp_threads =3D 1; =20 smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL)); =20 - current_machine->topo.smp_cpus =3D smp_cpus; - current_machine->topo.max_cpus =3D max_cpus; - current_machine->topo.smp_cores =3D smp_cores; - current_machine->topo.smp_threads =3D smp_threads; - /* sanity-check smp_cpus and max_cpus against machine_class */ - if (smp_cpus < machine_class->min_cpus) { + if (current_machine->topo.smp_cpus < machine_class->min_cpus) { error_report("Invalid SMP CPUs %d. The min CPUs " - "supported by machine '%s' is %d", smp_cpus, + "supported by machine '%s' is %d", + current_machine->topo.smp_cpus, machine_class->name, machine_class->min_cpus); exit(1); } - if (max_cpus > machine_class->max_cpus) { + if (current_machine->topo.max_cpus > machine_class->max_cpus) { error_report("Invalid SMP CPUs %d. The max CPUs " - "supported by machine '%s' is %d", max_cpus, + "supported by machine '%s' is %d", + current_machine->topo.max_cpus, machine_class->name, machine_class->max_cpus); exit(1); } --=20 1.8.3.1