From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553236597433113.36867322703142; Thu, 21 Mar 2019 23:36:37 -0700 (PDT) Received: from localhost ([127.0.0.1]:52616 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dn9-00057q-OZ for importer@patchew.org; Fri, 22 Mar 2019 02:36:35 -0400 Received: from eggs.gnu.org ([209.51.188.92]:46756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dko-0003KP-Ub for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h7DkT-0000cD-Lv for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:33:51 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:54578) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h7DkT-0000ay-AN for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:33:49 -0400 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2M6TMx0095530 for ; Fri, 22 Mar 2019 02:33:48 -0400 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0a-001b2d01.pphosted.com with ESMTP id 2rcp4w8w3k-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 22 Mar 2019 02:33:47 -0400 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:33:45 -0000 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6Xho122544442 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:33:43 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 99E252805C; Fri, 22 Mar 2019 06:33:43 +0000 (GMT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 501C32806A; Fri, 22 Mar 2019 06:33:41 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:33:40 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:03:39 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-2213-0000-0000-000003687E1D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616221; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:33:46 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-2214-0000-0000-00005DC1A664 Message-Id: <155323641993.18748.14495240326580417578.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220049 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v7 1/6] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" This patch adds support in QEMU to handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls. The machine check notification address is saved when the OS issues "ibm,nmi-register" RTAS call. This patch also handles the case when multiple processors experience machine check at or about the same time by handling "ibm,nmi-interlock" call. In such cases, as per PAPR, subsequent processors serialize waiting for the first processor to issue the "ibm,nmi-interlock" call. The second processor that also received a machine check error waits till the first processor is done reading the error log. The first processor issues "ibm,nmi-interlock" call when the error log is consumed. This patch implements the releasing part of the error-log while subsequent patch (which builds error log) handles the locking part. Signed-off-by: Aravinda Prasad --- hw/ppc/spapr.c | 25 +++++++++++++++++++++++++ hw/ppc/spapr_rtas.c | 36 ++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 15 ++++++++++++++- 3 files changed, 75 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index adde36a..744dcad 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1788,6 +1788,16 @@ static void spapr_machine_reset(void) first_ppc_cpu->env.gpr[5] =3D 0; =20 spapr->cas_reboot =3D false; + + spapr->mc_reset =3D 1; + spapr->mc_status =3D -1; + spapr->guest_machine_check_addr =3D -1; + + /* Before destroying, signal vCPUs waiting on this condition */ + qemu_cond_broadcast(&spapr->mc_delivery_cond); + /* It is safe to call destroy as broadcast unblocks all vCPUs */ + qemu_cond_destroy(&spapr->mc_delivery_cond); + qemu_cond_init(&spapr->mc_delivery_cond); } =20 static void spapr_create_nvram(SpaprMachineState *spapr) @@ -2078,6 +2088,16 @@ static const VMStateDescription vmstate_spapr_dtb = =3D { }, }; =20 +static const VMStateDescription vmstate_spapr_guest_mc_addr =3D { + .name =3D "spapr_guest_mc_addr", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(guest_machine_check_addr, SpaprMachineState), + VMSTATE_END_OF_LIST() + }, +}; + static const VMStateDescription vmstate_spapr =3D { .name =3D "spapr", .version_id =3D 3, @@ -2110,6 +2130,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_dtb, &vmstate_spapr_cap_large_decr, &vmstate_spapr_cap_ccf_assist, + &vmstate_spapr_guest_mc_addr, NULL } }; @@ -3057,6 +3078,10 @@ static void spapr_machine_init(MachineState *machine) =20 kvmppc_spapr_enable_inkernel_multitce(); } + + spapr->mc_status =3D -1; + spapr->mc_reset =3D 0; + qemu_cond_init(&spapr->mc_delivery_cond); } =20 static int spapr_kvm_type(MachineState *machine, const char *vm_type) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 24c45b1..fb594a4 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -348,6 +348,38 @@ static void rtas_get_power_level(PowerPCCPU *cpu, Spap= rMachineState *spapr, rtas_st(rets, 1, 100); } =20 +static void rtas_ibm_nmi_register(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, + uint32_t nret, target_ulong rets) +{ + spapr->mc_reset =3D 0; + spapr->guest_machine_check_addr =3D rtas_ld(args, 1); + rtas_st(rets, 0, RTAS_OUT_SUCCESS); +} + +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, + SpaprMachineState *spapr, + uint32_t token, uint32_t nargs, + target_ulong args, + uint32_t nret, target_ulong rets) +{ + if (!spapr->guest_machine_check_addr) { + /* NMI register not called */ + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + } else { + /* + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling, + * hence unset mc_status. + */ + spapr->mc_status =3D -1; + qemu_cond_signal(&spapr->mc_delivery_cond); + rtas_st(rets, 0, RTAS_OUT_SUCCESS); + } +} + + static struct rtas_call { const char *name; spapr_rtas_fn fn; @@ -489,6 +521,10 @@ static void core_rtas_register_types(void) rtas_set_power_level); spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", rtas_get_power_level); + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register", + rtas_ibm_nmi_register); + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock", + rtas_ibm_nmi_interlock); } =20 type_init(core_rtas_register_types) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 74ce638..ee5589d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -186,6 +186,17 @@ struct SpaprMachineState { * occurs during the unplug process. */ QTAILQ_HEAD(, SpaprDimmState) pending_dimm_unplugs; =20 + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */ + target_ulong guest_machine_check_addr; + /* + * mc_status is set to -1 if mc is not in progress, else is set to the= CPU + * handling the mc. + */ + int mc_status; + /* mc_reset is set to 1 if machine reset is in progress */ + bool mc_reset; + QemuCond mc_delivery_cond; + /*< public >*/ char *kvm_type; char *host_model; @@ -622,8 +633,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_u= long opcode, #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27) #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28) #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29) +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A) +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B) =20 -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A) +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C) =20 /* RTAS ibm,get-system-parameter token values */ #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20 From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:33:51 -0000 Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6XqH924510570 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:33:53 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC168124053; Fri, 22 Mar 2019 06:33:52 +0000 (GMT) Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 83419124054; Fri, 22 Mar 2019 06:33:50 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:33:50 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:03:49 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-0064-0000-0000-000003BE85F5 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616222; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:33:52 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-0065-0000-0000-00003CCCDE5C Message-Id: <155323642914.18748.10882970739268674736.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=816 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220049 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v7 2/6] Wrapper function to wait on condition for the main loop mutex X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Introduce a wrapper function to wait on condition for the main loop mutex. This function atomically releases the main loop mutex and causes the calling thread to block on the condition. Signed-off-by: Aravinda Prasad --- cpus.c | 5 +++++ include/qemu/main-loop.h | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/cpus.c b/cpus.c index e83f72b..d9379e7 100644 --- a/cpus.c +++ b/cpus.c @@ -1858,6 +1858,11 @@ void qemu_mutex_unlock_iothread(void) qemu_mutex_unlock(&qemu_global_mutex); } =20 +void qemu_cond_wait_iothread(QemuCond *cond) +{ + qemu_cond_wait(cond, &qemu_global_mutex); +} + static bool all_vcpus_paused(void) { CPUState *cpu; diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h index f6ba78e..a6d20b0 100644 --- a/include/qemu/main-loop.h +++ b/include/qemu/main-loop.h @@ -295,6 +295,14 @@ void qemu_mutex_lock_iothread_impl(const char *file, i= nt line); */ void qemu_mutex_unlock_iothread(void); =20 +/* + * qemu_cond_wait_iothread: Wait on condition for the main loop mutex + * + * This function atomically releases the main loop mutex and causes + * the calling thread to block on the condition. + */ +void qemu_cond_wait_iothread(QemuCond *cond); + /* internal interfaces */ =20 void qemu_fd_register(int fd); From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553236910977373.051217048633; Thu, 21 Mar 2019 23:41:50 -0700 (PDT) Received: from localhost ([127.0.0.1]:52716 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Ds1-0000hL-Sv for importer@patchew.org; Fri, 22 Mar 2019 02:41:37 -0400 Received: from eggs.gnu.org ([209.51.188.92]:46786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dko-0003LY-Ui for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h7Dkn-0000wM-Fb for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:10 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:59826) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h7Dkm-0000vP-Qw for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:09 -0400 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2M6TIl3008274 for ; Fri, 22 Mar 2019 02:34:07 -0400 Received: from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203]) by mx0a-001b2d01.pphosted.com with ESMTP id 2rcqbj67py-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 22 Mar 2019 02:34:07 -0400 Received: from localhost by e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:34:00 -0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6Y1HB24248344 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:34:02 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C56F2B2067; Fri, 22 Mar 2019 06:34:01 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A2E10B205F; Fri, 22 Mar 2019 06:33:59 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:33:59 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:03:58 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-0064-0000-0000-000003BE85F7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616222; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:34:02 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-0065-0000-0000-00003CCCDE6A Message-Id: <155323643836.18748.13006461397179281455.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220049 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v7 3/6] target/ppc: Handle NMI guest exit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Memory error such as bit flips that cannot be corrected by hardware are passed on to the kernel for handling. If the memory address in error belongs to guest then the guest kernel is responsible for taking suitable action. Patch [1] enhances KVM to exit guest with exit reason set to KVM_EXIT_NMI in such cases. This patch handles KVM_EXIT_NMI exit. [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html (e20bbd3d and related commits) Signed-off-by: Aravinda Prasad --- hw/ppc/spapr_events.c | 22 ++++++++++++++++++++++ include/hw/ppc/spapr.h | 1 + target/ppc/kvm.c | 16 ++++++++++++++++ target/ppc/kvm_ppc.h | 2 ++ 4 files changed, 41 insertions(+) diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index ae0f093..e7a24ad 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -620,6 +620,28 @@ void spapr_hotplug_req_remove_by_count_indexed(SpaprDr= cType drc_type, RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_i= d); } =20 +void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) +{ + SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + + while (spapr->mc_status !=3D -1) { + /* + * Check whether the same CPU got machine check error + * while still handling the mc error (i.e., before + * that CPU called "ibm,nmi-interlock" + */ + if (spapr->mc_status =3D=3D cpu->vcpu_id) { + qemu_system_guest_panicked(NULL); + } + qemu_cond_wait_iothread(&spapr->mc_delivery_cond); + /* If the system is reset meanwhile, then just return */ + if (spapr->mc_reset) { + return; + } + } + spapr->mc_status =3D cpu->vcpu_id; +} + static void check_exception(PowerPCCPU *cpu, SpaprMachineState *spapr, uint32_t token, uint32_t nargs, target_ulong args, diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index ee5589d..b0d8c18 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -792,6 +792,7 @@ void spapr_reallocate_hpt(SpaprMachineState *spapr, int= shift, Error **errp); void spapr_clear_pending_events(SpaprMachineState *spapr); int spapr_max_server_number(SpaprMachineState *spapr); +void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered); =20 /* DRC callbacks. */ void spapr_core_release(DeviceState *dev); diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 2427c8e..a593448 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1738,6 +1738,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_ru= n *run) ret =3D 0; break; =20 + case KVM_EXIT_NMI: + DPRINTF("handle NMI exception\n"); + ret =3D kvm_handle_nmi(cpu, run); + break; + default: fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason); ret =3D -1; @@ -2803,6 +2808,17 @@ int kvm_arch_msi_data_to_gsi(uint32_t data) return data & 0xffff; } =20 +int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run) +{ + bool recovered =3D run->flags & KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; + + cpu_synchronize_state(CPU(cpu)); + + spapr_mce_req_event(cpu, recovered); + + return 0; +} + int kvmppc_enable_hwrng(void) { if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRN= G)) { diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 2c2ea30..df5e85f 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -80,6 +80,8 @@ bool kvmppc_hpt_needs_host_contiguous_pages(void); void kvm_check_mmu(PowerPCCPU *cpu, Error **errp); void kvmppc_set_reg_ppc_online(PowerPCCPU *cpu, unsigned int online); =20 +int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run); + #else =20 static inline uint32_t kvmppc_get_tbfreq(void) From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553237062356638.7042563094128; Thu, 21 Mar 2019 23:44:22 -0700 (PDT) Received: from localhost ([127.0.0.1]:52750 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dud-0002DT-CX for importer@patchew.org; Fri, 22 Mar 2019 02:44:19 -0400 Received: from eggs.gnu.org ([209.51.188.92]:47318) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dlw-0004cD-GT for qemu-devel@nongnu.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:34:09 -0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6YBPY16842836 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:34:11 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2530EAC05F; Fri, 22 Mar 2019 06:34:11 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A2CBBAC059; Fri, 22 Mar 2019 06:34:08 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:34:08 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:04:07 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-0068-0000-0000-000003A97A1A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616222; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:34:11 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-0069-0000-0000-000047E6316A Message-Id: <155323644727.18748.14700690930436255677.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220050 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH v7 4/6] target/ppc: Build rtas error log X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" This patch builds the rtas error log, copies it to the rtas_addr and then invokes the guest registered machine check handler. Signed-off-by: Aravinda Prasad --- hw/ppc/spapr.c | 4 + hw/ppc/spapr_events.c | 247 ++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 4 + 3 files changed, 255 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 744dcad..562d405 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2910,6 +2910,10 @@ static void spapr_machine_init(MachineState *machine) error_report("Could not get size of LPAR rtas '%s'", filename); exit(1); } + + /* Resize blob to accommodate error log. */ + spapr->rtas_size =3D spapr_get_rtas_size(spapr->rtas_size); + spapr->rtas_blob =3D g_malloc(spapr->rtas_size); if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0)= { error_report("Could not load LPAR rtas '%s'", filename); diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index e7a24ad..d7cc0a4 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -212,6 +212,106 @@ struct hp_extended_log { struct rtas_event_log_v6_hp hp; } QEMU_PACKED; =20 +struct rtas_event_log_v6_mc { +#define RTAS_LOG_V6_SECTION_ID_MC 0x4D43 /* MC */ + struct rtas_event_log_v6_section_header hdr; + uint32_t fru_id; + uint32_t proc_id; + uint8_t error_type; +#define RTAS_LOG_V6_MC_TYPE_UE 0 +#define RTAS_LOG_V6_MC_TYPE_SLB 1 +#define RTAS_LOG_V6_MC_TYPE_ERAT 2 +#define RTAS_LOG_V6_MC_TYPE_TLB 4 +#define RTAS_LOG_V6_MC_TYPE_D_CACHE 5 +#define RTAS_LOG_V6_MC_TYPE_I_CACHE 7 + uint8_t sub_err_type; +#define RTAS_LOG_V6_MC_UE_INDETERMINATE 0 +#define RTAS_LOG_V6_MC_UE_IFETCH 1 +#define RTAS_LOG_V6_MC_UE_PAGE_TABLE_WALK_IFETCH 2 +#define RTAS_LOG_V6_MC_UE_LOAD_STORE 3 +#define RTAS_LOG_V6_MC_UE_PAGE_TABLE_WALK_LOAD_STORE 4 +#define RTAS_LOG_V6_MC_SLB_PARITY 0 +#define RTAS_LOG_V6_MC_SLB_MULTIHIT 1 +#define RTAS_LOG_V6_MC_SLB_INDETERMINATE 2 +#define RTAS_LOG_V6_MC_ERAT_PARITY 1 +#define RTAS_LOG_V6_MC_ERAT_MULTIHIT 2 +#define RTAS_LOG_V6_MC_ERAT_INDETERMINATE 3 +#define RTAS_LOG_V6_MC_TLB_PARITY 1 +#define RTAS_LOG_V6_MC_TLB_MULTIHIT 2 +#define RTAS_LOG_V6_MC_TLB_INDETERMINATE 3 + uint8_t reserved_1[6]; + uint64_t effective_address; + uint64_t logical_address; +} QEMU_PACKED; + +struct mc_extended_log { + struct rtas_event_log_v6 v6hdr; + struct rtas_event_log_v6_mc mc; +} QEMU_PACKED; + +struct MC_ierror_table { + unsigned long srr1_mask; + unsigned long srr1_value; + bool nip_valid; /* nip is a valid indicator of faulting address */ + uint8_t error_type; + uint8_t error_subtype; + unsigned int initiator; + unsigned int severity; +}; + +static const struct MC_ierror_table mc_ierror_table[] =3D { +{ 0x00000000081c0000, 0x0000000000040000, true, + RTAS_LOG_V6_MC_TYPE_UE, RTAS_LOG_V6_MC_UE_IFETCH, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000000081c0000, 0x0000000000080000, true, + RTAS_LOG_V6_MC_TYPE_SLB, RTAS_LOG_V6_MC_SLB_PARITY, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000000081c0000, 0x00000000000c0000, true, + RTAS_LOG_V6_MC_TYPE_SLB, RTAS_LOG_V6_MC_SLB_MULTIHIT, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000000081c0000, 0x0000000000100000, true, + RTAS_LOG_V6_MC_TYPE_ERAT, RTAS_LOG_V6_MC_ERAT_MULTIHIT, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000000081c0000, 0x0000000000140000, true, + RTAS_LOG_V6_MC_TYPE_TLB, RTAS_LOG_V6_MC_TLB_MULTIHIT, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000000081c0000, 0x0000000000180000, true, + RTAS_LOG_V6_MC_TYPE_UE, RTAS_LOG_V6_MC_UE_PAGE_TABLE_WALK_IFETCH, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0, 0, 0, 0, 0, 0 } }; + +struct MC_derror_table { + unsigned long dsisr_value; + bool dar_valid; /* dar is a valid indicator of faulting address */ + uint8_t error_type; + uint8_t error_subtype; + unsigned int initiator; + unsigned int severity; +}; + +static const struct MC_derror_table mc_derror_table[] =3D { +{ 0x00008000, false, + RTAS_LOG_V6_MC_TYPE_UE, RTAS_LOG_V6_MC_UE_LOAD_STORE, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00004000, true, + RTAS_LOG_V6_MC_TYPE_UE, RTAS_LOG_V6_MC_UE_PAGE_TABLE_WALK_LOAD_STORE, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000800, true, + RTAS_LOG_V6_MC_TYPE_ERAT, RTAS_LOG_V6_MC_ERAT_MULTIHIT, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000400, true, + RTAS_LOG_V6_MC_TYPE_TLB, RTAS_LOG_V6_MC_TLB_MULTIHIT, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000080, true, + RTAS_LOG_V6_MC_TYPE_SLB, RTAS_LOG_V6_MC_SLB_MULTIHIT, /* Before PARITY = */ + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0x00000100, true, + RTAS_LOG_V6_MC_TYPE_SLB, RTAS_LOG_V6_MC_SLB_PARITY, + RTAS_LOG_INITIATOR_CPU, RTAS_LOG_SEVERITY_ERROR_SYNC, }, +{ 0, false, 0, 0, 0, 0 } }; + +#define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42)) + typedef enum EventClass { EVENT_CLASS_INTERNAL_ERRORS =3D 0, EVENT_CLASS_EPOW =3D 1, @@ -620,6 +720,149 @@ void spapr_hotplug_req_remove_by_count_indexed(SpaprD= rcType drc_type, RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_i= d); } =20 +ssize_t spapr_get_rtas_size(ssize_t old_rtas_size) +{ + g_assert(old_rtas_size < RTAS_ERRLOG_OFFSET); + return RTAS_ERROR_LOG_MAX; +} + +static uint64_t spapr_get_rtas_addr(void) +{ + SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + int rtas_node; + const struct fdt_property *rtas_addr_prop; + void *fdt =3D spapr->fdt_blob; + uint32_t rtas_addr; + + /* fetch rtas addr from fdt */ + rtas_node =3D fdt_path_offset(fdt, "/rtas"); + g_assert(rtas_node >=3D 0); + + rtas_addr_prop =3D fdt_get_property(fdt, rtas_node, "linux,rtas-base",= NULL); + g_assert(rtas_addr_prop); + + rtas_addr =3D fdt32_to_cpu(*(uint32_t *)rtas_addr_prop->data); + return (uint64_t)rtas_addr; +} + +static uint32_t spapr_mce_get_elog_type(PowerPCCPU *cpu, bool recovered, + struct mc_extended_log *ext_elog) +{ + int i; + CPUPPCState *env =3D &cpu->env; + uint32_t summary; + uint64_t dsisr =3D env->spr[SPR_DSISR]; + + summary =3D RTAS_LOG_VERSION_6 | RTAS_LOG_OPTIONAL_PART_PRESENT; + if (recovered) { + summary |=3D RTAS_LOG_DISPOSITION_FULLY_RECOVERED; + } else { + summary |=3D RTAS_LOG_DISPOSITION_NOT_RECOVERED; + } + + if (SRR1_MC_LOADSTORE(env->spr[SPR_SRR1])) { + for (i =3D 0; mc_derror_table[i].dsisr_value; i++) { + if (!(dsisr & mc_derror_table[i].dsisr_value)) { + continue; + } + + ext_elog->mc.error_type =3D mc_derror_table[i].error_type; + ext_elog->mc.sub_err_type =3D mc_derror_table[i].error_subtype; + if (mc_derror_table[i].dar_valid) { + ext_elog->mc.effective_address =3D cpu_to_be64(env->spr[SP= R_DAR]); + } + + summary |=3D mc_derror_table[i].initiator + | mc_derror_table[i].severity; + + return summary; + } + } else { + for (i =3D 0; mc_ierror_table[i].srr1_mask; i++) { + if ((env->spr[SPR_SRR1] & mc_ierror_table[i].srr1_mask) !=3D + mc_ierror_table[i].srr1_value) { + continue; + } + + ext_elog->mc.error_type =3D mc_ierror_table[i].error_type; + ext_elog->mc.sub_err_type =3D mc_ierror_table[i].error_subtype; + if (mc_ierror_table[i].nip_valid) { + ext_elog->mc.effective_address =3D cpu_to_be64(env->nip); + } + + summary |=3D mc_ierror_table[i].initiator + | mc_ierror_table[i].severity; + + return summary; + } + } + + summary |=3D RTAS_LOG_INITIATOR_CPU; + return summary; +} + +static void spapr_mce_build_elog(PowerPCCPU *cpu, bool recovered) +{ + SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + uint64_t rtas_addr; + CPUPPCState *env =3D &cpu->env; + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); + target_ulong r3, msr =3D 0; + struct rtas_error_log log; + struct mc_extended_log *ext_elog; + uint32_t summary; + + ext_elog =3D g_malloc0(sizeof(*ext_elog)); + + /* + * Properly set bits in MSR before we invoke the handler. + * SRR0/1, DAR and DSISR are properly set by KVM + */ + if (!(*pcc->interrupts_big_endian)(cpu)) { + msr |=3D (1ULL << MSR_LE); + } + + if (env->msr && (1ULL << MSR_SF)) { + msr |=3D (1ULL << MSR_SF); + } + + msr |=3D (1ULL << MSR_ME); + env->msr =3D msr; + + summary =3D spapr_mce_get_elog_type(cpu, recovered, ext_elog); + + log.summary =3D cpu_to_be32(summary); + log.extended_length =3D cpu_to_be32(sizeof(struct mc_extended_log)); + + /* r3 should be in BE always */ + r3 =3D cpu_to_be64(env->gpr[3]); + + spapr_init_v6hdr(&ext_elog->v6hdr); + ext_elog->mc.hdr.section_id =3D cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MC); + ext_elog->mc.hdr.section_length =3D + cpu_to_be16(sizeof(struct rtas_event_log_v6_mc)); + ext_elog->mc.hdr.section_version =3D 1; + + /* get rtas addr from fdt */ + rtas_addr =3D spapr_get_rtas_addr(); + + cpu_physical_memory_write(rtas_addr + RTAS_ERRLOG_OFFSET, &r3, sizeof(= r3)); + cpu_physical_memory_write(rtas_addr + RTAS_ERRLOG_OFFSET + sizeof(r3), + &log, sizeof(log)); + cpu_physical_memory_write(rtas_addr + RTAS_ERRLOG_OFFSET + sizeof(r3) + + sizeof(log), ext_elog, + sizeof(struct mc_extended_log)); + + /* Save gpr[3] in the guest endian mode */ + if ((*pcc->interrupts_big_endian)(cpu)) { + env->gpr[3] =3D cpu_to_be64(rtas_addr + RTAS_ERRLOG_OFFSET); + } else { + env->gpr[3] =3D cpu_to_le64(rtas_addr + RTAS_ERRLOG_OFFSET); + } + + env->nip =3D spapr->guest_machine_check_addr; +} + void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) { SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); @@ -640,6 +883,10 @@ void spapr_mce_req_event(PowerPCCPU *cpu, bool recover= ed) } } spapr->mc_status =3D cpu->vcpu_id; + + spapr_mce_build_elog(cpu, recovered); + + return; } =20 static void check_exception(PowerPCCPU *cpu, SpaprMachineState *spapr, diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index b0d8c18..0c9dec1 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -662,6 +662,9 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ul= ong opcode, #define DIAGNOSTICS_RUN_MODE_IMMEDIATE 2 #define DIAGNOSTICS_RUN_MODE_PERIODIC 3 =20 +/* Offset from rtas-base where error log is placed */ +#define RTAS_ERRLOG_OFFSET 0x25 + static inline uint64_t ppc64_phys_to_real(uint64_t addr) { return addr & ~0xF000000000000000ULL; @@ -793,6 +796,7 @@ void spapr_reallocate_hpt(SpaprMachineState *spapr, int= shift, void spapr_clear_pending_events(SpaprMachineState *spapr); int spapr_max_server_number(SpaprMachineState *spapr); void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered); +ssize_t spapr_get_rtas_size(ssize_t old_rtas_sizea); =20 /* DRC callbacks. */ void spapr_core_release(DeviceState *dev); From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553236822018513.6810336408942; Thu, 21 Mar 2019 23:40:22 -0700 (PDT) Received: from localhost ([127.0.0.1]:52660 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7Dqk-0007zq-TP for importer@patchew.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:34:41 -0000 Received: from b03ledav001.gho.boulder.ibm.com (b03ledav001.gho.boulder.ibm.com [9.17.130.232]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6YKrk31260800 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:34:20 GMT Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 40D406E052; Fri, 22 Mar 2019 06:34:20 +0000 (GMT) Received: from b03ledav001.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F35066E04C; Fri, 22 Mar 2019 06:34:17 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b03ledav001.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:34:17 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:04:16 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-0012-0000-0000-0000171BE449 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616221; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:34:42 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-0013-0000-0000-000056982206 Message-Id: <155323645659.18748.12592305605497011547.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220050 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH v7 5/6] ppc: spapr: Enable FWNMI capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Enable the KVM capability KVM_CAP_PPC_FWNMI so that the KVM causes guest exit with NMI as exit reason when it encounters a machine check exception on the address belonging to a guest. Without this capability enabled, KVM redirects machine check exceptions to guest's 0x200 vector. Signed-off-by: Aravinda Prasad --- hw/ppc/spapr_rtas.c | 15 +++++++++++++++ target/ppc/kvm.c | 14 ++++++++++++++ target/ppc/kvm_ppc.h | 6 ++++++ 3 files changed, 35 insertions(+) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index fb594a4..939f428 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -49,6 +49,7 @@ #include "hw/ppc/fdt.h" #include "target/ppc/mmu-hash64.h" #include "target/ppc/mmu-book3s-v3.h" +#include "kvm_ppc.h" =20 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spa= pr, uint32_t token, uint32_t nargs, @@ -354,6 +355,20 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu, target_ulong args, uint32_t nret, target_ulong rets) { + int ret; + + ret =3D kvmppc_fwnmi_enable(cpu); + + if (ret =3D=3D 1) { + rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); + return; + } + + if (ret < 0) { + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); + return; + } + spapr->mc_reset =3D 0; spapr->guest_machine_check_addr =3D rtas_ld(args, 1); rtas_st(rets, 0, RTAS_OUT_SUCCESS); diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index a593448..161b45e 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -93,6 +93,7 @@ static int cap_ppc_safe_indirect_branch; static int cap_ppc_count_cache_flush_assist; static int cap_ppc_nested_kvm_hv; static int cap_large_decr; +static int cap_ppc_fwnmi; =20 static uint32_t debug_inst_opcode; =20 @@ -155,6 +156,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) kvmppc_get_cpu_characteristics(s); cap_ppc_nested_kvm_hv =3D kvm_vm_check_extension(s, KVM_CAP_PPC_NESTED= _HV); cap_large_decr =3D kvmppc_get_dec_bits(); + cap_ppc_fwnmi =3D kvm_check_extension(s, KVM_CAP_PPC_FWNMI); /* * Note: setting it to false because there is not such capability * in KVM at this moment. @@ -2091,6 +2093,18 @@ void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic= _proxy) } } =20 +int kvmppc_fwnmi_enable(PowerPCCPU *cpu) +{ + CPUState *cs =3D CPU(cpu); + + if (!cap_ppc_fwnmi) { + return 1; + } + + return kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0); +} + + int kvmppc_smt_threads(void) { return cap_ppc_smt ? cap_ppc_smt : 1; diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index df5e85f..cf7b24f 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -27,6 +27,7 @@ void kvmppc_enable_h_page_init(void); void kvmppc_set_papr(PowerPCCPU *cpu); int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr); void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy); +int kvmppc_fwnmi_enable(PowerPCCPU *cpu); int kvmppc_smt_threads(void); void kvmppc_hint_smt_possible(Error **errp); int kvmppc_set_smt_threads(int smt); @@ -158,6 +159,11 @@ static inline void kvmppc_set_mpic_proxy(PowerPCCPU *c= pu, int mpic_proxy) { } =20 +int kvmppc_fwnmi_enable(PowerPCCPU *cpu) +{ + return 1; +} + static inline int kvmppc_smt_threads(void) { return 1; From nobody Tue May 21 19:11:25 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1553236794585942.9758298216781; Thu, 21 Mar 2019 23:39:54 -0700 (PDT) Received: from localhost ([127.0.0.1]:52658 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7DqJ-0007e9-Ge for importer@patchew.org; Fri, 22 Mar 2019 02:39:51 -0400 Received: from eggs.gnu.org ([209.51.188.92]:47176) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h7DlE-000469-OM for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h7DlD-0001Tk-Fn for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:36 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:33044) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h7DlD-0001Rz-1X for qemu-devel@nongnu.org; Fri, 22 Mar 2019 02:34:35 -0400 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2M6YGKQ071084 for ; Fri, 22 Mar 2019 02:34:33 -0400 Received: from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154]) by mx0a-001b2d01.pphosted.com with ESMTP id 2rctbc0eay-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 22 Mar 2019 02:34:33 -0400 Received: from localhost by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 22 Mar 2019 06:34:25 -0000 Received: from b03ledav002.gho.boulder.ibm.com (b03ledav002.gho.boulder.ibm.com [9.17.130.233]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2M6YTMR20512776 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 22 Mar 2019 06:34:29 GMT Received: from b03ledav002.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A7FF5136053; Fri, 22 Mar 2019 06:34:29 +0000 (GMT) Received: from b03ledav002.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 48C5513604F; Fri, 22 Mar 2019 06:34:27 +0000 (GMT) Received: from [127.0.1.1] (unknown [9.85.69.175]) by b03ledav002.gho.boulder.ibm.com (Postfix) with ESMTP; Fri, 22 Mar 2019 06:34:26 +0000 (GMT) From: Aravinda Prasad To: aik@au1.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au Date: Fri, 22 Mar 2019 12:04:25 +0530 In-Reply-To: <155323635511.18748.18133954505098138975.stgit@aravinda> References: <155323635511.18748.18133954505098138975.stgit@aravinda> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19032206-0020-0000-0000-00000ECBF322 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010793; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01177898; UDB=6.00616222; IPR=6.00958596; MB=3.00026104; MTD=3.00000008; XFM=3.00000015; UTC=2019-03-22 06:34:27 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19032206-0021-0000-0000-0000652BC0C5 Message-Id: <155323646571.18748.12843943976827665328.stgit@aravinda> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-22_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903220050 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v7 6/6] migration: Block migration while handling machine check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, aravinda@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Block VM migration requests until the machine check error handling is complete as (i) these errors are specific to the source hardware and is irrelevant on the target hardware, (ii) these errors cause data corruption and should be handled before migration. Signed-off-by: Aravinda Prasad --- hw/ppc/spapr_events.c | 17 +++++++++++++++++ hw/ppc/spapr_rtas.c | 4 ++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 24 insertions(+) diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index d7cc0a4..6356a38 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -41,6 +41,7 @@ #include "qemu/bcd.h" #include "hw/ppc/spapr_ovec.h" #include +#include "migration/blocker.h" =20 #define RTAS_LOG_VERSION_MASK 0xff000000 #define RTAS_LOG_VERSION_6 0x06000000 @@ -866,6 +867,22 @@ static void spapr_mce_build_elog(PowerPCCPU *cpu, bool= recovered) void spapr_mce_req_event(PowerPCCPU *cpu, bool recovered) { SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); + int ret; + Error *local_err =3D NULL; + + error_setg(&spapr->migration_blocker, + "Live migration not supported during machine check handling"); + ret =3D migrate_add_blocker(spapr->migration_blocker, &local_err); + if (ret < 0) { + /* + * We don't want to abort and let the migration to continue. In a + * rare case, the machine check handler will run on the target + * hardware. Though this is not preferable, it is better than abor= ting + * the migration or killing the VM. + */ + error_free(spapr->migration_blocker); + fprintf(stderr, "Warning: Machine check during VM migration\n"); + } =20 while (spapr->mc_status !=3D -1) { /* diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 939f428..b0676f1 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -50,6 +50,7 @@ #include "target/ppc/mmu-hash64.h" #include "target/ppc/mmu-book3s-v3.h" #include "kvm_ppc.h" +#include "migration/blocker.h" =20 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spa= pr, uint32_t token, uint32_t nargs, @@ -391,6 +392,9 @@ static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, spapr->mc_status =3D -1; qemu_cond_signal(&spapr->mc_delivery_cond); rtas_st(rets, 0, RTAS_OUT_SUCCESS); + migrate_del_blocker(spapr->migration_blocker); + error_free(spapr->migration_blocker); + spapr->migration_blocker =3D NULL; } } =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 0c9dec1..b8eced4 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -10,6 +10,7 @@ #include "hw/ppc/spapr_irq.h" #include "hw/ppc/spapr_xive.h" /* For SpaprXive */ #include "hw/ppc/xics.h" /* For ICSState */ +#include "qapi/error.h" =20 struct SpaprVioBus; struct SpaprPhbState; @@ -212,6 +213,8 @@ struct SpaprMachineState { SpaprCapabilities def, eff, mig; =20 unsigned gpu_numa_id; + + Error *migration_blocker; }; =20 #define H_SUCCESS 0