From nobody Sun Nov 9 20:23:20 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551716755932326.04898037535713; Mon, 4 Mar 2019 08:25:55 -0800 (PST) Received: from localhost ([127.0.0.1]:56744 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0qPY-000619-RH for importer@patchew.org; Mon, 04 Mar 2019 11:25:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42865) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0qDN-0004sS-Nv for qemu-devel@nongnu.org; Mon, 04 Mar 2019 11:13:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h0qDM-0005a8-OP for qemu-devel@nongnu.org; Mon, 04 Mar 2019 11:13:17 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:55443 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h0qDM-0004U9-Gy for qemu-devel@nongnu.org; Mon, 04 Mar 2019 11:13:16 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id AC1761A116A; Mon, 4 Mar 2019 17:12:14 +0100 (CET) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 90E9F1A204C; Mon, 4 Mar 2019 17:12:14 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 4 Mar 2019 17:11:42 +0100 Message-Id: <1551715911-8440-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551715911-8440-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551715911-8440-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 02/11] tests/tcg: target/mips: Add wrappers for various MSA instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add wrappers for various MSA integer instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 70 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 70 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index 302f0ab..c650ed2 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -152,5 +152,75 @@ DO_MSA__WD__WS_WT(MIN_U_H, min_u.h) DO_MSA__WD__WS_WT(MIN_U_W, min_u.w) DO_MSA__WD__WS_WT(MIN_U_D, min_u.d) =20 +DO_MSA__WD__WS_WT(BCLR_B, bclr.b) +DO_MSA__WD__WS_WT(BCLR_H, bclr.h) +DO_MSA__WD__WS_WT(BCLR_W, bclr.w) +DO_MSA__WD__WS_WT(BCLR_D, bclr.d) + +DO_MSA__WD__WS_WT(BSET_B, bset.b) +DO_MSA__WD__WS_WT(BSET_H, bset.h) +DO_MSA__WD__WS_WT(BSET_W, bset.w) +DO_MSA__WD__WS_WT(BSET_D, bset.d) + +DO_MSA__WD__WS_WT(BNEG_B, bneg.b) +DO_MSA__WD__WS_WT(BNEG_H, bneg.h) +DO_MSA__WD__WS_WT(BNEG_W, bneg.w) +DO_MSA__WD__WS_WT(BNEG_D, bneg.d) + +DO_MSA__WD__WS_WT(PCKEV_B, pckev.b) +DO_MSA__WD__WS_WT(PCKEV_H, pckev.h) +DO_MSA__WD__WS_WT(PCKEV_W, pckev.w) +DO_MSA__WD__WS_WT(PCKEV_D, pckev.d) + +DO_MSA__WD__WS_WT(PCKOD_B, pckod.b) +DO_MSA__WD__WS_WT(PCKOD_H, pckod.h) +DO_MSA__WD__WS_WT(PCKOD_W, pckod.w) +DO_MSA__WD__WS_WT(PCKOD_D, pckod.d) + +DO_MSA__WD__WS_WT(VSHF_B, vshf.b) +DO_MSA__WD__WS_WT(VSHF_H, vshf.h) +DO_MSA__WD__WS_WT(VSHF_W, vshf.w) +DO_MSA__WD__WS_WT(VSHF_D, vshf.d) + +DO_MSA__WD__WS_WT(SLL_B, sll.b) +DO_MSA__WD__WS_WT(SLL_H, sll.h) +DO_MSA__WD__WS_WT(SLL_W, sll.w) +DO_MSA__WD__WS_WT(SLL_D, sll.d) + +DO_MSA__WD__WS_WT(SRA_B, sra.b) +DO_MSA__WD__WS_WT(SRA_H, sra.h) +DO_MSA__WD__WS_WT(SRA_W, sra.w) +DO_MSA__WD__WS_WT(SRA_D, sra.d) + +DO_MSA__WD__WS_WT(SRAR_B, srar.b) +DO_MSA__WD__WS_WT(SRAR_H, srar.h) +DO_MSA__WD__WS_WT(SRAR_W, srar.w) +DO_MSA__WD__WS_WT(SRAR_D, srar.d) + +DO_MSA__WD__WS_WT(SRL_B, srl.b) +DO_MSA__WD__WS_WT(SRL_H, srl.h) +DO_MSA__WD__WS_WT(SRL_W, srl.w) +DO_MSA__WD__WS_WT(SRL_D, srl.d) + +DO_MSA__WD__WS_WT(SRLR_B, srlr.b) +DO_MSA__WD__WS_WT(SRLR_H, srlr.h) +DO_MSA__WD__WS_WT(SRLR_W, srlr.w) +DO_MSA__WD__WS_WT(SRLR_D, srlr.d) + +DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) +DO_MSA__WD__WS_WT(BMZ_V, bmz.v) + +DO_MSA__WD__WS_WT(FMAX_W, fmax.w) +DO_MSA__WD__WS_WT(FMAX_D, fmax.d) + +DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w) +DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d) + +DO_MSA__WD__WS_WT(FMIN_W, fmin.w) +DO_MSA__WD__WS_WT(FMIN_D, fmin.d) + +DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w) +DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d) + =20 #endif --=20 2.7.4