From nobody Sun Nov 9 16:02:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1551712917815482.55320524576473; Mon, 4 Mar 2019 07:21:57 -0800 (PST) Received: from localhost ([127.0.0.1]:55676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0pPa-0001D2-Vs for importer@patchew.org; Mon, 04 Mar 2019 10:21:51 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57168) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0pIe-00040i-91 for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h0pIc-0007qk-Jr for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:40 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:39729 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1h0pIc-0007oD-6z for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:14:38 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 9AC901A2129; Mon, 4 Mar 2019 16:13:33 +0100 (CET) Received: from rtrkw310-lin.domain.local (rtrkw310-lin.domain.local [10.10.13.57]) by mail.rt-rk.com (Postfix) with ESMTPSA id 51C761A213B; Mon, 4 Mar 2019 16:13:33 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Mateja Marjanovic To: qemu-devel@nongnu.org Date: Mon, 4 Mar 2019 16:13:25 +0100 Message-Id: <1551712405-2530-14-git-send-email-mateja.marjanovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551712405-2530-1-git-send-email-mateja.marjanovic@rt-rk.com> References: <1551712405-2530-1-git-send-email-mateja.marjanovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v3 13/13] target/mips: Add emulation of MMI instruction PEXTUW X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Mateja Marjanovic Add emulation of MMI instruction PEXTUW. The emulation is implemented using TCG front end operations directly to achieve better performance. Signed-off-by: Mateja Marjanovic --- target/mips/translate.c | 58 +++++++++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 57 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index da3fcad..5848f7a 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -25151,6 +25151,60 @@ static void gen_mmi_pextuh(DisasContext *ctx) } } =20 +/* + * PEXTUW rd, rs, rt + * + * Parallel Extend Upper from Word + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---------+---------+-----------+ + * | MMI | rs | rt | rd | PEXTUW | MMI1 | + * +-----------+---------+---------+---------+---------+-----------+ + */ + +static void gen_mmi_pextuw(DisasContext *ctx) +{ + uint32_t rs, rt, rd; + uint32_t opcode; + + opcode =3D ctx->opcode; + + rs =3D extract32(opcode, 21, 5); + rt =3D extract32(opcode, 16, 5); + rd =3D extract32(opcode, 11, 5); + + if (rd =3D=3D 0) { + /* nop */ + } else { + TCGv_i64 t0 =3D tcg_temp_new(); + TCGv_i64 t1 =3D tcg_temp_new(); + uint64_t mask =3D (1ULL << 32) - 1; + + tcg_gen_movi_i64(t1, 0); + + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_andi_i64(t0, cpu_gpr[rs], mask); + tcg_gen_shli_i64(t0, t0, 32); + tcg_gen_or_i64(t1, t0, t1); + mask <<=3D 32; + + tcg_gen_mov_i64(cpu_mmr[rd], t1); + tcg_gen_movi_i64(t1, 0); + + tcg_gen_andi_i64(t0, cpu_gpr[rt], mask); + tcg_gen_or_i64(t1, t0, t1); + tcg_gen_andi_i64(t0, cpu_gpr[rs], mask); + tcg_gen_shli_i64(t0, t0, 32); + tcg_gen_or_i64(t1, t0, t1); + + tcg_gen_mov_i64(cpu_gpr[rd], t1); + + tcg_temp_free(t0); + tcg_temp_free(t1); + } +} + #endif =20 =20 @@ -28140,7 +28194,6 @@ static void decode_mmi1(CPUMIPSState *env, DisasCon= text *ctx) case MMI_OPC_1_PCEQB: /* TODO: MMI_OPC_1_PCEQB */ case MMI_OPC_1_PADDUW: /* TODO: MMI_OPC_1_PADDUW */ case MMI_OPC_1_PSUBUW: /* TODO: MMI_OPC_1_PSUBUW */ - case MMI_OPC_1_PEXTUW: /* TODO: MMI_OPC_1_PEXTUW */ case MMI_OPC_1_PADDUH: /* TODO: MMI_OPC_1_PADDUH */ case MMI_OPC_1_PSUBUH: /* TODO: MMI_OPC_1_PSUBUH */ case MMI_OPC_1_PADDUB: /* TODO: MMI_OPC_1_PADDUB */ @@ -28154,6 +28207,9 @@ static void decode_mmi1(CPUMIPSState *env, DisasCon= text *ctx) case MMI_OPC_1_PEXTUH: gen_mmi_pextuh(ctx); break; + case MMI_OPC_1_PEXTUW: + gen_mmi_pextuw(ctx); + break; default: MIPS_INVAL("TX79 MMI class MMI1"); generate_exception_end(ctx, EXCP_RI); --=20 2.7.4