From nobody Tue Feb 10 19:10:19 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 155050433318796.52574332464565; Mon, 18 Feb 2019 07:38:53 -0800 (PST) Received: from localhost ([127.0.0.1]:60783 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvl0I-0001e5-53 for importer@patchew.org; Mon, 18 Feb 2019 10:38:46 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54268) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvkuq-00054o-Fo for qemu-devel@nongnu.org; Mon, 18 Feb 2019 10:33:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gvkuj-0001yx-DO for qemu-devel@nongnu.org; Mon, 18 Feb 2019 10:33:08 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:43889 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gvkui-0001xL-W7 for qemu-devel@nongnu.org; Mon, 18 Feb 2019 10:33:01 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2C0661A2197; Mon, 18 Feb 2019 16:32:00 +0100 (CET) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 008BB1A2190; Mon, 18 Feb 2019 16:31:59 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 18 Feb 2019 16:31:36 +0100 Message-Id: <1550503897-31141-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550503897-31141-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1550503897-31141-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 6/7] disas: nanoMIPS: Correct comments to handlers of some DSP instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, peter.maydell@linaro.org, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Correct comments to handlers of some DSP instructions. Signed-off-by: Aleksandar Markovic --- disas/nanomips.cpp | 128 ++++++++++++++++++++++++++++---------------------= ---- 1 file changed, 67 insertions(+), 61 deletions(-) diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp index f90f1a9..33fb045 100644 --- a/disas/nanomips.cpp +++ b/disas/nanomips.cpp @@ -10183,14 +10183,13 @@ std::string NMD::MFHGC0(uint64 instruction) =20 =20 /* - * + * [DSP] MFHI rs, ac - Move from HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 xxxxx 00000001111111 * rt ----- - * rs ----- - * rd ----- + * ac -- */ std::string NMD::MFHI_DSP_(uint64 instruction) { @@ -10231,14 +10230,13 @@ std::string NMD::MFHTR(uint64 instruction) =20 =20 /* - * + * [DSP] MFLO rs, ac - Move from HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 xxxxx 01000001111111 * rt ----- - * rs ----- - * rd ----- + * ac -- */ std::string NMD::MFLO_DSP_(uint64 instruction) { @@ -10399,7 +10397,7 @@ std::string NMD::MOD(uint64 instruction) =20 =20 /* - * + * [DSP] MODSUB rd, rs, rt - Modular subtraction on an index value * * 3 2 1 * 10987654321098765432109876543210 @@ -10427,7 +10425,7 @@ std::string NMD::MODSUB(uint64 instruction) * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 x1010010101 * rt ----- * rs ----- * rd ----- @@ -10639,14 +10637,14 @@ std::string NMD::MOVZ(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MSUB ac, rs, rt - Multiply word and subtract from accumulator * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10101010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MSUB_DSP_(uint64 instruction) { @@ -10711,14 +10709,13 @@ std::string NMD::MSUBF_S(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults - * + * [DSP] MSUBU ac, rs, rt - Multiply word and add to * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 11101010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MSUBU_DSP_(uint64 instruction) { @@ -10919,14 +10916,13 @@ std::string NMD::MTHGC0(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MTHI rs, ac - Move to HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 10000001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTHI_DSP_(uint64 instruction) { @@ -10941,14 +10937,13 @@ std::string NMD::MTHI_DSP_(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MTHLIP rs, ac - Copy LO to HI and a GPR to LO and increment pos b= y 32 * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 00001001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTHLIP(uint64 instruction) { @@ -10989,14 +10984,13 @@ std::string NMD::MTHTR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MTLO rs, ac - Move to LO register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 11000001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTLO_DSP_(uint64 instruction) { @@ -11155,11 +11149,12 @@ std::string NMD::MUL_D(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MUL.PH rd, rs, rt - Multiply vector integer half words to same si= ze + * products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 00000101101 * rt ----- * rs ----- * rd ----- @@ -11179,11 +11174,12 @@ std::string NMD::MUL_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MUL_S.PH rd, rs, rt - Multiply vector integer half words to same = size + * products (saturated) * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10000101101 * rt ----- * rs ----- * rd ----- @@ -11227,11 +11223,12 @@ std::string NMD::MUL_S(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULEQ_S.W.PHL rd, rs, rt - Multiply vector fractional left halfwo= rds + * to expanded width products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0000100101 * rt ----- * rs ----- * rd ----- @@ -11251,11 +11248,12 @@ std::string NMD::MULEQ_S_W_PHL(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULEQ_S.W.PHR rd, rs, rt - Multiply vector fractional right halfw= ords + * to expanded width products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0001100101 * rt ----- * rs ----- * rd ----- @@ -11275,11 +11273,12 @@ std::string NMD::MULEQ_S_W_PHR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULEU_S.PH.QBL rd, rs, rt - Multiply vector fractional left bytes + * by halfwords to halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0010010101 * rt ----- * rs ----- * rd ----- @@ -11299,11 +11298,12 @@ std::string NMD::MULEU_S_PH_QBL(uint64 instructio= n) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULEU_S.PH.QBR rd, rs, rt - Multiply vector fractional right bytes + * by halfwords to halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0011010101 * rt ----- * rs ----- * rd ----- @@ -11323,11 +11323,12 @@ std::string NMD::MULEU_S_PH_QBR(uint64 instructio= n) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULQ_RS.PH rd, rs, rt - Multiply vector fractional halfwords + * to fractional halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0100010101 * rt ----- * rs ----- * rd ----- @@ -11347,11 +11348,12 @@ std::string NMD::MULQ_RS_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULQ_RS.W rd, rs, rt - Multiply fractional words to same size + * product with saturation and rounding * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0110010101 * rt ----- * rs ----- * rd ----- @@ -11371,11 +11373,12 @@ std::string NMD::MULQ_RS_W(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULQ_S.PH rd, rs, rt - Multiply fractional halfwords to same size + * products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0101010101 * rt ----- * rs ----- * rd ----- @@ -11395,11 +11398,12 @@ std::string NMD::MULQ_S_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULQ_S.W rd, rs, rt - Multiply fractional words to same size prod= uct + * with saturation * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0111010101 * rt ----- * rs ----- * rd ----- @@ -11419,14 +11423,15 @@ std::string NMD::MULQ_S_W(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULSA.W.PH ac, rs, rt - Multiply and subtract vector integer half= word + * elements and accumulate * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULSA_W_PH(uint64 instruction) { @@ -11443,14 +11448,15 @@ std::string NMD::MULSA_W_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULSAQ_S.W.PH ac, rs, rt - Multiply and subtract vector fractional + * halfwords and accumulate * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 11110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULSAQ_S_W_PH(uint64 instruction) { @@ -11467,14 +11473,14 @@ std::string NMD::MULSAQ_S_W_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULT ac, rs, rt - Multiply word * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 00110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULT_DSP_(uint64 instruction) { @@ -11491,14 +11497,14 @@ std::string NMD::MULT_DSP_(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] MULTU ac, rs, rt - Multiply unsigned word * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 01110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULTU_DSP_(uint64 instruction) { --=20 2.7.4