From nobody Sat Nov 8 10:44:17 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1550143445676508.09797869549413; Thu, 14 Feb 2019 03:24:05 -0800 (PST) Received: from localhost ([127.0.0.1]:46537 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1guF7a-0005o9-KE for importer@patchew.org; Thu, 14 Feb 2019 06:24:02 -0500 Received: from eggs.gnu.org ([209.51.188.92]:58632) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1guF3m-000367-2H for qemu-devel@nongnu.org; Thu, 14 Feb 2019 06:20:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1guF3c-0001Z5-Av for qemu-devel@nongnu.org; Thu, 14 Feb 2019 06:19:58 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:55122 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1guF3c-0001WX-1x for qemu-devel@nongnu.org; Thu, 14 Feb 2019 06:19:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 0A1941A45A3; Thu, 14 Feb 2019 12:19:47 +0100 (CET) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 68E981A242D; Thu, 14 Feb 2019 12:19:46 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 14 Feb 2019 12:18:20 +0100 Message-Id: <1550143103-20133-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1550143103-20133-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1550143103-20133-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v3 6/9] tests/tcg: target/mips: Add wrappers for MSA interleave instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, alex.bennee@linaro.org, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Add wrappers for MSA interleave instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 39 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 39 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include= /wrappers_msa.h index 8f8d00b..3017ed5 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -54,4 +54,43 @@ DO_MSA__WD__WS(PCNT_W, pcnt.w) DO_MSA__WD__WS(PCNT_D, pcnt.d) =20 =20 +#define DO_MSA__WD__WS_WT(suffix, mnemonic) \ +static inline void do_msa_##suffix(void *input1, void *input2, \ + void *output) \ +{ \ + __asm__ volatile ( \ + "move $t0, %0\n\t" \ + "ld.d $w11, 0($t0)\n\t" \ + "move $t0, %1\n\t" \ + "ld.d $w12, 0($t0)\n\t" \ + #mnemonic " $w10, $w11, $w12\n\t" \ + "move $t0, %2\n\t" \ + "st.d $w10, 0($t0)\n\t" \ + : \ + : "r" (input1), "r" (input2), "r" (output) \ + : "t0", "memory" \ + ); \ +} + +DO_MSA__WD__WS_WT(ILVEV_B, ilvev.b) +DO_MSA__WD__WS_WT(ILVEV_H, ilvev.h) +DO_MSA__WD__WS_WT(ILVEV_W, ilvev.w) +DO_MSA__WD__WS_WT(ILVEV_D, ilvev.d) + +DO_MSA__WD__WS_WT(ILVOD_B, ilvod.b) +DO_MSA__WD__WS_WT(ILVOD_H, ilvod.h) +DO_MSA__WD__WS_WT(ILVOD_W, ilvod.w) +DO_MSA__WD__WS_WT(ILVOD_D, ilvod.d) + +DO_MSA__WD__WS_WT(ILVL_B, ilvl.b) +DO_MSA__WD__WS_WT(ILVL_H, ilvl.h) +DO_MSA__WD__WS_WT(ILVL_W, ilvl.w) +DO_MSA__WD__WS_WT(ILVL_D, ilvl.d) + +DO_MSA__WD__WS_WT(ILVR_B, ilvr.b) +DO_MSA__WD__WS_WT(ILVR_H, ilvr.h) +DO_MSA__WD__WS_WT(ILVR_W, ilvr.w) +DO_MSA__WD__WS_WT(ILVR_D, ilvr.d) + + #endif --=20 2.7.4