From nobody Fri Nov 7 14:40:31 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548099670112932.296747313837; Mon, 21 Jan 2019 11:41:10 -0800 (PST) Received: from localhost ([127.0.0.1]:58859 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfRQ-0000af-HI for importer@patchew.org; Mon, 21 Jan 2019 14:41:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexH-0001kt-Fd for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexC-0004GR-SQ for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:51 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:51943 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexC-0004EG-LJ for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:50 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 62D6F1A21C1; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 4337A1A21B8; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:17 +0100 Message-Id: <1548097698-28951-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 5/6] target/mips: Extend gen_scwp() functionality to support EVA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Extend gen_scwp() functionality to support EVA by adding an additional argument, and accordingly change related invocations. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index b660235..e57b2be 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -3708,7 +3708,7 @@ static void gen_st_cond (DisasContext *ctx, uint32_t = opc, int rt, } =20 static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset, - uint32_t reg1, uint32_t reg2) + uint32_t reg1, uint32_t reg2, bool eva) { TCGv taddr =3D tcg_temp_local_new(); TCGv lladdr =3D tcg_temp_local_new(); @@ -3736,7 +3736,7 @@ static void gen_scwp(DisasContext *ctx, uint32_t base= , int16_t offset, =20 tcg_gen_ld_i64(llval, cpu_env, offsetof(CPUMIPSState, llval_wp)); tcg_gen_atomic_cmpxchg_i64(val, taddr, llval, tval, - ctx->mem_idx, MO_64); + eva ? MIPS_HFLAG_UM : ctx->mem_idx, MO_64); if (reg1 !=3D 0) { tcg_gen_movi_tl(cpu_gpr[reg1], 1); } @@ -21481,7 +21481,8 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) break; case NM_SCWP: check_xnp(ctx); - gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5)); + gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5), + false); break; } break; @@ -21585,7 +21586,8 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) check_xnp(ctx); check_eva(ctx); check_cp0_enabled(ctx); - gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5)); + gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5), + true); break; default: generate_exception_end(ctx, EXCP_RI); --=20 2.7.4