From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 154809904568957.89857334865576; Mon, 21 Jan 2019 11:30:45 -0800 (PST) Received: from localhost ([127.0.0.1]:58697 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfHQ-0000sN-Fq for importer@patchew.org; Mon, 21 Jan 2019 14:30:44 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40248) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexJ-0001mj-8m for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexI-0004Lf-Ib for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:50404 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexG-0003u9-Bd for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 38B121A21B6; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 1E8E51A20C9; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:13 +0100 Message-Id: <1548097698-28951-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 1/6] target/mips: nanoMIPS: Remove duplicate macro definitions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Several macros were defined twice, with identical values. Remove duplicates. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 057aaf9..fb2c42c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -18433,16 +18433,6 @@ static inline int decode_gpr_gpr4_zero(int r) } =20 =20 -/* extraction utilities */ - -#define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7) -#define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7) -#define NANOMIPS_EXTRACT_RS2(op) uMIPS_RS(op) -#define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7) -#define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f) -#define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f) - - static void gen_adjust_sp(DisasContext *ctx, int u) { gen_op_addr_addi(ctx, cpu_gpr[29], cpu_gpr[29], u); --=20 2.7.4 From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548099739721163.15238189612694; Mon, 21 Jan 2019 11:42:19 -0800 (PST) Received: from localhost ([127.0.0.1]:58867 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfSc-0001BA-Cr for importer@patchew.org; Mon, 21 Jan 2019 14:42:18 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40240) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexJ-0001mU-2r for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexI-0004L8-Cx for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:50408 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexG-0003uD-B6 for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 468931A20C9; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 268371A2113; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:14 +0100 Message-Id: <1548097698-28951-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 2/6] target/mips: nanoMIPS: Remove an unused macro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Remove a macro that is never used. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index fb2c42c..aad760c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -18393,7 +18393,6 @@ enum { =20 #define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7) #define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7) -#define NANOMIPS_EXTRACT_RS2(op) uMIPS_RS(op) #define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7) #define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f) #define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f) --=20 2.7.4 From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15480981955661003.7598000131068; Mon, 21 Jan 2019 11:16:35 -0800 (PST) Received: from localhost ([127.0.0.1]:58440 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glf3i-0006vn-HH for importer@patchew.org; Mon, 21 Jan 2019 14:16:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexJ-0001mz-Hy for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexI-0004Lo-Kv for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:50412 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexI-0003uF-5D for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 4E4EC1A21FB; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 2EB2E1A2142; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:15 +0100 Message-Id: <1548097698-28951-4-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 3/6] target/mips: nanoMIPS: Rename macros for extracting 3-bit GPR codes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Rename macros for extracting 3-bit GPR codes for better consistency with the documentation. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index aad760c..ceaa582 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -18391,9 +18391,9 @@ enum { =20 /* extraction utilities */ =20 -#define NANOMIPS_EXTRACT_RD(op) ((op >> 7) & 0x7) -#define NANOMIPS_EXTRACT_RS(op) ((op >> 4) & 0x7) -#define NANOMIPS_EXTRACT_RS1(op) ((op >> 1) & 0x7) +#define NANOMIPS_EXTRACT_RT3(op) ((op >> 7) & 0x7) +#define NANOMIPS_EXTRACT_RS3(op) ((op >> 4) & 0x7) +#define NANOMIPS_EXTRACT_RD3(op) ((op >> 1) & 0x7) #define NANOMIPS_EXTRACT_RD5(op) ((op >> 5) & 0x1f) #define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f) =20 @@ -18490,8 +18490,8 @@ static void gen_restore(DisasContext *ctx, uint8_t = rt, uint8_t count, =20 static void gen_pool16c_nanomips_insn(DisasContext *ctx) { - int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode)); - int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode)); + int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode)); + int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); =20 switch (extract32(ctx->opcode, 2, 2)) { case NM_NOT16: @@ -21792,9 +21792,9 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx) { uint32_t op; - int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode)); - int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode)); - int rd =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS1(ctx->opcode)); + int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode)); + int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); + int rd =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode)); int offset; int imm; =20 @@ -21957,7 +21957,7 @@ static int decode_nanomips_opc(CPUMIPSState *env, D= isasContext *ctx) break; case NM_SB16: rt =3D decode_gpr_gpr3_src_store( - NANOMIPS_EXTRACT_RD(ctx->opcode)); + NANOMIPS_EXTRACT_RT3(ctx->opcode)); gen_st(ctx, OPC_SB, rt, rs, offset); break; case NM_LBU16: @@ -21976,7 +21976,7 @@ static int decode_nanomips_opc(CPUMIPSState *env, D= isasContext *ctx) break; case NM_SH16: rt =3D decode_gpr_gpr3_src_store( - NANOMIPS_EXTRACT_RD(ctx->opcode)); + NANOMIPS_EXTRACT_RT3(ctx->opcode)); gen_st(ctx, OPC_SH, rt, rs, offset); break; case NM_LHU16: @@ -22031,14 +22031,14 @@ static int decode_nanomips_opc(CPUMIPSState *env,= DisasContext *ctx) break; case NM_SW16: rt =3D decode_gpr_gpr3_src_store( - NANOMIPS_EXTRACT_RD(ctx->opcode)); - rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode)); + NANOMIPS_EXTRACT_RT3(ctx->opcode)); + rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); offset =3D extract32(ctx->opcode, 0, 4) << 2; gen_st(ctx, OPC_SW, rt, rs, offset); break; case NM_SWGP16: rt =3D decode_gpr_gpr3_src_store( - NANOMIPS_EXTRACT_RD(ctx->opcode)); + NANOMIPS_EXTRACT_RT3(ctx->opcode)); offset =3D extract32(ctx->opcode, 0, 7) << 2; gen_st(ctx, OPC_SW, rt, 28, offset); break; --=20 2.7.4 From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548098773883426.61142464198554; Mon, 21 Jan 2019 11:26:13 -0800 (PST) Received: from localhost ([127.0.0.1]:58620 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfD2-0005bu-Ru for importer@patchew.org; Mon, 21 Jan 2019 14:26:12 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40256) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexJ-0001ms-EU for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexI-0004Le-Iq for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:57 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:50418 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexI-0003uH-5E for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 594A21A2113; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 38E781A21C2; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:16 +0100 Message-Id: <1548097698-28951-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 4/6] target/mips: Correct the second argument type of cpu_supports_isa() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic "insn_flags" bitfield was expanded from 32-bit to 64-bit at one moment. However, this was not reflected at the second argument of the function cpu_supports_isa(). By chance, this did not create a wrong behavior, since the second argument was always with the left-most half zero, but it is still a bug waiting to happen. correct by changint the type of the second argument to be 64-bit always. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/cpu.h | 2 +- target/mips/translate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 03c03fd..fd22bd5 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1011,7 +1011,7 @@ int cpu_mips_signal_handler(int host_signum, void *pi= nfo, void *puc); #define CPU_RESOLVING_TYPE TYPE_MIPS_CPU =20 bool cpu_supports_cps_smp(const char *cpu_type); -bool cpu_supports_isa(const char *cpu_type, unsigned int isa); +bool cpu_supports_isa(const char *cpu_type, uint64_t isa); void cpu_set_exception_base(int vp_index, target_ulong address); =20 /* mips_int.c */ diff --git a/target/mips/translate.c b/target/mips/translate.c index ceaa582..b660235 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -29803,7 +29803,7 @@ bool cpu_supports_cps_smp(const char *cpu_type) return (mcc->cpu_def->CP0_Config3 & (1 << CP0C3_CMGCR)) !=3D 0; } =20 -bool cpu_supports_isa(const char *cpu_type, unsigned int isa) +bool cpu_supports_isa(const char *cpu_type, uint64_t isa) { const MIPSCPUClass *mcc =3D MIPS_CPU_CLASS(object_class_by_name(cpu_ty= pe)); return (mcc->cpu_def->insn_flags & isa) !=3D 0; --=20 2.7.4 From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548099670112932.296747313837; Mon, 21 Jan 2019 11:41:10 -0800 (PST) Received: from localhost ([127.0.0.1]:58859 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfRQ-0000af-HI for importer@patchew.org; Mon, 21 Jan 2019 14:41:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexH-0001kt-Fd for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexC-0004GR-SQ for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:51 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:51943 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexC-0004EG-LJ for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:50 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 62D6F1A21C1; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 4337A1A21B8; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:17 +0100 Message-Id: <1548097698-28951-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 5/6] target/mips: Extend gen_scwp() functionality to support EVA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Extend gen_scwp() functionality to support EVA by adding an additional argument, and accordingly change related invocations. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index b660235..e57b2be 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -3708,7 +3708,7 @@ static void gen_st_cond (DisasContext *ctx, uint32_t = opc, int rt, } =20 static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset, - uint32_t reg1, uint32_t reg2) + uint32_t reg1, uint32_t reg2, bool eva) { TCGv taddr =3D tcg_temp_local_new(); TCGv lladdr =3D tcg_temp_local_new(); @@ -3736,7 +3736,7 @@ static void gen_scwp(DisasContext *ctx, uint32_t base= , int16_t offset, =20 tcg_gen_ld_i64(llval, cpu_env, offsetof(CPUMIPSState, llval_wp)); tcg_gen_atomic_cmpxchg_i64(val, taddr, llval, tval, - ctx->mem_idx, MO_64); + eva ? MIPS_HFLAG_UM : ctx->mem_idx, MO_64); if (reg1 !=3D 0) { tcg_gen_movi_tl(cpu_gpr[reg1], 1); } @@ -21481,7 +21481,8 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) break; case NM_SCWP: check_xnp(ctx); - gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5)); + gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5), + false); break; } break; @@ -21585,7 +21586,8 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) check_xnp(ctx); check_eva(ctx); check_cp0_enabled(ctx); - gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5)); + gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3,= 5), + true); break; default: generate_exception_end(ctx, EXCP_RI); --=20 2.7.4 From nobody Fri Nov 7 10:33:52 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1548099817018249.1366305199789; Mon, 21 Jan 2019 11:43:37 -0800 (PST) Received: from localhost ([127.0.0.1]:58874 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glfTr-0001nb-Vh for importer@patchew.org; Mon, 21 Jan 2019 14:43:36 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40215) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1glexI-0001ls-DX for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1glexG-0004KC-B1 for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:56 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:51944 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1glexC-0004EI-Kx for qemu-devel@nongnu.org; Mon, 21 Jan 2019 14:09:50 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 78A391A2142; Mon, 21 Jan 2019 20:08:52 +0100 (CET) Received: from rtrkw774-lin.mipstec.com (unknown [82.117.201.26]) by mail.rt-rk.com (Postfix) with ESMTPSA id 4D9D81A21ED; Mon, 21 Jan 2019 20:08:52 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 21 Jan 2019 20:08:18 +0100 Message-Id: <1548097698-28951-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1548097698-28951-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH 6/6] disas: nanoMIPS: Amend DSP instructions related comments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Amend some DSP instructions related comments. Signed-off-by: Aleksandar Markovic --- disas/nanomips.cpp | 119 +++++++++++++++++++++++++++++++++----------------= ---- 1 file changed, 75 insertions(+), 44 deletions(-) diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp index 17f4c22..f90f1a9 100644 --- a/disas/nanomips.cpp +++ b/disas/nanomips.cpp @@ -1836,7 +1836,8 @@ std::string NMD::ABS_S(uint64 instruction) =20 =20 /* - * ABSQ_S.PH rt, rs - Find Absolute Value of Two Fractional Halfwords + * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords + * with 16-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -1857,7 +1858,8 @@ std::string NMD::ABSQ_S_PH(uint64 instruction) =20 =20 /* - * ABSQ_S.QB rt, rs - Find Absolute Value of Four Fractional Byte Values + * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte va= lues + * with 8-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -1878,7 +1880,8 @@ std::string NMD::ABSQ_S_QB(uint64 instruction) =20 =20 /* - * + * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-= bit + * saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -2233,7 +2236,7 @@ std::string NMD::ADDIUPC_48_(uint64 instruction) =20 =20 /* - * ADDQ.PH rd, rt, rs - Add Fractional Halfword Vectors + * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors * * 3 2 1 * 10987654321098765432109876543210 @@ -2257,7 +2260,8 @@ std::string NMD::ADDQ_PH(uint64 instruction) =20 =20 /* - * ADDQ_S.PH rd, rt, rs - Add Fractional Halfword Vectors + * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit + * saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -2281,7 +2285,7 @@ std::string NMD::ADDQ_S_PH(uint64 instruction) =20 =20 /* - * ADDQ_S.W rd, rt, rs - Add Fractional Words + * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -2305,8 +2309,8 @@ std::string NMD::ADDQ_S_W(uint64 instruction) =20 =20 /* - * ADDQH.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift + * right to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -2330,8 +2334,8 @@ std::string NMD::ADDQH_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift + * right to halve results with rounding * * 3 2 1 * 10987654321098765432109876543210 @@ -2355,7 +2359,8 @@ std::string NMD::ADDQH_R_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to ha= lve + * results with rounding * * 3 2 1 * 10987654321098765432109876543210 @@ -2379,7 +2384,8 @@ std::string NMD::ADDQH_R_W(uint64 instruction) =20 =20 /* - * ADDQH.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Resu= lts + * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve + * results * * 3 2 1 * 10987654321098765432109876543210 @@ -2403,7 +2409,7 @@ std::string NMD::ADDQH_W(uint64 instruction) =20 =20 /* - * ADDSC rd, rt, rs - Add Signed Word and Set Carry Bit + * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit * * 3 2 1 * 10987654321098765432109876543210 @@ -2496,7 +2502,7 @@ std::string NMD::ADDU_4X4_(uint64 instruction) =20 =20 /* - * ADDU.PH rd, rt, rs - Unsigned Add Integer Halfwords + * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -2544,7 +2550,8 @@ std::string NMD::ADDU_QB(uint64 instruction) =20 =20 /* - * ADDU_S.PH rd, rt, rs - Unsigned Add Integer Halfwords + * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 1= 6-bit + * saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -7848,7 +7855,7 @@ std::string NMD::INS(uint64 instruction) =20 =20 /* - * + * [DSP] INSV - Insert bit field variable * * 3 2 1 * 10987654321098765432109876543210 @@ -9698,7 +9705,8 @@ std::string NMD::LWXS_32_(uint64 instruction) =20 =20 /* - * + * [DSP] MADD ac, rs, rt - Multiply two words and add to the specified + * accumulator * * 3 2 1 * 10987654321098765432109876543210 @@ -9770,7 +9778,8 @@ std::string NMD::MADDF_S(uint64 instruction) =20 =20 /* - * + * [DSP] MADDU ac, rs, rt - Multiply two unsigned words and add to the + * specified accumulator * * 3 2 1 * 10987654321098765432109876543210 @@ -9794,7 +9803,8 @@ std::string NMD::MADDU_DSP_(uint64 instruction) =20 =20 /* - * + * [DSP] MAQ_S.W.PHL ac, rs, rt - Multiply the left-most single vector + * fractional halfword elements with accumulation * * 3 2 1 * 10987654321098765432109876543210 @@ -9818,7 +9828,8 @@ std::string NMD::MAQ_S_W_PHL(uint64 instruction) =20 =20 /* - * + * [DSP] MAQ_S.W.PHR ac, rs, rt - Multiply the right-most single vector + * fractional halfword elements with accumulation * * 3 2 1 * 10987654321098765432109876543210 @@ -9842,7 +9853,8 @@ std::string NMD::MAQ_S_W_PHR(uint64 instruction) =20 =20 /* - * + * [DSP] MAQ_SA.W.PHL ac, rs, rt - Multiply the left-most single vector + * fractional halfword elements with saturating accumulation * * 3 2 1 * 10987654321098765432109876543210 @@ -9866,7 +9878,8 @@ std::string NMD::MAQ_SA_W_PHL(uint64 instruction) =20 =20 /* - * + * [DSP] MAQ_SA.W.PHR ac, rs, rt - Multiply the right-most single vector + * fractional halfword elements with saturating accumulation * * 3 2 1 * 10987654321098765432109876543210 @@ -11722,7 +11735,8 @@ std::string NMD::ORI(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PACKRL.PH rd, rs, rt - Pack a word using the right halfword from = one + * source register and left halfword from another source register * * 3 2 1 * 10987654321098765432109876543210 @@ -11764,7 +11778,8 @@ std::string NMD::PAUSE(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PICK.PH rd, rs, rt - Pick a vector of halfwords based on condition + * code bits * * 3 2 1 * 10987654321098765432109876543210 @@ -11788,7 +11803,8 @@ std::string NMD::PICK_PH(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PICK.QB rd, rs, rt - Pick a vector of byte values based on condit= ion + * code bits * * 3 2 1 * 10987654321098765432109876543210 @@ -11812,7 +11828,8 @@ std::string NMD::PICK_QB(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQ.W.PHL rt, rs - Expand the precision of the left-most eleme= nt + * of a paired halfword * * 3 2 1 * 10987654321098765432109876543210 @@ -11834,7 +11851,8 @@ std::string NMD::PRECEQ_W_PHL(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQ.W.PHR rt, rs - Expand the precision of the right-most elem= ent + * of a paired halfword * * 3 2 1 * 10987654321098765432109876543210 @@ -11856,7 +11874,8 @@ std::string NMD::PRECEQ_W_PHR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQU.PH.QBLA rt, rs - Expand the precision of the two + * left-alternate elements of a quad byte vector * * 3 2 1 * 10987654321098765432109876543210 @@ -11878,7 +11897,8 @@ std::string NMD::PRECEQU_PH_QBLA(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQU.PH.QBL rt, rs - Expand the precision of the two left-most + * elements of a quad byte vector * * 3 2 1 * 10987654321098765432109876543210 @@ -11900,7 +11920,8 @@ std::string NMD::PRECEQU_PH_QBL(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQU.PH.QBRA rt, rs - Expand the precision of the two + * right-alternate elements of a quad byte vector * * 3 2 1 * 10987654321098765432109876543210 @@ -11922,7 +11943,8 @@ std::string NMD::PRECEQU_PH_QBRA(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEQU.PH.QBR rt, rs - Expand the precision of the two right-most + * elements of a quad byte vector * * 3 2 1 * 10987654321098765432109876543210 @@ -11944,7 +11966,9 @@ std::string NMD::PRECEQU_PH_QBR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEU.PH.QBLA rt, rs - Expand the precision of the two + * left-alternate elements of a quad byte vector to four unsigned + * halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -11966,7 +11990,8 @@ std::string NMD::PRECEU_PH_QBLA(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEU.PH.QBL rt, rs - Expand the precision of the two left-most + * elements of a quad byte vector to form unsigned halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -11988,7 +12013,9 @@ std::string NMD::PRECEU_PH_QBL(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEU.PH.QBRA rt, rs - Expand the precision of the two + * right-alternate elements of a quad byte vector to form four + * unsigned halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -12010,7 +12037,8 @@ std::string NMD::PRECEU_PH_QBRA(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * [DSP] PRECEU.PH.QBR rt, rs - Expand the precision of the two right-most + * elements of a quad byte vector to form unsigned halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -15202,7 +15230,7 @@ std::string NMD::SUBU_32_(uint64 instruction) =20 =20 /* - * SUBU.PH rd, rs, rt - Subtract Unsigned Integer Halfwords + * [DSP] SUBU.PH rd, rs, rt - Subtract unsigned unsigned halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -15226,7 +15254,7 @@ std::string NMD::SUBU_PH(uint64 instruction) =20 =20 /* - * SUBU.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector + * [DSP] SUBU.QB rd, rs, rt - Subtract unsigned quad byte vectors * * 3 2 1 * 10987654321098765432109876543210 @@ -15250,7 +15278,8 @@ std::string NMD::SUBU_QB(uint64 instruction) =20 =20 /* - * SUBU_S.PH rd, rs, rt - Subtract Unsigned Integer Halfwords (saturating) + * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with + * 8-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -15274,7 +15303,8 @@ std::string NMD::SUBU_S_PH(uint64 instruction) =20 =20 /* - * SUBU_S.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector (saturating) + * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with + * 8-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -15298,8 +15328,8 @@ std::string NMD::SUBU_S_QB(uint64 instruction) =20 =20 /* - * SUBUH.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve - * Results + * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift + * to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15323,8 +15353,8 @@ std::string NMD::SUBUH_QB(uint64 instruction) =20 =20 /* - * SUBUH_R.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve - * Results (rounding) + * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift + * to halve results with rounding * * 3 2 1 * 10987654321098765432109876543210 @@ -16412,7 +16442,8 @@ std::string NMD::WAIT(uint64 instruction) =20 =20 /* - * WRDSP rt, mask - Write Fields to DSPControl Register from a GPR + * [DSP] WRDSP rt, mask - Write selected fields from a GPR to the DSPContr= ol + * register * * 3 2 1 * 10987654321098765432109876543210 --=20 2.7.4