From nobody Fri Nov 7 13:05:14 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547745496020932.8682177402677; Thu, 17 Jan 2019 09:18:16 -0800 (PST) Received: from localhost ([127.0.0.1]:48505 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkBJ0-00047B-LK for importer@patchew.org; Thu, 17 Jan 2019 12:18:14 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37238) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkBGP-0002aj-7C for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkBGI-000811-JY for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:29 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:60428 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gkBG7-0007gr-W6 for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:16 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id x0HHETeJ120033 for ; Thu, 17 Jan 2019 12:15:09 -0500 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2q2v3uwdax-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 17 Jan 2019 12:15:08 -0500 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 17 Jan 2019 17:15:01 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x0HHF1Ro4850018 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 17 Jan 2019 17:15:01 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E698411C050; Thu, 17 Jan 2019 17:15:00 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C437A11C04C; Thu, 17 Jan 2019 17:15:00 +0000 (GMT) Received: from smtp.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.1]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 17 Jan 2019 17:15:00 +0000 (GMT) Received: from bahia.lan (sig-9-145-42-56.uk.ibm.com [9.145.42.56]) by smtp.lab.toulouse-stg.fr.ibm.com (Postfix) with ESMTP id 8B994220129; Thu, 17 Jan 2019 18:14:59 +0100 (CET) From: Greg Kurz To: David Gibson Date: Thu, 17 Jan 2019 18:14:59 +0100 In-Reply-To: <154774526588.1208625.11295698301887807297.stgit@bahia.lan> References: <154774526588.1208625.11295698301887807297.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19011717-4275-0000-0000-000003008FC8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19011717-4276-0000-0000-0000380EB570 Message-Id: <154774529913.1208625.7473971232891874613.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-01-17_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=9 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901170123 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH v3 05/19] spapr: Set irq type in a dedicated function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Cornelia Huck , Gerd Hoffmann , Michael Roth , "Michael S. Tsirkin" , Alexey Kardashevskiy , David Hildenbrand , qemu-devel@nongnu.org, Greg Kurz , qemu-s390x@nongnu.org, Dmitry Fleytman , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric?= Le Goater , Marcel Apfelbaum , Paolo Bonzini , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" PHB hotplug will need to set the type of all LSIs at machine init. Prepare for that by moving the behaviour of setting the type from spapr_irq_claim() to a separate spapr_irq_set_type() function. Have all the callers of spapr_irq_claim() to also call the new function. There's no such need of separating allocation and type setting for MSIs, so this introduces a convenient spapr_irq_claim_msi() function for MSI users. Wire all this to the existing backends. Signed-off-by: Greg Kurz --- hw/ppc/spapr_events.c | 4 +-- hw/ppc/spapr_irq.c | 59 ++++++++++++++++++++++++++++++++++++----= ---- hw/ppc/spapr_pci.c | 5 ++-- hw/ppc/spapr_vio.c | 2 + include/hw/ppc/spapr_irq.h | 7 ++++- 5 files changed, 59 insertions(+), 18 deletions(-) diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index b9c7ecb9e987..777a70842acc 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -713,7 +713,7 @@ void spapr_events_init(sPAPRMachineState *spapr) epow_irq =3D spapr_irq_findone(spapr, &error_fatal); } =20 - spapr_irq_claim(spapr, epow_irq, false, &error_fatal); + spapr_irq_claim(spapr, epow_irq, &error_fatal); =20 QTAILQ_INIT(&spapr->pending_events); =20 @@ -737,7 +737,7 @@ void spapr_events_init(sPAPRMachineState *spapr) hp_irq =3D spapr_irq_findone(spapr, &error_fatal); } =20 - spapr_irq_claim(spapr, hp_irq, false, &error_fatal); + spapr_irq_claim_msi(spapr, hp_irq, &error_fatal); =20 spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT= _PLUG, hp_irq); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index bcd816c5a5fb..396dd09bdbe0 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -125,8 +125,7 @@ error: error_propagate(errp, local_err); } =20 -static int spapr_irq_claim_xics(sPAPRMachineState *spapr, int irq, bool ls= i, - Error **errp) +static int spapr_irq_claim_xics(sPAPRMachineState *spapr, int irq, Error *= *errp) { ICSState *ics =3D spapr->ics; =20 @@ -142,11 +141,20 @@ static int spapr_irq_claim_xics(sPAPRMachineState *sp= apr, int irq, bool lsi, return -1; } =20 - ics_set_irq_type(ics, irq - ics->offset, lsi); ics_claim_irq(ics, irq - ics->offset); return 0; } =20 +static void spapr_irq_set_type_xics(sPAPRMachineState *spapr, int irq, boo= l lsi) +{ + ICSState *ics =3D spapr->ics; + + assert(ics); + assert(ics_valid_irq(ics, irq)); + + ics_set_irq_type(ics, irq - ics->offset, lsi); +} + static void spapr_irq_free_xics(sPAPRMachineState *spapr, int irq, int num) { ICSState *ics =3D spapr->ics; @@ -245,6 +253,7 @@ sPAPRIrq spapr_irq_xics =3D { =20 .init =3D spapr_irq_init_xics, .claim =3D spapr_irq_claim_xics, + .set_type =3D spapr_irq_set_type_xics, .free =3D spapr_irq_free_xics, .qirq =3D spapr_qirq_xics, .print_info =3D spapr_irq_print_info_xics, @@ -292,17 +301,20 @@ static void spapr_irq_init_xive(sPAPRMachineState *sp= apr, Error **errp) spapr_xive_hcall_init(spapr); } =20 -static int spapr_irq_claim_xive(sPAPRMachineState *spapr, int irq, bool ls= i, - Error **errp) +static int spapr_irq_claim_xive(sPAPRMachineState *spapr, int irq, Error *= *errp) { if (!spapr_xive_irq_claim(spapr->xive, irq)) { error_setg(errp, "IRQ %d is invalid", irq); return -1; } - xive_source_irq_set(&spapr->xive->source, irq, lsi); return 0; } =20 +static void spapr_irq_set_type_xive(sPAPRMachineState *spapr, int irq, boo= l lsi) +{ + xive_source_irq_set(&spapr->xive->source, irq, lsi); +} + static void spapr_irq_free_xive(sPAPRMachineState *spapr, int irq, int num) { int i; @@ -403,6 +415,7 @@ sPAPRIrq spapr_irq_xive =3D { =20 .init =3D spapr_irq_init_xive, .claim =3D spapr_irq_claim_xive, + .set_type =3D spapr_irq_set_type_xive, .free =3D spapr_irq_free_xive, .qirq =3D spapr_qirq_xive, .print_info =3D spapr_irq_print_info_xive, @@ -466,19 +479,19 @@ static void spapr_irq_init_dual(sPAPRMachineState *sp= apr, Error **errp) } } =20 -static int spapr_irq_claim_dual(sPAPRMachineState *spapr, int irq, bool ls= i, +static int spapr_irq_claim_dual(sPAPRMachineState *spapr, int irq, Error **errp) { Error *local_err =3D NULL; int ret; =20 - ret =3D spapr_irq_xics.claim(spapr, irq, lsi, &local_err); + ret =3D spapr_irq_xics.claim(spapr, irq, &local_err); if (local_err) { error_propagate(errp, local_err); return ret; } =20 - ret =3D spapr_irq_xive.claim(spapr, irq, lsi, &local_err); + ret =3D spapr_irq_xive.claim(spapr, irq, &local_err); if (local_err) { error_propagate(errp, local_err); return ret; @@ -487,6 +500,12 @@ static int spapr_irq_claim_dual(sPAPRMachineState *spa= pr, int irq, bool lsi, return ret; } =20 +static void spapr_irq_set_type_dual(sPAPRMachineState *spapr, int irq, boo= l lsi) +{ + spapr_irq_xics.set_type(spapr, irq, lsi); + spapr_irq_xive.set_type(spapr, irq, lsi); +} + static void spapr_irq_free_dual(sPAPRMachineState *spapr, int irq, int num) { spapr_irq_xics.free(spapr, irq, num); @@ -582,6 +601,7 @@ sPAPRIrq spapr_irq_dual =3D { =20 .init =3D spapr_irq_init_dual, .claim =3D spapr_irq_claim_dual, + .set_type =3D spapr_irq_set_type_dual, .free =3D spapr_irq_free_dual, .qirq =3D spapr_qirq_dual, .print_info =3D spapr_irq_print_info_dual, @@ -608,9 +628,25 @@ void spapr_irq_init(sPAPRMachineState *spapr, Error **= errp) spapr->irq->nr_irqs); } =20 -int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp) +int spapr_irq_claim(sPAPRMachineState *spapr, int irq, Error **errp) +{ + return spapr->irq->claim(spapr, irq, errp); +} + +void spapr_irq_set_type(sPAPRMachineState *spapr, int irq, bool lsi) { - return spapr->irq->claim(spapr, irq, lsi, errp); + return spapr->irq->set_type(spapr, irq, lsi); +} + +int spapr_irq_claim_msi(sPAPRMachineState *spapr, int irq, Error **errp) +{ + int ret =3D spapr_irq_claim(spapr, irq, errp); + + if (!ret) { + spapr_irq_set_type(spapr, irq, false); + } + + return ret; } =20 void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num) @@ -699,6 +735,7 @@ sPAPRIrq spapr_irq_xics_legacy =3D { =20 .init =3D spapr_irq_init_xics, .claim =3D spapr_irq_claim_xics, + .set_type =3D spapr_irq_set_type_xics, .free =3D spapr_irq_free_xics, .qirq =3D spapr_qirq_xics, .print_info =3D spapr_irq_print_info_xics, diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index ccdaf2c9a606..ec9d4d28004c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -391,7 +391,7 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, } =20 for (i =3D 0; i < req_num; i++) { - spapr_irq_claim(spapr, irq + i, false, &err); + spapr_irq_claim_msi(spapr, irq + i, &err); if (err) { error_reportf_err(err, "Can't allocate MSIs for device %x: ", config_addr); @@ -1738,11 +1738,12 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) } } =20 - spapr_irq_claim(spapr, irq, true, &local_err); + spapr_irq_claim(spapr, irq, &local_err); if (local_err) { error_propagate_prepend(errp, local_err, "can't allocate LSIs:= "); return; } + spapr_irq_set_type(spapr, irq, true); =20 sphb->lsi_table[i].irq =3D irq; } diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index f80b70a39c46..9ae4351d4414 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -546,7 +546,7 @@ static void spapr_vio_busdev_realize(DeviceState *qdev,= Error **errp) } } =20 - spapr_irq_claim(spapr, dev->irq, false, &local_err); + spapr_irq_claim_msi(spapr, dev->irq, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 14b02c3aca33..42b325eb51ba 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -36,7 +36,8 @@ typedef struct sPAPRIrq { uint8_t ov5; =20 void (*init)(sPAPRMachineState *spapr, Error **errp); - int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp= ); + int (*claim)(sPAPRMachineState *spapr, int irq, Error **errp); + void (*set_type)(sPAPRMachineState *spapr, int irq, bool lsi); void (*free)(sPAPRMachineState *spapr, int irq, int num); qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq); void (*print_info)(sPAPRMachineState *spapr, Monitor *mon); @@ -55,7 +56,9 @@ extern sPAPRIrq spapr_irq_xive; extern sPAPRIrq spapr_irq_dual; =20 void spapr_irq_init(sPAPRMachineState *spapr, Error **errp); -int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp); +int spapr_irq_claim(sPAPRMachineState *spapr, int irq, Error **errp); +void spapr_irq_set_type(sPAPRMachineState *spapr, int irq, bool lsi); +int spapr_irq_claim_msi(sPAPRMachineState *spapr, int irq, Error **errp); void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); int spapr_irq_post_load(sPAPRMachineState *spapr, int version_id);