From nobody Fri Nov 7 13:02:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1547745443322153.81403692374352; Thu, 17 Jan 2019 09:17:23 -0800 (PST) Received: from localhost ([127.0.0.1]:48501 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkBI7-0003OQ-5S for importer@patchew.org; Thu, 17 Jan 2019 12:17:19 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37082) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkBFu-00026t-Nf for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkBFs-0007T2-6z for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:02 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:59004) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gkBFr-0007RO-Mj for qemu-devel@nongnu.org; Thu, 17 Jan 2019 12:15:00 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id x0HHEQjN000714 for ; Thu, 17 Jan 2019 12:14:58 -0500 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2q2tuuhj95-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 17 Jan 2019 12:14:57 -0500 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 17 Jan 2019 17:14:48 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x0HHEl0n51183852 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 17 Jan 2019 17:14:47 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B43624C058; Thu, 17 Jan 2019 17:14:47 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 954F24C046; Thu, 17 Jan 2019 17:14:47 +0000 (GMT) Received: from smtp.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.1]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 17 Jan 2019 17:14:47 +0000 (GMT) Received: from bahia.lan (sig-9-145-42-56.uk.ibm.com [9.145.42.56]) by smtp.lab.toulouse-stg.fr.ibm.com (Postfix) with ESMTP id 61A5E220129; Thu, 17 Jan 2019 18:14:46 +0100 (CET) From: Greg Kurz To: David Gibson Date: Thu, 17 Jan 2019 18:14:46 +0100 In-Reply-To: <154774526588.1208625.11295698301887807297.stgit@bahia.lan> References: <154774526588.1208625.11295698301887807297.stgit@bahia.lan> User-Agent: StGit/unknown-version MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19011717-0016-0000-0000-00000246D604 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19011717-0017-0000-0000-000032A0FA8D Message-Id: <154774528595.1208625.15523908858345133758.stgit@bahia.lan> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-01-17_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=8 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=784 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901170123 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v3 03/19] xics: Disintricate allocation and type setting of interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Cornelia Huck , Gerd Hoffmann , Michael Roth , "Michael S. Tsirkin" , Alexey Kardashevskiy , David Hildenbrand , qemu-devel@nongnu.org, Greg Kurz , qemu-s390x@nongnu.org, Dmitry Fleytman , qemu-ppc@nongnu.org, =?utf-8?q?C=C3=A9dric?= Le Goater , Marcel Apfelbaum , Paolo Bonzini , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" The current code assumes that an interrupt is allocated as soon as its type is set to MSI or LSI. PHB hotplug will require to be able to set the type of an interrupt before actually allocating it. Disintricate type setting from allocation by using another flag bit for the latter. Introduce a new ics_claim_irq() function for allocation. The behavior of aborting if the same irq gets allocated twice is kept. ics_set_irq_type() now only sets the type to MSI or LSI. It doesn't bring anything to abort if the type was already set before. Drop the assert and XICS_FLAGS_IRQ_MASK on the way. Older QEMUs don't know about XICS_FLAGS_IRQ_CLAIMED. In order to safely handle incoming migration, we must fix the irq flags. This is done at post load thanks to a compat property. We don't need to do anything for backward migration since older machines only care for the irq type. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/core/machine.c | 4 ++++ hw/intc/xics.c | 28 +++++++++++++++++++++++++--- hw/ppc/pnv_psi.c | 1 + hw/ppc/spapr_irq.c | 4 +--- include/hw/ppc/xics.h | 8 ++++++-- 5 files changed, 37 insertions(+), 8 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 1a0a9ab1117a..536a34092367 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -25,6 +25,10 @@ =20 GlobalProperty hw_compat_3_1[] =3D { { + .driver =3D "ics-base", + .property =3D "has-claimed-flag", + .value =3D "off", + },{ .driver =3D "pcie-root-port", .property =3D "x-speed", .value =3D "2_5", diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 16e8ffa2aaf7..82cf04548907 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -75,7 +75,7 @@ void ics_pic_print_info(ICSState *ics, Monitor *mon) for (i =3D 0; i < ics->nr_irqs; i++) { ICSIRQState *irq =3D ics->irqs + i; =20 - if (!(irq->flags & XICS_FLAGS_IRQ_MASK)) { + if (!(irq->flags & XICS_FLAGS_IRQ_CLAIMED)) { continue; } monitor_printf(mon, " %4x %s %02x %02x\n", @@ -662,6 +662,22 @@ static int ics_base_dispatch_post_load(void *opaque, i= nt version_id) ICSState *ics =3D opaque; ICSStateClass *info =3D ICS_BASE_GET_CLASS(ics); =20 + if (!ics->has_claimed_flag) { + int i; + + for (i =3D 0; i < ics->nr_irqs; i++) { + ICSIRQState *irq =3D ics->irqs + i; + + /* + * For older machines, allocating the irq and setting its type= is + * the same thing. + */ + if (irq->flags & (XICS_FLAGS_IRQ_LSI| XICS_FLAGS_IRQ_MSI)) { + irq->flags |=3D XICS_FLAGS_IRQ_CLAIMED; + } + } + } + if (info->post_load) { return info->post_load(ics, version_id); } @@ -702,6 +718,7 @@ static const VMStateDescription vmstate_ics_base =3D { =20 static Property ics_base_properties[] =3D { DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), + DEFINE_PROP_BOOL("has-claimed-flag", ICSState, has_claimed_flag, true), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -741,10 +758,15 @@ ICPState *xics_icp_get(XICSFabric *xi, int server) return xic->icp_get(xi, server); } =20 -void ics_set_irq_type(ICSState *ics, int srcno, bool lsi) +void ics_claim_irq(ICSState *ics, int srcno) { - assert(!(ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MASK)); + assert(ICS_IRQ_FREE(ics, srcno)); + + ics->irqs[srcno].flags |=3D XICS_FLAGS_IRQ_CLAIMED; +} =20 +void ics_set_irq_type(ICSState *ics, int srcno, bool lsi) +{ ics->irqs[srcno].flags |=3D lsi ? XICS_FLAGS_IRQ_LSI : XICS_FLAGS_IRQ_MSI; } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 8ced09506321..ced34e1119dc 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -488,6 +488,7 @@ static void pnv_psi_realize(DeviceState *dev, Error **e= rrp) =20 for (i =3D 0; i < ics->nr_irqs; i++) { ics_set_irq_type(ics, i, true); + ics_claim_irq(ics, i); } =20 psi->qirqs =3D qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irq= s); diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 1da7a32348fc..86c712d15382 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -125,9 +125,6 @@ error: error_propagate(errp, local_err); } =20 -#define ICS_IRQ_FREE(ics, srcno) \ - (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) - static int spapr_irq_claim_xics(sPAPRMachineState *spapr, int irq, bool ls= i, Error **errp) { @@ -146,6 +143,7 @@ static int spapr_irq_claim_xics(sPAPRMachineState *spap= r, int irq, bool lsi, } =20 ics_set_irq_type(ics, irq - ics->offset, lsi); + ics_claim_irq(ics, irq - ics->offset); return 0; } =20 diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index fad786e8b22d..e3be5cc663c5 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -131,6 +131,7 @@ struct ICSState { /*< public >*/ uint32_t nr_irqs; uint32_t offset; + bool has_claimed_flag; ICSIRQState *irqs; XICSFabric *xics; }; @@ -153,13 +154,15 @@ struct ICSIRQState { #define XICS_STATUS_PRESENTED 0x10 #define XICS_STATUS_QUEUED 0x20 uint8_t status; -/* (flags & XICS_FLAGS_IRQ_MASK) =3D=3D 0 means the interrupt is not alloc= ated */ #define XICS_FLAGS_IRQ_LSI 0x1 #define XICS_FLAGS_IRQ_MSI 0x2 -#define XICS_FLAGS_IRQ_MASK 0x3 +#define XICS_FLAGS_IRQ_CLAIMED 0x4 uint8_t flags; }; =20 +#define ICS_IRQ_FREE(ics, srcno) \ + (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_CLAIMED))) + struct XICSFabric { Object parent; }; @@ -193,6 +196,7 @@ void ics_simple_write_xive(ICSState *ics, int nr, int s= erver, void ics_simple_set_irq(void *opaque, int srcno, int val); void ics_kvm_set_irq(void *opaque, int srcno, int val); =20 +void ics_claim_irq(ICSState *ics, int srcno); void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); void icp_pic_print_info(ICPState *icp, Monitor *mon); void ics_pic_print_info(ICSState *ics, Monitor *mon);