From nobody Fri Nov 7 04:18:25 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1545822648441984.8096166186028; Wed, 26 Dec 2018 03:10:48 -0800 (PST) Received: from localhost ([127.0.0.1]:45512 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc75K-0002Pr-WB for importer@patchew.org; Wed, 26 Dec 2018 06:10:47 -0500 Received: from eggs.gnu.org ([208.118.235.92]:56972) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc72S-0007vh-TZ for qemu-devel@nongnu.org; Wed, 26 Dec 2018 06:07:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc72R-0001oj-QH for qemu-devel@nongnu.org; Wed, 26 Dec 2018 06:07:48 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:54664 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc72R-0001o5-F5 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 06:07:47 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2B0181A1DEE; Wed, 26 Dec 2018 12:07:00 +0100 (CET) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 01DED1A20D0; Wed, 26 Dec 2018 12:07:00 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 26 Dec 2018 12:06:20 +0100 Message-Id: <1545822388-10911-13-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1545822388-10911-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1545822388-10911-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 12/20] disas: nanoMIPS: Clean up handling of 16-bit logic instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Clean up handling of 16-bit logic nanoMIPS instructions: - AND[16] - ANDI[16] - NOR[16] - NOT[16] - OR[16] - XOR[16] Signed-off-by: Aleksandar Markovic --- disas/nanomips.cpp | 55 ++++++++++++++++++++++++--------------------------= ---- 1 file changed, 24 insertions(+), 31 deletions(-) diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp index 72e2266..115c347 100644 --- a/disas/nanomips.cpp +++ b/disas/nanomips.cpp @@ -2483,13 +2483,12 @@ std::string NMD::ALUIPC(uint64 instruction) =20 =20 /* - * AND[16] rt3, rs3 - + * AND[16] rt3, rs3 - Write logical OR of registers rs3 and rt3 to registe= r rt3 * * 5432109876543210 - * 101100 + * 010100 1000 * rt3 --- * rs3 --- - * eu ---- */ std::string NMD::AND_16_(uint64 instruction) { @@ -2499,7 +2498,7 @@ std::string NMD::AND_16_(uint64 instruction) std::string rt3 =3D GPR(encode_gpr3(rt3_value)); std::string rs3 =3D GPR(encode_gpr3(rs3_value)); =20 - return img::format("AND %s, %s", rs3, rt3); + return img::format("AND[16] %s, %s", rs3, rt3); } =20 =20 @@ -2528,10 +2527,10 @@ std::string NMD::AND_32_(uint64 instruction) =20 =20 /* - * ANDI rt, rs, u - + * ANDI rt, rs, u - Write logical AND of register rs3 and immediate eu to = rt3 * * 5432109876543210 - * 101100 + * 111100 * rt3 --- * rs3 --- * eu ---- @@ -2546,7 +2545,7 @@ std::string NMD::ANDI_16_(uint64 instruction) std::string rs3 =3D GPR(encode_gpr3(rs3_value)); std::string eu =3D IMMEDIATE(encode_eu_from_u_andi16(eu_value)); =20 - return img::format("ANDI %s, %s, %s", rt3, rs3, eu); + return img::format("ANDI[16] %s, %s, %s", rt3, rs3, eu); } =20 =20 @@ -11426,14 +11425,12 @@ std::string NMD::NOR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * NOT[16] rt3, rs3 - Write logical inversion of register rs3 to register = rt3 * - * 3 2 1 - * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- - * rs ----- - * rd ----- + * 5432109876543210 + * 010100 0000 + * rt3 --- + * rs3 --- */ std::string NMD::NOT_16_(uint64 instruction) { @@ -11443,19 +11440,17 @@ std::string NMD::NOT_16_(uint64 instruction) std::string rt3 =3D GPR(encode_gpr3(rt3_value)); std::string rs3 =3D GPR(encode_gpr3(rs3_value)); =20 - return img::format("NOT %s, %s", rt3, rs3); + return img::format("NOT[16] %s, %s", rt3, rs3); } =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * OR[16] rs3, rt3 - Write logical OR of registers rs3 and rt3 to register= rt3 * - * 3 2 1 - * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- - * rs ----- - * rd ----- + * 5432109876543210 + * 010100 1100 + * rt3 --- + * rs3 --- */ std::string NMD::OR_16_(uint64 instruction) { @@ -11465,7 +11460,7 @@ std::string NMD::OR_16_(uint64 instruction) std::string rs3 =3D GPR(encode_gpr3(rs3_value)); std::string rt3 =3D GPR(encode_gpr3(rt3_value)); =20 - return img::format("OR %s, %s", rs3, rt3); + return img::format("OR[16] %s, %s", rs3, rt3); } =20 =20 @@ -16251,14 +16246,12 @@ std::string NMD::WRPGPR(uint64 instruction) =20 =20 /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Re= sults + * XOR[16] rs3, rt3 - Write logical XOR of registers rs3 and rt3 to regist= er rt3 * - * 3 2 1 - * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- - * rs ----- - * rd ----- + * 5432109876543210 + * 010100 0100 + * rt3 --- + * rs3 --- */ std::string NMD::XOR_16_(uint64 instruction) { @@ -16268,7 +16261,7 @@ std::string NMD::XOR_16_(uint64 instruction) std::string rs3 =3D GPR(encode_gpr3(rs3_value)); std::string rt3 =3D GPR(encode_gpr3(rt3_value)); =20 - return img::format("XOR %s, %s", rs3, rt3); + return img::format("XOR[16] %s, %s", rs3, rt3); } =20 =20 --=20 2.7.4