From nobody Tue Feb 10 23:33:30 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544644207596107.72660068794096; Wed, 12 Dec 2018 11:50:07 -0800 (PST) Received: from localhost ([::1]:47714 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXAWB-0005Wt-Gj for importer@patchew.org; Wed, 12 Dec 2018 14:50:03 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47063) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXAMU-00056n-Nw for qemu-devel@nongnu.org; Wed, 12 Dec 2018 14:40:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXAMP-0007Mr-IH for qemu-devel@nongnu.org; Wed, 12 Dec 2018 14:40:02 -0500 Received: from mx1.redhat.com ([209.132.183.28]:40890) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gXAMN-0007Jc-2I for qemu-devel@nongnu.org; Wed, 12 Dec 2018 14:39:55 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A9F883004E78; Wed, 12 Dec 2018 19:39:51 +0000 (UTC) Received: from gimli.home (ovpn-116-92.phx2.redhat.com [10.3.116.92]) by smtp.corp.redhat.com (Postfix) with ESMTP id CAE2760C44; Wed, 12 Dec 2018 19:39:43 +0000 (UTC) From: Alex Williamson To: qemu-devel@nongnu.org Date: Wed, 12 Dec 2018 12:39:43 -0700 Message-ID: <154464358344.9828.234735873419417928.stgit@gimli.home> In-Reply-To: <154464279386.9828.10219496338109023342.stgit@gimli.home> References: <154464279386.9828.10219496338109023342.stgit@gimli.home> User-Agent: StGit/0.19-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Wed, 12 Dec 2018 19:39:51 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v5 6/8] pcie: Allow generic PCIe root port to specify link speed and width X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Geoffrey McRae , Eric Auger , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Allow users to experimentally specify speed and width values for the generic PCIe root port. Defaults remain at 2.5GT/s & x1 for compatiblity with the intent to only support changing defaults via machine types for now. Note for libvirt testing that pcie-root-port controllers are given default names like "pci.7" which don't play well with using the "-set device.$name.$prop=3D$value" options accessible to us via options. The solution is to add an to the pcie-root-port , for example:
The "ua-" here is a mandatory prefix. We can then use: or, without an alias, set globals such as: Cc: Michael S. Tsirkin Cc: Marcel Apfelbaum Tested-by: Geoffrey McRae Reviewed-by: Eric Auger Signed-off-by: Alex Williamson --- hw/pci-bridge/gen_pcie_root_port.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_ro= ot_port.c index 299de429ec1e..ca5418a89dd2 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -124,6 +124,10 @@ static Property gen_rp_props[] =3D { res_reserve.mem_pref_32, -1), DEFINE_PROP_SIZE("pref64-reserve", GenPCIERootPort, res_reserve.mem_pref_64, -1), + DEFINE_PROP_PCIE_LINK_SPEED("x-speed", PCIESlot, + speed, PCIE_LINK_SPEED_2_5), + DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot, + width, PCIE_LINK_WIDTH_1), DEFINE_PROP_END_OF_LIST() }; =20