From nobody Tue Feb 10 02:28:10 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1544099565214198.28066909927156; Thu, 6 Dec 2018 04:32:45 -0800 (PST) Received: from localhost ([::1]:40489 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gUspf-0003sx-PD for importer@patchew.org; Thu, 06 Dec 2018 07:32:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41907) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gUsL9-0000bb-M1 for qemu-devel@nongnu.org; Thu, 06 Dec 2018 07:01:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gUsL5-0005kf-7V for qemu-devel@nongnu.org; Thu, 06 Dec 2018 07:01:11 -0500 Received: from mail.ispras.ru ([83.149.199.45]:60274) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gUsL3-0005jc-1Z for qemu-devel@nongnu.org; Thu, 06 Dec 2018 07:01:07 -0500 Received: from Misha-PC.lan02.inno (unknown [85.142.117.226]) by mail.ispras.ru (Postfix) with ESMTPSA id 5ED6A540082; Thu, 6 Dec 2018 15:01:03 +0300 (MSK) From: Mikhail Abakumov To: qemu-devel@nongnu.org Date: Thu, 06 Dec 2018 15:00:58 +0300 Message-ID: <154409765859.5432.12915507765102369275.stgit@Misha-PC.lan02.inno> In-Reply-To: <154409751316.5432.3325938832238028060.stgit@Misha-PC.lan02.inno> References: <154409751316.5432.3325938832238028060.stgit@Misha-PC.lan02.inno> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 83.149.199.45 Subject: [Qemu-devel] [PATCH v3 25/39] windbg: [de]serialization cpu spec registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, lprosek@redhat.com, dovgaluk@ispras.ru, rkagan@virtuozzo.com, pbonzini@redhat.com, den@openvz.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Mikhail Abakumov Signed-off-by: Pavel Dovgalyuk --- target/i386/windbgstub.c | 123 ++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 123 insertions(+) diff --git a/target/i386/windbgstub.c b/target/i386/windbgstub.c index 7a091e1dee..a1d27b8aca 100644 --- a/target/i386/windbgstub.c +++ b/target/i386/windbgstub.c @@ -767,12 +767,135 @@ static int fun_name(CPUState *cs, uint8_t *buf, int = buf_size, \ return 0; = \ } =20 +#define GEN_WINDBG_KSPEC_REGS_RW(fun_name, is_read) = \ +static int fun_name(CPUState *cs, uint8_t *buf, int buf_size, = \ + int offset, int len) = \ +{ = \ + X86CPU *cpu =3D X86_CPU(cs); = \ + CPUX86State *env =3D &cpu->env; = \ + uint32_t f_size =3D 0; = \ + = \ + if (len < 0 || len > buf_size) { = \ + WINDBG_ERROR("" #fun_name ": incorrect length %d", len); = \ + return 1; = \ + } = \ + = \ + if (offset < 0 || offset + len > sizeof(CPU_KSPECIAL_REGISTERS)) { = \ + WINDBG_ERROR("" #fun_name ": incorrect offset %d", f_size); = \ + return 2; = \ + } = \ + = \ + len =3D MIN(len, sizeof(CPU_KSPECIAL_REGISTERS) - offset); = \ + = \ + while (offset < len) { = \ + switch (offset) { = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Cr0, f_size, { = \ + RW_CR(buf, cs, 0, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Cr2, f_size, { = \ + if (is_read) { = \ + env->cr[2] =3D (int32_t) ldtul_p(buf); = \ + } else { = \ + sttul_p(buf, (target_ulong) env->cr[2]); = \ + } = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Cr3, f_size, { = \ + RW_CR(buf, cs, 3, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Cr4, f_size, { = \ + RW_CR(buf, cs, 4, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr0, f_size, { = \ + RW_DR(buf, cs, 0, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr1, f_size, { = \ + RW_DR(buf, cs, 1, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr2, f_size, { = \ + RW_DR(buf, cs, 2, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr3, f_size, { = \ + RW_DR(buf, cs, 3, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr6, f_size, { = \ + RW_DR(buf, cs, 6, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, KernelDr7, f_size, { = \ + RW_DR(buf, cs, 7, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Gdtr.Pad, f_size, {}); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Gdtr.Limit, f_size, { = \ + rwuw_p(buf, env->gdt.limit, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Gdtr.Base, f_size, { = \ + rwtul_p(buf, env->gdt.base, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Idtr.Pad, f_size, {}); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Idtr.Limit, f_size, { = \ + rwuw_p(buf, env->idt.limit, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Idtr.Base, f_size, { = \ + rwtul_p(buf, env->idt.base, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Tr, f_size, { = \ + rwuw_p(buf, env->tr.selector, is_read); = \ + }); = \ + CASE_FIELD(CPU_KSPECIAL_REGISTERS, Ldtr, f_size, { = \ + rwuw_p(buf, env->tr.selector, is_read); = \ + }); = \ + CASE_FIELD_X32(CPU_KSPECIAL_REGISTERS, Reserved, f_size, {}); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MxCsr, f_size, { = \ + rwl_p(buf, env->mxcsr, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, DebugControl, f_size, {}); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, LastBranchToRip, f_size, {}= ); \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, LastBranchFromRip, f_size, = {}); \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, LastExceptionToRip, f_size,= {});\ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, LastExceptionFromRip, f_siz= e, { \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, Cr8, f_size, {}); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrGsBase, f_size, { = \ + rwtul_p(buf, env->segs[R_GS].base, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrGsSwap, f_size, { = \ + rwtul_p(buf, env->kernelgsbase, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrStar, f_size, { = \ + rwtul_p(buf, env->star, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrLStar, f_size, { = \ + rwtul_p(buf, env->lstar, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrCStar, f_size, { = \ + rwtul_p(buf, env->cstar, is_read); = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, MsrSyscallMask, f_size, { = \ + /* NOTE: Unimplemented in qemu: msr MSR_SFMASK */ = \ + }); = \ + CASE_FIELD_X64(CPU_KSPECIAL_REGISTERS, Xcr0, f_size, { = \ + rwtul_p(buf, env->xcr0, is_read); = \ + }); = \ + default: = \ + f_size =3D 1; = \ + } = \ + offset +=3D f_size; = \ + buf +=3D f_size; = \ + } = \ + return 0; = \ +} + __attribute__ ((unused)) /* unused yet */ GEN_WINDBG_CONTEXT_RW(windbg_read_context, false) =20 __attribute__ ((unused)) /* unused yet */ GEN_WINDBG_CONTEXT_RW(windbg_write_context, true) =20 +__attribute__ ((unused)) /* unused yet */ +GEN_WINDBG_KSPEC_REGS_RW(windbg_read_ks_regs, false) + +__attribute__ ((unused)) /* unused yet */ +GEN_WINDBG_KSPEC_REGS_RW(windbg_write_ks_regs, true) + static bool find_KPCR(CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs);