From nobody Sat May 4 02:49:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1543353682085202.32015719739252; Tue, 27 Nov 2018 13:21:22 -0800 (PST) Received: from localhost ([::1]:44552 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRknI-000083-FL for importer@patchew.org; Tue, 27 Nov 2018 16:21:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRkZy-0003PV-Qs for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gRkZv-0003mT-KB for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:34 -0500 Received: from userp2120.oracle.com ([156.151.31.85]:44366) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gRkZv-0003mD-B8 for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:31 -0500 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id wARL4vao106324; Tue, 27 Nov 2018 21:07:29 GMT Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by userp2120.oracle.com with ESMTP id 2nxy9r6j2d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 27 Nov 2018 21:07:29 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id wARL7NHe026543 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 27 Nov 2018 21:07:24 GMT Received: from abhmp0010.oracle.com (abhmp0010.oracle.com [141.146.116.16]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id wARL7N47001595; Tue, 27 Nov 2018 21:07:23 GMT Received: from ca-ldom147.us.oracle.com (/10.129.68.131) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 27 Nov 2018 13:07:23 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2018-07-02; bh=5I3XniefVdKC2y82KZIp1x0gB20SL87FYhR7mm8W+uk=; b=o37EXu77SlBfFr5zyMFpkM7I7ETOUZ33ukJadJTyWIJ9YBd/+1ToxdUzfvm5QeqGep/d MrYq+6zcRX2STElZMZAxQRv60Hc1al8/QS6B/n+TfbxIfjkCDEiUMVUphzJ6NgALQayW knv+gLN491+xF+we31lKDmQzuEnHHsrh05P6rssd/27wonmRtbBgdp+20RfWo36ucvuv NhiA4QVseR7T90AT3+dKlyy1eYw9ac8RT2cqOiBmnfD7zhD+M6DLO6jGVdp4x8Eoj0d2 MlUjXVGzklKHQoG5WWAgWIlQxoOR1qUNzfHBJ3tE/njCzRHYFTmvIhi/VzB9n31+Pr4m ZA== From: Bijan Mottahedeh To: qemu-devel@nongnu.org Date: Tue, 27 Nov 2018 13:07:16 -0800 Message-Id: <1543352837-21529-2-git-send-email-bijan.mottahedeh@oracle.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1543352837-21529-1-git-send-email-bijan.mottahedeh@oracle.com> References: <1543352837-21529-1-git-send-email-bijan.mottahedeh@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9090 signatures=668685 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1811270178 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 156.151.31.85 Subject: [Qemu-devel] [RFC QEMU v2 1/2] arm/virt: Initialize generic timer scale factor dynamically X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Initialize the generic timer scale factor based on the counter frequency register cntfrq_el0, and default to the current static value if necessary. Always use the default value for TCG. Signed-off-by: Bijan Mottahedeh --- hw/arm/virt.c | 17 +++++++++++++++++ target/arm/helper.c | 19 ++++++++++++++++--- target/arm/internals.h | 8 ++++++-- target/arm/kvm64.c | 1 + 4 files changed, 40 insertions(+), 5 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 281ddcd..792d223 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -59,6 +59,7 @@ #include "qapi/visitor.h" #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" +#include "target/arm/internals.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -1710,6 +1711,21 @@ static HotplugHandler *virt_machine_get_hotplug_hand= ler(MachineState *machine, return NULL; } =20 +static void set_system_clock_scale(void) +{ + unsigned long cntfrq_el0 =3D 0; + +#ifdef CONFIG_KVM + asm volatile("mrs %0, cntfrq_el0" : "=3Dr"(cntfrq_el0)); +#endif + + if (cntfrq_el0 =3D=3D 0) { + cntfrq_el0 =3D GTIMER_SCALE_DEF; + } + + system_clock_scale =3D NANOSECONDS_PER_SECOND / (int)cntfrq_el0; +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1736,6 +1752,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) assert(!mc->get_hotplug_handler); mc->get_hotplug_handler =3D virt_machine_get_hotplug_handler; hc->plug =3D virt_machine_device_plug_cb; + set_system_clock_scale(); } =20 static const TypeInfo virt_machine_info =3D { diff --git a/target/arm/helper.c b/target/arm/helper.c index 66afb08..6330586 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -18,6 +18,7 @@ #include "sysemu/kvm.h" #include "fpu/softfloat.h" #include "qemu/range.h" +#include "hw/arm/arm.h" =20 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ =20 @@ -1614,6 +1615,18 @@ static CPAccessResult gt_cntfrq_access(CPUARMState *= env, const ARMCPRegInfo *ri, return CP_ACCESS_OK; } =20 +static void gt_cntfrq_reset(CPUARMState *env, const ARMCPRegInfo *ri) +{ + assert(GTIMER_SCALE); + assert(ri->fieldoffset); + + if (cpreg_field_is_64bit(ri)) { + CPREG_FIELD64(env, ri) =3D NANOSECONDS_PER_SECOND / GTIMER_SCALE; + } else { + CPREG_FIELD32(env, ri) =3D NANOSECONDS_PER_SECOND / GTIMER_SCALE; + } +} + static CPAccessResult gt_counter_access(CPUARMState *env, int timeridx, bool isread) { @@ -1709,7 +1722,7 @@ static CPAccessResult gt_stimer_access(CPUARMState *e= nv, } } =20 -static uint64_t gt_get_countervalue(CPUARMState *env) +uint64_t gt_get_countervalue(CPUARMState *env) { return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / GTIMER_SCALE; } @@ -1996,7 +2009,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = =3D { .opc0 =3D 3, .opc1 =3D 3, .crn =3D 14, .crm =3D 0, .opc2 =3D 0, .access =3D PL1_RW | PL0_R, .accessfn =3D gt_cntfrq_access, .fieldoffset =3D offsetof(CPUARMState, cp15.c14_cntfrq), - .resetvalue =3D (1000 * 1000 * 1000) / GTIMER_SCALE, + .resetfn =3D gt_cntfrq_reset, }, /* overall control: mostly access permissions */ { .name =3D "CNTKCTL", .state =3D ARM_CP_STATE_BOTH, @@ -2187,7 +2200,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = =3D { .opc0 =3D 3, .opc1 =3D 3, .crn =3D 14, .crm =3D 0, .opc2 =3D 0, .type =3D ARM_CP_CONST, .access =3D PL0_R /* no PL1_RW in linux-user= */, .fieldoffset =3D offsetof(CPUARMState, cp15.c14_cntfrq), - .resetvalue =3D NANOSECONDS_PER_SECOND / GTIMER_SCALE, + .resetfn =3D gt_cntfrq_reset, }, { .name =3D "CNTVCT_EL0", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 3, .crn =3D 14, .crm =3D 0, .opc2 =3D 2, diff --git a/target/arm/internals.h b/target/arm/internals.h index dc93577..b66a1fa 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -52,9 +52,13 @@ static inline bool excp_is_internal(int excp) } =20 /* Scale factor for generic timers, ie number of ns per tick. - * This gives a 62.5MHz timer. + * Calculated dynamically based on CNTFRQ with a default value + * that gives a 62.5MHZ timer. */ -#define GTIMER_SCALE 16 +#define GTIMER_SCALE system_clock_scale +#define GTIMER_SCALE_DEF 16 + +uint64_t gt_get_countervalue(CPUARMState *); =20 /* Bit definitions for the v7M CONTROL register */ FIELD(V7M_CONTROL, NPRIV, 0, 1) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index e0b8246..5d1c394 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -485,6 +485,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *= ahcf) set_feature(&features, ARM_FEATURE_NEON); set_feature(&features, ARM_FEATURE_AARCH64); set_feature(&features, ARM_FEATURE_PMU); + set_feature(&features, ARM_FEATURE_GENERIC_TIMER); =20 ahcf->features =3D features; =20 --=20 1.8.3.1 From nobody Sat May 4 02:49:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=oracle.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1543352986698671.5770932991852; Tue, 27 Nov 2018 13:09:46 -0800 (PST) Received: from localhost ([::1]:44472 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRkc5-0005hy-BY for importer@patchew.org; Tue, 27 Nov 2018 16:09:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gRkZw-0003NW-Km for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gRkZt-0003lb-Dl for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:32 -0500 Received: from aserp2120.oracle.com ([141.146.126.78]:44894) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gRkZt-0003ki-53 for qemu-devel@nongnu.org; Tue, 27 Nov 2018 16:07:29 -0500 Received: from pps.filterd (aserp2120.oracle.com [127.0.0.1]) by aserp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id wARL4UXa109812; Tue, 27 Nov 2018 21:07:25 GMT Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by aserp2120.oracle.com with ESMTP id 2nxxkqej34-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 27 Nov 2018 21:07:24 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id wARL7O3r026561 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 27 Nov 2018 21:07:24 GMT Received: from abhmp0010.oracle.com (abhmp0010.oracle.com [141.146.116.16]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id wARL7NFL010376; Tue, 27 Nov 2018 21:07:23 GMT Received: from ca-ldom147.us.oracle.com (/10.129.68.131) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 27 Nov 2018 13:07:23 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=corp-2018-07-02; bh=AGllmjqZqXGUbdVGVbK5KuCq0H/zp4Pl2RDWjkLhJLg=; b=sYGOOcVXsjJUlB8fmKB3HLVP631mfXchLtgCg7GzkfMDnNHtLhjBMKlvMhv4wPzi3p0B rIbNXBQsWqfxeCJXUcTbGWdXsAolv7yBtjAfQidq+ezND3ZPnvj0wdKoV1yJQAKkpjcN lpRJGegY170y3SLKEaCtBv/BfICWJ6bzZ1pF44MJ2MyT8qR2HR3yED5zx+7rM5pYDLMM 0vKM6AJVxooFMW+HeuX3WE82McEd3g+OGrrlv/SlzH5/vgyTIWGnjAsa5G0d2q4vrNa8 EeUjwSXumVNaV3cZkevamI2eYQqRQiaMbaxKal+iKmky6oxgrEmNPh/8TPDOE5opuj0y UA== From: Bijan Mottahedeh To: qemu-devel@nongnu.org Date: Tue, 27 Nov 2018 13:07:17 -0800 Message-Id: <1543352837-21529-3-git-send-email-bijan.mottahedeh@oracle.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1543352837-21529-1-git-send-email-bijan.mottahedeh@oracle.com> References: <1543352837-21529-1-git-send-email-bijan.mottahedeh@oracle.com> X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9090 signatures=668685 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=610 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1811270178 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 141.146.126.78 Subject: [Qemu-devel] [RFC QEMU v2 2/2] arm/virt: Account for guest pause time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Accumulate the total guest pause time and update the virtual counter offset register accordingly in order to account for that time before resuming the guest. Signed-off-by: Bijan Mottahedeh --- hw/intc/arm_gicv3_kvm.c | 39 +++++++++++++++++++++++++++++++++++++++ target/arm/cpu.h | 3 +++ 2 files changed, 42 insertions(+) diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 1e11200..aabd508 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -30,6 +30,7 @@ #include "gicv3_internal.h" #include "vgic_common.h" #include "migration/blocker.h" +#include "target/arm/internals.h" =20 #ifdef DEBUG_GICV3_KVM #define DPRINTF(fmt, ...) \ @@ -745,9 +746,38 @@ static void vm_change_state_handler(void *opaque, int = running, { GICv3State *s =3D (GICv3State *)opaque; Error *err =3D NULL; + CPUState *cpu; + CPUARMState *env; + struct kvm_one_reg reg; int ret; + uint64_t cnt; =20 if (running) { + CPU_FOREACH(cpu) { + + env =3D (CPUARMState *)(cpu->env_ptr); + + if (!env->pause_start) { + continue; + } + + /* + * Accumulate the total pause time and set the + * counter virtual offset accordingly. + */ + cnt =3D gt_get_countervalue(env); + env->pause_total +=3D (cnt - env->pause_start); + env->cp15.cntvoff_el2 =3D cnt - env->pause_total; + + env->pause_start =3D 0; /* clear for next pause */ + reg.id =3D KVM_REG_ARM_TIMER_CNT; + reg.addr =3D (uintptr_t) &env->cp15.cntvoff_el2; + ret =3D kvm_vcpu_ioctl(cpu, KVM_SET_ONE_REG, ®); + if (ret) { + error_report("Set virtual counter offset failed: %d", ret); + abort(); + } + } return; } =20 @@ -760,6 +790,15 @@ static void vm_change_state_handler(void *opaque, int = running, if (ret < 0 && ret !=3D -EFAULT) { abort(); } + + CPU_FOREACH(cpu) { + /* + * Record the current pause start time. + */ + env =3D (CPUARMState *)(cpu->env_ptr); + cnt =3D gt_get_countervalue(env); + env->pause_start =3D cnt; + } } =20 =20 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e310ffc..bd0a56e 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -602,6 +602,9 @@ typedef struct CPUARMState { struct CPUBreakpoint *cpu_breakpoint[16]; struct CPUWatchpoint *cpu_watchpoint[16]; =20 + uint64_t pause_start; /* start time of last pause */ + uint64_t pause_total; /* total pause time */ + /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; =20 --=20 1.8.3.1