From nobody Mon Feb 9 04:08:47 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1542202886160132.745915189137; Wed, 14 Nov 2018 05:41:26 -0800 (PST) Received: from localhost ([::1]:60391 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMvQ4-0002JG-RR for importer@patchew.org; Wed, 14 Nov 2018 08:41:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50220) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gMvMh-000820-EH for qemu-devel@nongnu.org; Wed, 14 Nov 2018 08:37:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gMvMd-0007xb-Or for qemu-devel@nongnu.org; Wed, 14 Nov 2018 08:37:55 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:45359 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gMvMd-0006uR-4D for qemu-devel@nongnu.org; Wed, 14 Nov 2018 08:37:51 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 6D3DE1A45D9; Wed, 14 Nov 2018 14:36:46 +0100 (CET) Received: from smarkovic.mipstec.com (smarkovic.domain.local [10.10.13.57]) by mail.rt-rk.com (Postfix) with ESMTPSA id 31ECA1A2444; Wed, 14 Nov 2018 14:36:46 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Markovic To: qemu-devel@nongnu.org Date: Wed, 14 Nov 2018 14:37:08 +0100 Message-Id: <1542202628-6538-1-git-send-email-stefan.markovic@rt-rk.com> X-Mailer: git-send-email 1.9.1 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH] linux-user: Update MIPS specific prctl() implementation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Perform needed checks before actual prctl() PR_SET_FP_MODE and PR_GET_FP_MODE work based on kernel implementation. Also, update necessary hflags. Signed-off-by: Stefan Markovic Reviewed-by: Laurent Vivier --- linux-user/syscall.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 810a58b..10db8b7 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9544,9 +9544,25 @@ static abi_long do_syscall1(void *cpu_env, int num, = abi_long arg1, { CPUMIPSState *env =3D ((CPUMIPSState *)cpu_env); bool old_fr =3D env->CP0_Status & (1 << CP0St_FR); + bool old_fre =3D env->CP0_Config5 & (1 << CP0C5_FRE); bool new_fr =3D arg2 & TARGET_PR_FP_MODE_FR; bool new_fre =3D arg2 & TARGET_PR_FP_MODE_FRE; =20 + const unsigned int known_bits =3D TARGET_PR_FP_MODE_FR | + TARGET_PR_FP_MODE_FRE; + + /* If nothing to change, return right away, successfully. */ + if (old_fr =3D=3D new_fr && old_fre =3D=3D new_fre) { + return 0; + } + /* Check the value is valid */ + if (arg2 & ~known_bits) { + return -TARGET_EOPNOTSUPP; + } + /* Setting FRE without FR is not supported. */ + if (new_fre && !new_fr) { + return -TARGET_EOPNOTSUPP; + } if (new_fr && !(env->active_fpu.fcr0 & (1 << FCR0_F64))) { /* FR1 is not supported */ return -TARGET_EOPNOTSUPP; @@ -9576,6 +9592,7 @@ static abi_long do_syscall1(void *cpu_env, int num, a= bi_long arg1, env->hflags |=3D MIPS_HFLAG_F64; } else { env->CP0_Status &=3D ~(1 << CP0St_FR); + env->hflags &=3D ~MIPS_HFLAG_F64; } if (new_fre) { env->CP0_Config5 |=3D (1 << CP0C5_FRE); @@ -9584,6 +9601,7 @@ static abi_long do_syscall1(void *cpu_env, int num, a= bi_long arg1, } } else { env->CP0_Config5 &=3D ~(1 << CP0C5_FRE); + env->hflags &=3D ~MIPS_HFLAG_FRE; } =20 return 0; --=20 1.9.1