From nobody Thu Nov 6 12:34:39 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540900326208758.5111799159363; Tue, 30 Oct 2018 04:52:06 -0700 (PDT) Received: from localhost ([::1]:52442 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHSZ2-0003FI-Vr for importer@patchew.org; Tue, 30 Oct 2018 07:52:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34208) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHSLX-0006VS-Hv for qemu-devel@nongnu.org; Tue, 30 Oct 2018 07:38:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHSLV-0007kz-9p for qemu-devel@nongnu.org; Tue, 30 Oct 2018 07:38:07 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:43700 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gHSLU-0006gI-RR for qemu-devel@nongnu.org; Tue, 30 Oct 2018 07:38:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id C90911A1D59; Tue, 30 Oct 2018 12:37:02 +0100 (CET) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 921C11A1D93; Tue, 30 Oct 2018 12:37:02 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Tue, 30 Oct 2018 12:36:50 +0100 Message-Id: <1540899411-16761-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540899411-16761-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540899411-16761-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 4/5] target/mips: Misc R5900-related cosmetic changes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, pjovanovic@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Misc changes in comments and strings for R5900. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 14 +++++++------- target/mips/translate_init.inc.c | 12 ------------ 2 files changed, 7 insertions(+), 19 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 155331f..259ad2b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2096,8 +2096,8 @@ enum { * MTSAH rs, immediate Move Halfword Count to Shift Amount Register * PROT3W rd, rt Parallel Rotate 3 Words * - * The TX79-specific Multimedia Instruction encodings - * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D + * Multimedia Instructions (MMI) encodings + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D * * MMI Instruction encoding table keys: * @@ -24714,7 +24714,7 @@ static void decode_mmi0(CPUMIPSState *env, DisasCon= text *ctx) generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI0 = */ break; default: - MIPS_INVAL("TX79 MMI class MMI0"); + MIPS_INVAL("MMI class MMI0"); generate_exception_end(ctx, EXCP_RI); break; } @@ -24746,7 +24746,7 @@ static void decode_mmi1(CPUMIPSState *env, DisasCon= text *ctx) generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI1 = */ break; default: - MIPS_INVAL("TX79 MMI class MMI1"); + MIPS_INVAL("MMI class MMI1"); generate_exception_end(ctx, EXCP_RI); break; } @@ -24782,7 +24782,7 @@ static void decode_mmi2(CPUMIPSState *env, DisasCon= text *ctx) generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI2 = */ break; default: - MIPS_INVAL("TX79 MMI class MMI2"); + MIPS_INVAL("MMI class MMI2"); generate_exception_end(ctx, EXCP_RI); break; } @@ -24809,7 +24809,7 @@ static void decode_mmi3(CPUMIPSState *env, DisasCon= text *ctx) generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_CLASS_MMI3 = */ break; default: - MIPS_INVAL("TX79 MMI class MMI3"); + MIPS_INVAL("MMI class MMI3"); generate_exception_end(ctx, EXCP_RI); break; } @@ -24867,7 +24867,7 @@ static void decode_mmi(CPUMIPSState *env, DisasCont= ext *ctx) generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_CLASS_MMI */ break; default: - MIPS_INVAL("TX79 MMI class"); + MIPS_INVAL("MMI class"); generate_exception_end(ctx, EXCP_RI); break; } diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.= inc.c index 85da4a2..cab2003 100644 --- a/target/mips/translate_init.inc.c +++ b/target/mips/translate_init.inc.c @@ -411,18 +411,6 @@ const mips_def_t mips_defs[] =3D .mmu_type =3D MMU_TYPE_R4000, }, { - /* - * The Toshiba TX System RISC TX79 Core Architecture manual - * - * https://wiki.qemu.org/File:C790.pdf - * - * describes the C790 processor that is a follow-up to the R5900. - * There are a few notable differences in that the R5900 FPU - * - * - is not IEEE 754-1985 compliant, - * - does not implement double format, and - * - its machine code is nonstandard. - */ .name =3D "R5900", .CP0_PRid =3D 0x00002E00, /* No L2 cache, icache size 32k, dcache size 32k, uncached coheren= cy. */ --=20 2.7.4