From nobody Thu Nov 6 10:30:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389406988867.3411582475428; Wed, 24 Oct 2018 06:56:46 -0700 (PDT) Received: from localhost ([::1]:48598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJeP-0002cH-TI for importer@patchew.org; Wed, 24 Oct 2018 09:56:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQL-0004tL-ML for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001ri-B4 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49890 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001mK-0W for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 4C47E1A4566; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 2C6C51A456F; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:22 +0200 Message-Id: <1540388447-27062-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 08/33] target/mips: Define R5900 MMI3 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index bd51443..3c6a2c9 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2323,6 +2323,45 @@ enum { TX79_MMI2_PROT3W =3D (0x1F << 6) | TX79_MMI_CLASS_MMI2, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI3: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI3 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 |PMADDUW| * | * | PSRAVW + * 1 001 | * | * | * | * + * 2 010 | PMTHI | PMTLO | PINTEH| * + * 3 011 |PMULTUW| PDIVUW| PCPYUD| * + * 4 100 | * | * | POR | PNOR + * 5 101 | * | * | * | * + * 6 110 | * | * | PEXCH | PCPYH + * 7 111 | * | * | PEXCW | * + */ + +#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI3_PMADDUW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PSRAVW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTHI =3D (0x08 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTLO =3D (0x09 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PINTEH =3D (0x0A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMULTUW =3D (0x0C << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PDIVUW =3D (0x0D << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYUD =3D (0x0E << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_POR =3D (0x12 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PNOR =3D (0x13 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCH =3D (0x1A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYH =3D (0x1B << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCW =3D (0x1E << 6) | TX79_MMI_CLASS_MMI3, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4