From nobody Thu Nov 6 10:31:26 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389235276406.7890364941386; Wed, 24 Oct 2018 06:53:55 -0700 (PDT) Received: from localhost ([::1]:48579 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJbY-0000BA-AS for importer@patchew.org; Wed, 24 Oct 2018 09:53:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058i-3d for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zQ-RD for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49949 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001rS-FJ for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id B5CA81A4583; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 953781A457A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:31 +0200 Message-Id: <1540388447-27062-18-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 17/33] target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add support for MULT1 and MULTU1 instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3dc6d80..6d89002 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4771,7 +4771,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t op= c, * Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core * architectures are special three-operand variants with the syntax * - * MULT[U] rd, rs, rt + * MULT[U][1] rd, rs, rt * * such that * @@ -4795,6 +4795,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t = opc, gen_load_gpr(t1, rt); =20 switch (opc) { + case TX79_MMI_MULT1: + acc =3D 1; + /* Fall through */ case OPC_MULT: { TCGv_i32 t2 =3D tcg_temp_new_i32(); @@ -4811,6 +4814,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t = opc, tcg_temp_free_i32(t3); } break; + case TX79_MMI_MULTU1: + acc =3D 1; + /* Fall through */ case OPC_MULTU: { TCGv_i32 t2 =3D tcg_temp_new_i32(); @@ -24631,6 +24637,9 @@ static void decode_tx79_mmi3(CPUMIPSState *env, Dis= asContext *ctx) static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); + int rs =3D extract32(ctx->opcode, 21, 5); + int rt =3D extract32(ctx->opcode, 16, 5); + int rd =3D extract32(ctx->opcode, 11, 5); =20 switch (opc) { case TX79_MMI_CLASS_MMI0: @@ -24645,6 +24654,10 @@ static void decode_tx79_mmi(CPUMIPSState *env, Dis= asContext *ctx) case TX79_MMI_CLASS_MMI3: decode_tx79_mmi3(env, ctx); break; + case TX79_MMI_MULT1: + case TX79_MMI_MULTU1: + gen_mul_txx9(ctx, opc, rd, rs, rt); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ @@ -24652,8 +24665,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ case TX79_MMI_MTLO1: /* TODO: TX79_MMI_MTLO1 */ - case TX79_MMI_MULT1: /* TODO: TX79_MMI_MULT1 */ - case TX79_MMI_MULTU1: /* TODO: TX79_MMI_MULTU1 */ case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ --=20 2.7.4