From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540388661155741.0681188166186; Wed, 24 Oct 2018 06:44:21 -0700 (PDT) Received: from localhost ([::1]:48530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJSL-0006GR-Nu for importer@patchew.org; Wed, 24 Oct 2018 09:44:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59848) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQI-0004rt-CX for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQE-0001lf-6l for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:09 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:48976 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQC-0001GX-7b for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id E73F61A456E; Wed, 24 Oct 2018 15:40:53 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id CB3511A454A; Wed, 24 Oct 2018 15:40:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:15 +0200 Message-Id: <1540388447-27062-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 01/33] target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring The R5900 implements the 64-bit MIPS III instruction set except DMULT, DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN, MOVZ and PREF are implemented. It has the R5900-specific three-operand instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions MULT1, MULTU1, DIV1, DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1. A set of 93 128-bit multimedia instructions specific to the R5900 is also implemented. The Toshiba TX System RISC TX79 Core Architecture manual: https://wiki.qemu.org/File:C790.pdf describes the C790 processor that is a follow-up to the R5900. There are a few notable differences in that the R5900 FPU - is not IEEE 754-1985 compliant, - does not implement double format, and - its machine code is nonstandard. Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/mips-defs.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 71ea4ef..5177618 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -64,9 +64,11 @@ #define INSN_LOONGSON2E 0x0001000000000000ULL #define INSN_LOONGSON2F 0x0002000000000000ULL #define INSN_VR54XX 0x0004000000000000ULL +#define INSN_R5900 0x0008000000000000ULL /* * bits 56-63: vendor-specific ASEs */ +#define ASE_MMI 0x0100000000000000ULL =20 /* MIPS CPU defines. */ #define CPU_MIPS1 (ISA_MIPS1) @@ -74,6 +76,7 @@ #define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3) #define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4) #define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX) +#define CPU_R5900 (CPU_MIPS3 | INSN_R5900) #define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E) #define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F) =20 --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 154038886062667.15211307850745; Wed, 24 Oct 2018 06:47:40 -0700 (PDT) Received: from localhost ([::1]:48549 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJVX-0001yu-35 for importer@patchew.org; Wed, 24 Oct 2018 09:47:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59851) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQI-0004rv-Cg for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQE-0001lK-17 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:09 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:48980 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQC-0001GZ-7a for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 026411A4543; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id D34AC1A455A; Wed, 24 Oct 2018 15:40:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:16 +0200 Message-Id: <1540388447-27062-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 02/33] target/mips: Add R5900 Multimedia Instruction overview note X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a comment on R5900 MMI ASE (short overview). Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 161 ++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 161 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3a0bdd5..32d1d2d 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1927,6 +1927,167 @@ enum { OPC_MXU_Q8MACSU =3D 0x01, }; =20 +/* + * Overview of the TX79-specific instruction set + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + * + * The R5900 and the C790 have 128-bit wide GPRs, where the upper 64 bits + * are only used by the specific quadword (128-bit) LQ/SQ load/store + * instructions and certain multimedia instructions (MMIs). These MMIs + * configure the 128-bit data path as two 64-bit, four 32-bit, eight 16-bit + * or sixteen 8-bit paths. + * + * Reference: + * + * The Toshiba TX System RISC TX79 Core Architecture manual, + * https://wiki.qemu.org/File:C790.pdf + * + * Three-Operand Multiply and Multiply-Add (4 instructions) + * -------------------------------------------------------- + * MADD [rd,] rs, rt Multiply/Add + * MADDU [rd,] rs, rt Multiply/Add Unsigned + * MULT [rd,] rs, rt Multiply (3-operand) + * MULTU [rd,] rs, rt Multiply Unsigned (3-operand) + * + * Multiply Instructions for Pipeline 1 (10 instructions) + * ------------------------------------------------------ + * MULT1 [rd,] rs, rt Multiply Pipeline 1 + * MULTU1 [rd,] rs, rt Multiply Unsigned Pipeline 1 + * DIV1 rs, rt Divide Pipeline 1 + * DIVU1 rs, rt Divide Unsigned Pipeline 1 + * MADD1 [rd,] rs, rt Multiply-Add Pipeline 1 + * MADDU1 [rd,] rs, rt Multiply-Add Unsigned Pipeline 1 + * MFHI1 rd Move From HI1 Register + * MFLO1 rd Move From LO1 Register + * MTHI1 rs Move To HI1 Register + * MTLO1 rs Move To LO1 Register + * + * Arithmetic (19 instructions) + * ---------------------------- + * PADDB rd, rs, rt Parallel Add Byte + * PSUBB rd, rs, rt Parallel Subtract Byte + * PADDH rd, rs, rt Parallel Add Halfword + * PSUBH rd, rs, rt Parallel Subtract Halfword + * PADDW rd, rs, rt Parallel Add Word + * PSUBW rd, rs, rt Parallel Subtract Word + * PADSBH rd, rs, rt Parallel Add/Subtract Halfword + * PADDSB rd, rs, rt Parallel Add with Signed Saturation Byte + * PSUBSB rd, rs, rt Parallel Subtract with Signed Saturation Byte + * PADDSH rd, rs, rt Parallel Add with Signed Saturation Halfword + * PSUBSH rd, rs, rt Parallel Subtract with Signed Saturation Half= word + * PADDSW rd, rs, rt Parallel Add with Signed Saturation Word + * PSUBSW rd, rs, rt Parallel Subtract with Signed Saturation Word + * PADDUB rd, rs, rt Parallel Add with Unsigned saturation Byte + * PSUBUB rd, rs, rt Parallel Subtract with Unsigned saturation By= te + * PADDUH rd, rs, rt Parallel Add with Unsigned saturation Halfword + * PSUBUH rd, rs, rt Parallel Subtract with Unsigned saturation Ha= lfword + * PADDUW rd, rs, rt Parallel Add with Unsigned saturation Word + * PSUBUW rd, rs, rt Parallel Subtract with Unsigned saturation Wo= rd + * + * Min/Max (4 instructions) + * ------------------------ + * PMAXH rd, rs, rt Parallel Maximum Halfword + * PMINH rd, rs, rt Parallel Minimum Halfword + * PMAXW rd, rs, rt Parallel Maximum Word + * PMINW rd, rs, rt Parallel Minimum Word + * + * Absolute (2 instructions) + * ------------------------- + * PABSH rd, rt Parallel Absolute Halfword + * PABSW rd, rt Parallel Absolute Word + * + * Logical (4 instructions) + * ------------------------ + * PAND rd, rs, rt Parallel AND + * POR rd, rs, rt Parallel OR + * PXOR rd, rs, rt Parallel XOR + * PNOR rd, rs, rt Parallel NOR + * + * Shift (9 instructions) + * ---------------------- + * PSLLH rd, rt, sa Parallel Shift Left Logical Halfword + * PSRLH rd, rt, sa Parallel Shift Right Logical Halfword + * PSRAH rd, rt, sa Parallel Shift Right Arithmetic Halfword + * PSLLW rd, rt, sa Parallel Shift Left Logical Word + * PSRLW rd, rt, sa Parallel Shift Right Logical Word + * PSRAW rd, rt, sa Parallel Shift Right Arithmetic Word + * PSLLVW rd, rt, rs Parallel Shift Left Logical Variable Word + * PSRLVW rd, rt, rs Parallel Shift Right Logical Variable Word + * PSRAVW rd, rt, rs Parallel Shift Right Arithmetic Variable Word + * + * Compare (6 instructions) + * ------------------------ + * PCGTB rd, rs, rt Parallel Compare for Greater Than Byte + * PCEQB rd, rs, rt Parallel Compare for Equal Byte + * PCGTH rd, rs, rt Parallel Compare for Greater Than Halfword + * PCEQH rd, rs, rt Parallel Compare for Equal Halfword + * PCGTW rd, rs, rt Parallel Compare for Greater Than Word + * PCEQW rd, rs, rt Parallel Compare for Equal Word + * + * LZC (1 instruction) + * ------------------- + * PLZCW rd, rs Parallel Leading Zero or One Count Word + * + * Quadword Load and Store (2 instructions) + * ---------------------------------------- + * LQ rt, offset(base) Load Quadword + * SQ rt, offset(base) Store Quadword + * + * Multiply and Divide (19 instructions) + * ------------------------------------- + * PMULTW rd, rs, rt Parallel Multiply Word + * PMULTUW rd, rs, rt Parallel Multiply Unsigned Word + * PDIVW rs, rt Parallel Divide Word + * PDIVUW rs, rt Parallel Divide Unsigned Word + * PMADDW rd, rs, rt Parallel Multiply-Add Word + * PMADDUW rd, rs, rt Parallel Multiply-Add Unsigned Word + * PMSUBW rd, rs, rt Parallel Multiply-Subtract Word + * PMULTH rd, rs, rt Parallel Multiply Halfword + * PMADDH rd, rs, rt Parallel Multiply-Add Halfword + * PMSUBH rd, rs, rt Parallel Multiply-Subtract Halfword + * PHMADH rd, rs, rt Parallel Horizontal Multiply-Add Halfword + * PHMSBH rd, rs, rt Parallel Horizontal Multiply-Subtract Halfword + * PDIVBW rs, rt Parallel Divide Broadcast Word + * PMFHI rd Parallel Move From HI Register + * PMFLO rd Parallel Move From LO Register + * PMTHI rs Parallel Move To HI Register + * PMTLO rs Parallel Move To LO Register + * PMFHL rd Parallel Move From HI/LO Register + * PMTHL rs Parallel Move To HI/LO Register + * + * Pack/Extend (11 instructions) + * ----------------------------- + * PPAC5 rd, rt Parallel Pack to 5 bits + * PPACB rd, rs, rt Parallel Pack to Byte + * PPACH rd, rs, rt Parallel Pack to Halfword + * PPACW rd, rs, rt Parallel Pack to Word + * PEXT5 rd, rt Parallel Extend Upper from 5 bits + * PEXTUB rd, rs, rt Parallel Extend Upper from Byte + * PEXTLB rd, rs, rt Parallel Extend Lower from Byte + * PEXTUH rd, rs, rt Parallel Extend Upper from Halfword + * PEXTLH rd, rs, rt Parallel Extend Lower from Halfword + * PEXTUW rd, rs, rt Parallel Extend Upper from Word + * PEXTLW rd, rs, rt Parallel Extend Lower from Word + * + * Others (16 instructions) + * ------------------------ + * PCPYH rd, rt Parallel Copy Halfword + * PCPYLD rd, rs, rt Parallel Copy Lower Doubleword + * PCPYUD rd, rs, rt Parallel Copy Upper Doubleword + * PREVH rd, rt Parallel Reverse Halfword + * PINTH rd, rs, rt Parallel Interleave Halfword + * PINTEH rd, rs, rt Parallel Interleave Even Halfword + * PEXEH rd, rt Parallel Exchange Even Halfword + * PEXCH rd, rt Parallel Exchange Center Halfword + * PEXEW rd, rt Parallel Exchange Even Word + * PEXCW rd, rt Parallel Exchange Center Word + * QFSRV rd, rs, rt Quadword Funnel Shift Right Variable + * MFSA rd Move from Shift Amount Register + * MTSA rs Move to Shift Amount Register + * MTSAB rs, immediate Move Byte Count to Shift Amount Register + * MTSAH rs, immediate Move Halfword Count to Shift Amount Register + * PROT3W rd, rt Parallel Rotate 3 Words + */ =20 /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154038866666249.54197016883688; Wed, 24 Oct 2018 06:44:26 -0700 (PDT) Received: from localhost ([::1]:48532 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJST-0006Lr-H8 for importer@patchew.org; Wed, 24 Oct 2018 09:44:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59908) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQK-0004sR-Rr for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQE-0001lP-1I for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:48987 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQC-0001Gc-82 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 09DA91A454A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id DE3221A4563; Wed, 24 Oct 2018 15:40:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:17 +0200 Message-Id: <1540388447-27062-4-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 03/33] target/mips: Define R5900 MMI class, and LQ and SQ opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Define MMI class, LQ, and SQ R5900 opdoces. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 32d1d2d..e205c3e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2087,8 +2087,48 @@ enum { * MTSAB rs, immediate Move Byte Count to Shift Amount Register * MTSAH rs, immediate Move Halfword Count to Shift Amount Register * PROT3W rd, rt Parallel Rotate 3 Words + * + * The TX79-specific Multimedia Instruction encodings + * =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D + * + * TX79 Multimedia Instruction encoding table keys: + * + * * This code is reserved for future use. An attempt to execute it + * causes a Reserved Instruction exception. + * % This code indicates an instruction class. The instruction word + * must be further decoded by examining additional tables that show + * the values for other instruction fields. + * # This code is reserved for the unsupported instructions DMULT, + * DMULTU, DDIV, DDIVU, LL, LLD, SC, SCD, LWC2 and SWC2. An attempt + * to execute it causes a Reserved Instruction exception. + * + * TX79 Multimedia Instructions encoded by opcode field (MMI, LQ, SQ): + * + * 31 26 0 + * +--------+----------------------------------------+ + * | opcode | | + * +--------+----------------------------------------+ + * + * opcode bits 28..26 + * bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 + * 31..29 | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 + * -------+-------+-------+-------+-------+-------+-------+-------+-----= -- + * 0 000 |SPECIAL| REGIMM| J | JAL | BEQ | BNE | BLEZ | BGTZ + * 1 001 | ADDI | ADDIU | SLTI | SLTIU | ANDI | ORI | XORI | LUI + * 2 010 | COP0 | COP1 | * | * | BEQL | BNEL | BLEZL | BGTZL + * 3 011 | DADDI | DADDIU| LDL | LDR | MMI% | * | LQ | SQ + * 4 100 | LB | LH | LWL | LW | LBU | LHU | LWR | LWU + * 5 101 | SB | SH | SWL | SW | SDL | SDR | SWR | CACHE + * 6 110 | # | LWC1 | # | PREF | # | LDC1 | # | LD + * 7 111 | # | SWC1 | # | * | # | SDC1 | # | SD */ =20 +enum { + TX79_CLASS_MMI =3D 0x1C << 26, /* Same as OPC_SPECIAL2 */ + TX79_LQ =3D 0x1E << 26, /* Same as OPC_MSA */ + TX79_SQ =3D 0x1F << 26, /* Same as OPC_SPECIAL3 */ +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154038866713694.36597346326403; Wed, 24 Oct 2018 06:44:27 -0700 (PDT) Received: from localhost ([::1]:48533 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJST-0006M1-T6 for importer@patchew.org; Wed, 24 Oct 2018 09:44:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59895) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQK-0004sG-Dg for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQE-0001lS-1U for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:48994 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQC-0001H7-7d for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:05 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 1A5BC1A4563; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id E7D1E1A456F; Wed, 24 Oct 2018 15:40:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:18 +0200 Message-Id: <1540388447-27062-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 04/33] target/mips: Define R5900 MMI<0|1|2|3> subclasses and opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Define MMI0, MMI1, MMI2, MMI3 subclass opcodes, and other opcodes of instructions in MMI class. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 51 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 51 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index e205c3e..ae98817 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2129,6 +2129,57 @@ enum { TX79_SQ =3D 0x1F << 26, /* Same as OPC_SPECIAL3 */ }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI: + * + * 31 26 5 0 + * +--------+-------------------------------+--------+ + * | MMI | |function| + * +--------+-------------------------------+--------+ + * + * function bits 2..0 + * bits | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 + * 5..3 | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 + * -------+-------+-------+-------+-------+-------+-------+-------+-----= -- + * 0 000 | MADD | MADDU | * | * | PLZCW | * | * | * + * 1 001 | MMI0% | MMI2% | * | * | * | * | * | * + * 2 010 | MFHI1 | MTHI1 | MFLO1 | MTLO1 | * | * | * | * + * 3 011 | MULT1 | MULTU1| DIV1 | DIVU1 | * | * | * | * + * 4 100 | MADD1 | MADDU1| * | * | * | * | * | * + * 5 101 | MMI1% | MMI3% | * | * | * | * | * | * + * 6 110 | PMFHL | PMTHL | * | * | PSLLH | * | PSRLH | PSRAH + * 7 111 | * | * | * | * | PSLLW | * | PSRLW | PSRAW + */ + +#define MASK_TX79_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F)) +enum { + TX79_MMI_MADD =3D 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */ + TX79_MMI_MADDU =3D 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */ + TX79_MMI_PLZCW =3D 0x04 | TX79_CLASS_MMI, + TX79_MMI_CLASS_MMI0 =3D 0x08 | TX79_CLASS_MMI, + TX79_MMI_CLASS_MMI2 =3D 0x09 | TX79_CLASS_MMI, + TX79_MMI_MFHI1 =3D 0x10 | TX79_CLASS_MMI, /* Same minor as OPC_MF= HI */ + TX79_MMI_MTHI1 =3D 0x11 | TX79_CLASS_MMI, /* Same minor as OPC_MT= HI */ + TX79_MMI_MFLO1 =3D 0x12 | TX79_CLASS_MMI, /* Same minor as OPC_MF= LO */ + TX79_MMI_MTLO1 =3D 0x13 | TX79_CLASS_MMI, /* Same minor as OPC_MT= LO */ + TX79_MMI_MULT1 =3D 0x18 | TX79_CLASS_MMI, /* Same minor as OPC_MU= LT */ + TX79_MMI_MULTU1 =3D 0x19 | TX79_CLASS_MMI, /* Same minor as OPC_MU= LTU */ + TX79_MMI_DIV1 =3D 0x1A | TX79_CLASS_MMI, /* Same minor as OPC_DI= V */ + TX79_MMI_DIVU1 =3D 0x1B | TX79_CLASS_MMI, /* Same minor as OPC_DI= VU */ + TX79_MMI_MADD1 =3D 0x20 | TX79_CLASS_MMI, + TX79_MMI_MADDU1 =3D 0x21 | TX79_CLASS_MMI, + TX79_MMI_CLASS_MMI1 =3D 0x28 | TX79_CLASS_MMI, + TX79_MMI_CLASS_MMI3 =3D 0x29 | TX79_CLASS_MMI, + TX79_MMI_PMFHL =3D 0x30 | TX79_CLASS_MMI, + TX79_MMI_PMTHL =3D 0x31 | TX79_CLASS_MMI, + TX79_MMI_PSLLH =3D 0x34 | TX79_CLASS_MMI, + TX79_MMI_PSRLH =3D 0x36 | TX79_CLASS_MMI, + TX79_MMI_PSRAH =3D 0x37 | TX79_CLASS_MMI, + TX79_MMI_PSLLW =3D 0x3C | TX79_CLASS_MMI, + TX79_MMI_PSRLW =3D 0x3E | TX79_CLASS_MMI, + TX79_MMI_PSRAW =3D 0x3F | TX79_CLASS_MMI, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389572802880.4700003635658; Wed, 24 Oct 2018 06:59:32 -0700 (PDT) Received: from localhost ([::1]:48610 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJh5-0005TL-3W for importer@patchew.org; Wed, 24 Oct 2018 09:59:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59971) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQM-0004uL-Kn for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001sE-Mj for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49882 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001l8-5J for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 289591A4561; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 071231A4566; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:19 +0200 Message-Id: <1540388447-27062-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 05/33] target/mips: Define R5900 MMI0 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add definition of MI0 opcodes. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 51 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 51 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ae98817..242f2df 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2180,6 +2180,57 @@ enum { TX79_MMI_PSRAW =3D 0x3F | TX79_CLASS_MMI, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI0: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI0 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 | PADDW | PSUBW | PCGTW | PMAXW + * 1 001 | PADDH | PSUBH | PCGTH | PMAXH + * 2 010 | PADDB | PSUBB | PCGTB | * + * 3 011 | * | * | * | * + * 4 100 | PADDSW| PSUBSW| PEXTLW| PPACW + * 5 101 | PADDSH| PSUBSH| PEXTLH| PPACH + * 6 110 | PADDSB| PSUBSB| PEXTLB| PPACB + * 7 111 | * | * | PEXT5 | PPAC5 + */ + +#define MASK_TX79_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI0_PADDW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBW =3D (0x01 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PCGTW =3D (0x02 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PMAXW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PADDH =3D (0x04 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBH =3D (0x05 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PCGTH =3D (0x06 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PMAXH =3D (0x07 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PADDB =3D (0x08 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBB =3D (0x09 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PCGTB =3D (0x0A << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PADDSW =3D (0x10 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBSW =3D (0x11 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PEXTLW =3D (0x12 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PPACW =3D (0x13 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PADDSH =3D (0x14 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBSH =3D (0x15 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PEXTLH =3D (0x16 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PPACH =3D (0x17 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PADDSB =3D (0x18 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PSUBSB =3D (0x19 << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PEXTLB =3D (0x1A << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PPACB =3D (0x1B << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PEXT5 =3D (0x1E << 6) | TX79_MMI_CLASS_MMI0, + TX79_MMI0_PPAC5 =3D (0x1F << 6) | TX79_MMI_CLASS_MMI0, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389122619393.21598052299316; Wed, 24 Oct 2018 06:52:02 -0700 (PDT) Received: from localhost ([::1]:48570 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJZm-0006FG-EY for importer@patchew.org; Wed, 24 Oct 2018 09:51:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59962) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQM-0004ty-9c for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001sS-PJ for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49881 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001l6-CO for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2E28C1A4572; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 102871A455E; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:20 +0200 Message-Id: <1540388447-27062-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 06/33] target/mips: Define R5900 MMI1 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 242f2df..e233b87 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2231,6 +2231,50 @@ enum { TX79_MMI0_PPAC5 =3D (0x1F << 6) | TX79_MMI_CLASS_MMI0, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI1: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI1 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 | * | PABSW | PCEQW | PMINW + * 1 001 | PADSBH| PABSH | PCEQH | PMINH + * 2 010 | * | * | PCEQB | * + * 3 011 | * | * | * | * + * 4 100 | PADDUW| PSUBUW| PEXTUW| * + * 5 101 | PADDUH| PSUBUH| PEXTUH| * + * 6 110 | PADDUB| PSUBUB| PEXTUB| QFSRV + * 7 111 | * | * | * | * + */ + +#define MASK_TX79_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI1_PABSW =3D (0x01 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PCEQW =3D (0x02 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PMINW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PADSBH =3D (0x04 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PABSH =3D (0x05 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PCEQH =3D (0x06 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PMINH =3D (0x07 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PCEQB =3D (0x0A << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PADDUW =3D (0x10 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PSUBUW =3D (0x11 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PEXTUW =3D (0x12 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PADDUH =3D (0x14 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PSUBUH =3D (0x15 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PEXTUH =3D (0x16 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PADDUB =3D (0x18 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PSUBUB =3D (0x19 << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_PEXTUB =3D (0x1A << 6) | TX79_MMI_CLASS_MMI1, + TX79_MMI1_QFSRV =3D (0x1B << 6) | TX79_MMI_CLASS_MMI1, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390121552308.3441190872311; Wed, 24 Oct 2018 07:08:41 -0700 (PDT) Received: from localhost ([::1]:48663 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJpv-0005x4-DD for importer@patchew.org; Wed, 24 Oct 2018 10:08:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60223) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005G0-7m for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001z4-Cp for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:33 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49891 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQW-0001ly-E8 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:24 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 41BEA1A4570; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 18E811A455A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:21 +0200 Message-Id: <1540388447-27062-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 07/33] target/mips: Define R5900 MMI2 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 48 +++++++++++++++++++++++++++++++++++++++++++++= +++ 1 file changed, 48 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index e233b87..bd51443 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2275,6 +2275,54 @@ enum { TX79_MMI1_QFSRV =3D (0x1B << 6) | TX79_MMI_CLASS_MMI1, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI2: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI2 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 | PMADDW| * | PSLLVW| PSRLVW + * 1 001 | PMSUBW| * | * | * + * 2 010 | PMFHI | PMFLO | PINTH | * + * 3 011 | PMULTW| PDIVW | PCPYLD| * + * 4 100 | PMADDH| PHMADH| PAND | PXOR + * 5 101 | PMSUBH| PHMSBH| * | * + * 6 110 | * | * | PEXEH | PREVH + * 7 111 | PMULTH| PDIVBW| PEXEW | PROT3W + */ + +#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI2_PMADDW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PSLLVW =3D (0x02 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PSRLVW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMSUBW =3D (0x04 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMFHI =3D (0x08 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMFLO =3D (0x09 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PINTH =3D (0x0A << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMULTW =3D (0x0C << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PDIVW =3D (0x0D << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PCPYLD =3D (0x0E << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMADDH =3D (0x10 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PHMADH =3D (0x11 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PAND =3D (0x12 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PXOR =3D (0x13 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMSUBH =3D (0x14 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PHMSBH =3D (0x15 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PEXEH =3D (0x1A << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PREVH =3D (0x1B << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMULTH =3D (0x1C << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PDIVBW =3D (0x1D << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PEXEW =3D (0x1E << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PROT3W =3D (0x1F << 6) | TX79_MMI_CLASS_MMI2, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389406988867.3411582475428; Wed, 24 Oct 2018 06:56:46 -0700 (PDT) Received: from localhost ([::1]:48598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJeP-0002cH-TI for importer@patchew.org; Wed, 24 Oct 2018 09:56:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59936) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQL-0004tL-ML for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001ri-B4 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49890 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001mK-0W for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 4C47E1A4566; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 2C6C51A456F; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:22 +0200 Message-Id: <1540388447-27062-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 08/33] target/mips: Define R5900 MMI3 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index bd51443..3c6a2c9 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2323,6 +2323,45 @@ enum { TX79_MMI2_PROT3W =3D (0x1F << 6) | TX79_MMI_CLASS_MMI2, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI3: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI3 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 |PMADDUW| * | * | PSRAVW + * 1 001 | * | * | * | * + * 2 010 | PMTHI | PMTLO | PINTEH| * + * 3 011 |PMULTUW| PDIVUW| PCPYUD| * + * 4 100 | * | * | POR | PNOR + * 5 101 | * | * | * | * + * 6 110 | * | * | PEXCH | PCPYH + * 7 111 | * | * | PEXCW | * + */ + +#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI3_PMADDUW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PSRAVW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTHI =3D (0x08 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMTLO =3D (0x09 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PINTEH =3D (0x0A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PMULTUW =3D (0x0C << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PDIVUW =3D (0x0D << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYUD =3D (0x0E << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_POR =3D (0x12 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PNOR =3D (0x13 << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCH =3D (0x1A << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PCPYH =3D (0x1B << 6) | TX79_MMI_CLASS_MMI3, + TX79_MMI3_PEXCW =3D (0x1E << 6) | TX79_MMI_CLASS_MMI3, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540388860348762.6658730102486; Wed, 24 Oct 2018 06:47:40 -0700 (PDT) Received: from localhost ([::1]:48552 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJVX-00022y-Kv for importer@patchew.org; Wed, 24 Oct 2018 09:47:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59889) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQK-0004s4-59 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQI-0001pq-EK for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:11 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49893 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQG-0001m3-Bz for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:09 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 580C81A456F; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 358DA1A455E; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:23 +0200 Message-Id: <1540388447-27062-10-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 09/33] target/mips: Add a placeholder for R5900 SQ, handle user mode RDHWR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add placeholder for SQ instruction, handle RDHWR. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 53 +++++++++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3c6a2c9..19a8aba 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,6 +24420,53 @@ static void decode_opc_special3_legacy(CPUMIPSStat= e *env, DisasContext *ctx) } } =20 +static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset) +{ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_SQ */ +} + +/* + * The TX79-specific instruction Store Quadword + * + * +--------+-------+-------+------------------------+ + * | 011111 | base | rt | offset | SQ + * +--------+-------+-------+------------------------+ + * 6 5 5 16 + * + * has the same opcode as the Read Hardware Register instruction + * + * +--------+-------+-------+-------+-------+--------+ + * | 011111 | 00000 | rt | rd | 00000 | 111011 | RDHWR + * +--------+-------+-------+-------+-------+--------+ + * 6 5 5 5 5 6 + * + * that is required, trapped and emulated by the Linux kernel. However, all + * RDHWR encodings yield address error exceptions on the TX79 since the SQ + * offset is odd. Therefore all valid SQ instructions can execute normally. + * In user mode, QEMU must verify the upper and lower 11 bits to distingui= sh + * between SQ and RDHWR, as the Linux kernel does. + */ +static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx) +{ + int base =3D extract32(ctx->opcode, 21, 5); + int rt =3D extract32(ctx->opcode, 16, 5); + int offset =3D extract32(ctx->opcode, 0, 16); + +#ifdef CONFIG_USER_ONLY + uint32_t op1 =3D MASK_SPECIAL3(ctx->opcode); + uint32_t op2 =3D extract32(ctx->opcode, 6, 5); + + if (base =3D=3D 0 && op2 =3D=3D 0 && op1 =3D=3D OPC_RDHWR) { + int rd =3D extract32(ctx->opcode, 11, 5); + + gen_rdhwr(ctx, rt, rd, 0); + return; + } +#endif + + gen_tx79_sq(ctx, base, rt, offset); +} + static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx) { int rs, rt, rd, sa; @@ -25720,7 +25767,11 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) decode_opc_special2_legacy(env, ctx); break; case OPC_SPECIAL3: - decode_opc_special3(env, ctx); + if (ctx->insn_flags & INSN_R5900) { + decode_tx79_sq(env, ctx); /* TX79_SQ */ + } else { + decode_opc_special3(env, ctx); + } break; case OPC_REGIMM: op1 =3D MASK_REGIMM(ctx->opcode); --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390350412493.4295583610527; Wed, 24 Oct 2018 07:12:30 -0700 (PDT) Received: from localhost ([::1]:48683 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJtd-0000mB-25 for importer@patchew.org; Wed, 24 Oct 2018 10:12:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60229) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005G6-9j for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQd-00023X-7O for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:33 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49892 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQc-0001lz-Qu for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:31 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 66E761A455A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3F4631A4575; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:24 +0200 Message-Id: <1540388447-27062-11-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for LQ instruction. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 19a8aba..2318116 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,6 +24420,11 @@ static void decode_opc_special3_legacy(CPUMIPSStat= e *env, DisasContext *ctx) } } =20 +static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx) +{ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_LQ */ +} + static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset) { generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_SQ */ @@ -26425,8 +26430,12 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) } break; case OPC_MSA: /* OPC_MDMX */ - /* MDMX: Not implemented. */ - gen_msa(env, ctx); + if (ctx->insn_flags & INSN_R5900) { + decode_tx79_lq(env, ctx); /* TX79_LQ */ + } else { + /* MDMX: Not implemented. */ + gen_msa(env, ctx); + } break; case OPC_PCREL: check_insn(ctx, ISA_MIPS32R6); --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389049469828.3677116883171; Wed, 24 Oct 2018 06:50:49 -0700 (PDT) Received: from localhost ([::1]:48564 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJYc-0005HZ-39 for importer@patchew.org; Wed, 24 Oct 2018 09:50:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60005) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQO-0004wZ-WA for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQJ-0001qv-Tn for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:16 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49894 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQI-0001m1-0F for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:10 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 722071A455E; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 488AE1A4578; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:25 +0200 Message-Id: <1540388447-27062-12-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 11/33] target/mips: Add a placeholder for R5900 MMI instruction class X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for MMI class. This is the main palceholder for MMI ASE. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 45 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 2318116..6cb6966 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,6 +24420,45 @@ static void decode_opc_special3_legacy(CPUMIPSStat= e *env, DisasContext *ctx) } } =20 +static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); + + switch (opc) { + case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ + case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ + case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ + case TX79_MMI_CLASS_MMI0: /* TODO: TX79_MMI_CLASS_MMI0 */ + case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */ + case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ + case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ + case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ + case TX79_MMI_MTLO1: /* TODO: TX79_MMI_MTLO1 */ + case TX79_MMI_MULT1: /* TODO: TX79_MMI_MULT1 */ + case TX79_MMI_MULTU1: /* TODO: TX79_MMI_MULTU1 */ + case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ + case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ + case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ + case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ + case TX79_MMI_CLASS_MMI1: /* TODO: TX79_MMI_CLASS_MMI1 */ + case TX79_MMI_CLASS_MMI3: /* TODO: TX79_MMI_CLASS_MMI3 */ + case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ + case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */ + case TX79_MMI_PSLLH: /* TODO: TX79_MMI_PSLLH */ + case TX79_MMI_PSRLH: /* TODO: TX79_MMI_PSRLH */ + case TX79_MMI_PSRAH: /* TODO: TX79_MMI_PSRAH */ + case TX79_MMI_PSLLW: /* TODO: TX79_MMI_PSLLW */ + case TX79_MMI_PSRLW: /* TODO: TX79_MMI_PSRLW */ + case TX79_MMI_PSRAW: /* TODO: TX79_MMI_PSRAW */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_CLASS_MMI */ + break; + default: + MIPS_INVAL("TX79 MMI class"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx) { generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_LQ */ @@ -25769,7 +25808,11 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) decode_opc_special(env, ctx); break; case OPC_SPECIAL2: - decode_opc_special2_legacy(env, ctx); + if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI))= { + decode_tx79_mmi(env, ctx); + } else { + decode_opc_special2_legacy(env, ctx); + } break; case OPC_SPECIAL3: if (ctx->insn_flags & INSN_R5900) { --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389300556274.0692628564203; Wed, 24 Oct 2018 06:55:00 -0700 (PDT) Received: from localhost ([::1]:48582 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJch-00015g-2l for importer@patchew.org; Wed, 24 Oct 2018 09:54:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60017) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQR-00051Q-MZ for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001sK-O9 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:19 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49888 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001lw-6D for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 7D4031A4578; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 526571A457A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:26 +0200 Message-Id: <1540388447-27062-13-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 12/33] target/mips: Add a placeholder for R5900 MMI0 instruction subclass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for MMI0 subclass. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 43 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 6cb6966..1a9e43b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,15 +24420,56 @@ static void decode_opc_special3_legacy(CPUMIPSSta= te *env, DisasContext *ctx) } } =20 +static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc =3D MASK_TX79_MMI0(ctx->opcode); + + switch (opc) { + case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */ + case TX79_MMI0_PSUBW: /* TODO: TX79_MMI0_PSUBW */ + case TX79_MMI0_PCGTW: /* TODO: TX79_MMI0_PCGTW */ + case TX79_MMI0_PMAXW: /* TODO: TX79_MMI0_PMAXW */ + case TX79_MMI0_PADDH: /* TODO: TX79_MMI0_PADDH */ + case TX79_MMI0_PSUBH: /* TODO: TX79_MMI0_PSUBH */ + case TX79_MMI0_PCGTH: /* TODO: TX79_MMI0_PCGTH */ + case TX79_MMI0_PMAXH: /* TODO: TX79_MMI0_PMAXH */ + case TX79_MMI0_PADDB: /* TODO: TX79_MMI0_PADDB */ + case TX79_MMI0_PSUBB: /* TODO: TX79_MMI0_PSUBB */ + case TX79_MMI0_PCGTB: /* TODO: TX79_MMI0_PCGTB */ + case TX79_MMI0_PADDSW: /* TODO: TX79_MMI0_PADDSW */ + case TX79_MMI0_PSUBSW: /* TODO: TX79_MMI0_PSUBSW */ + case TX79_MMI0_PEXTLW: /* TODO: TX79_MMI0_PEXTLW */ + case TX79_MMI0_PPACW: /* TODO: TX79_MMI0_PPACW */ + case TX79_MMI0_PADDSH: /* TODO: TX79_MMI0_PADDSH */ + case TX79_MMI0_PSUBSH: /* TODO: TX79_MMI0_PSUBSH */ + case TX79_MMI0_PEXTLH: /* TODO: TX79_MMI0_PEXTLH */ + case TX79_MMI0_PPACH: /* TODO: TX79_MMI0_PPACH */ + case TX79_MMI0_PADDSB: /* TODO: TX79_MMI0_PADDSB */ + case TX79_MMI0_PSUBSB: /* TODO: TX79_MMI0_PSUBSB */ + case TX79_MMI0_PEXTLB: /* TODO: TX79_MMI0_PEXTLB */ + case TX79_MMI0_PPACB: /* TODO: TX79_MMI0_PPACB */ + case TX79_MMI0_PEXT5: /* TODO: TX79_MMI0_PEXT5 */ + case TX79_MMI0_PPAC5: /* TODO: TX79_MMI0_PPAC5 */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI0= */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI0"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); =20 switch (opc) { + case TX79_MMI_CLASS_MMI0: + decode_tx79_mmi0(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_CLASS_MMI0: /* TODO: TX79_MMI_CLASS_MMI0 */ case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */ case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; 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Wed, 24 Oct 2018 09:42:11 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8B47B1A457F; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 652B11A4577; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:27 +0200 Message-Id: <1540388447-27062-14-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 13/33] target/mips: Add a placeholder for R5900 MMI1 instruction subclass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for MM1 subclass. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 1a9e43b..07e33e0 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24459,6 +24459,38 @@ static void decode_tx79_mmi0(CPUMIPSState *env, Di= sasContext *ctx) } } =20 +static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc =3D MASK_TX79_MMI1(ctx->opcode); + + switch (opc) { + case TX79_MMI1_PABSW: /* TODO: TX79_MMI1_PABSW */ + case TX79_MMI1_PCEQW: /* TODO: TX79_MMI1_PCEQW */ + case TX79_MMI1_PMINW: /* TODO: TX79_MMI1_PMINW */ + case TX79_MMI1_PADSBH: /* TODO: TX79_MMI1_PADSBH */ + case TX79_MMI1_PABSH: /* TODO: TX79_MMI1_PABSH */ + case TX79_MMI1_PCEQH: /* TODO: TX79_MMI1_PCEQH */ + case TX79_MMI1_PMINH: /* TODO: TX79_MMI1_PMINH */ + case TX79_MMI1_PCEQB: /* TODO: TX79_MMI1_PCEQB */ + case TX79_MMI1_PADDUW: /* TODO: TX79_MMI1_PADDUW */ + case TX79_MMI1_PSUBUW: /* TODO: TX79_MMI1_PSUBUW */ + case TX79_MMI1_PEXTUW: /* TODO: TX79_MMI1_PEXTUW */ + case TX79_MMI1_PADDUH: /* TODO: TX79_MMI1_PADDUH */ + case TX79_MMI1_PSUBUH: /* TODO: TX79_MMI1_PSUBUH */ + case TX79_MMI1_PEXTUH: /* TODO: TX79_MMI1_PEXTUH */ + case TX79_MMI1_PADDUB: /* TODO: TX79_MMI1_PADDUB */ + case TX79_MMI1_PSUBUB: /* TODO: TX79_MMI1_PSUBUB */ + case TX79_MMI1_PEXTUB: /* TODO: TX79_MMI1_PEXTUB */ + case TX79_MMI1_QFSRV: /* TODO: TX79_MMI1_QFSRV */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI1= */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI1"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); @@ -24467,6 +24499,9 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_CLASS_MMI0: decode_tx79_mmi0(env, ctx); break; + case TX79_MMI_CLASS_MMI1: + decode_tx79_mmi1(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ @@ -24481,7 +24516,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ - case TX79_MMI_CLASS_MMI1: /* TODO: TX79_MMI_CLASS_MMI1 */ case TX79_MMI_CLASS_MMI3: /* TODO: TX79_MMI_CLASS_MMI3 */ case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389236678118.43538643247541; Wed, 24 Oct 2018 06:53:56 -0700 (PDT) Received: from localhost ([::1]:48581 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJbe-0000FP-Bs for importer@patchew.org; Wed, 24 Oct 2018 09:53:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59959) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQM-0004tr-8n for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001s2-KF for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:13 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49895 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001m6-16 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 97B0A1A4577; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 77C0A1A4575; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:28 +0200 Message-Id: <1540388447-27062-15-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 14/33] target/mips: Add a placeholder for R5900 MMI2 instruction subclass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for MMI2 subclass. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 07e33e0..cc00429 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24491,6 +24491,42 @@ static void decode_tx79_mmi1(CPUMIPSState *env, Di= sasContext *ctx) } } =20 +static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc =3D MASK_TX79_MMI2(ctx->opcode); + + switch (opc) { + case TX79_MMI2_PMADDW: /* TODO: TX79_MMI2_PMADDW */ + case TX79_MMI2_PSLLVW: /* TODO: TX79_MMI2_PSLLVW */ + case TX79_MMI2_PSRLVW: /* TODO: TX79_MMI2_PSRLVW */ + case TX79_MMI2_PMSUBW: /* TODO: TX79_MMI2_PMSUBW */ + case TX79_MMI2_PMFHI: /* TODO: TX79_MMI2_PMFHI */ + case TX79_MMI2_PMFLO: /* TODO: TX79_MMI2_PMFLO */ + case TX79_MMI2_PINTH: /* TODO: TX79_MMI2_PINTH */ + case TX79_MMI2_PMULTW: /* TODO: TX79_MMI2_PMULTW */ + case TX79_MMI2_PDIVW: /* TODO: TX79_MMI2_PDIVW */ + case TX79_MMI2_PCPYLD: /* TODO: TX79_MMI2_PCPYLD */ + case TX79_MMI2_PMADDH: /* TODO: TX79_MMI2_PMADDH */ + case TX79_MMI2_PHMADH: /* TODO: TX79_MMI2_PHMADH */ + case TX79_MMI2_PAND: /* TODO: TX79_MMI2_PAND */ + case TX79_MMI2_PXOR: /* TODO: TX79_MMI2_PXOR */ + case TX79_MMI2_PMSUBH: /* TODO: TX79_MMI2_PMSUBH */ + case TX79_MMI2_PHMSBH: /* TODO: TX79_MMI2_PHMSBH */ + case TX79_MMI2_PEXEH: /* TODO: TX79_MMI2_PEXEH */ + case TX79_MMI2_PREVH: /* TODO: TX79_MMI2_PREVH */ + case TX79_MMI2_PMULTH: /* TODO: TX79_MMI2_PMULTH */ + case TX79_MMI2_PDIVBW: /* TODO: TX79_MMI2_PDIVBW */ + case TX79_MMI2_PEXEW: /* TODO: TX79_MMI2_PEXEW */ + case TX79_MMI2_PROT3W: /* TODO: TX79_MMI2_PROT3W */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI2= */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI2"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); @@ -24502,10 +24538,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, Di= sasContext *ctx) case TX79_MMI_CLASS_MMI1: decode_tx79_mmi1(env, ctx); break; + case TX79_MMI_CLASS_MMI2: + decode_tx79_mmi2(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */ case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390240318430.3708521279897; Wed, 24 Oct 2018 07:10:40 -0700 (PDT) Received: from localhost ([::1]:48676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJrq-00081M-Tk for importer@patchew.org; Wed, 24 Oct 2018 10:10:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60221) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005Fy-7i for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQd-000238-3L for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:33 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49940 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQa-0001qL-V7 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A03351A4582; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 818CB1A457C; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:29 +0200 Message-Id: <1540388447-27062-16-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MMI3 instruction subclass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a placeholder for MMI3 subclass. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index cc00429..1c0400c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24527,6 +24527,33 @@ static void decode_tx79_mmi2(CPUMIPSState *env, Di= sasContext *ctx) } } =20 +static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc =3D MASK_TX79_MMI3(ctx->opcode); + + switch (opc) { + case TX79_MMI3_PMADDUW: /* TODO: TX79_MMI3_PMADDUW */ + case TX79_MMI3_PSRAVW: /* TODO: TX79_MMI3_PSRAVW */ + case TX79_MMI3_PMTHI: /* TODO: TX79_MMI3_PMTHI */ + case TX79_MMI3_PMTLO: /* TODO: TX79_MMI3_PMTLO */ + case TX79_MMI3_PINTEH: /* TODO: TX79_MMI3_PINTEH */ + case TX79_MMI3_PMULTUW: /* TODO: TX79_MMI3_PMULTUW */ + case TX79_MMI3_PDIVUW: /* TODO: TX79_MMI3_PDIVUW */ + case TX79_MMI3_PCPYUD: /* TODO: TX79_MMI3_PCPYUD */ + case TX79_MMI3_POR: /* TODO: TX79_MMI3_POR */ + case TX79_MMI3_PNOR: /* TODO: TX79_MMI3_PNOR */ + case TX79_MMI3_PEXCH: /* TODO: TX79_MMI3_PEXCH */ + case TX79_MMI3_PCPYH: /* TODO: TX79_MMI3_PCPYH */ + case TX79_MMI3_PEXCW: /* TODO: TX79_MMI3_PEXCW */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI3= */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI3"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); @@ -24541,6 +24568,9 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_CLASS_MMI2: decode_tx79_mmi2(env, ctx); break; + case TX79_MMI_CLASS_MMI3: + decode_tx79_mmi3(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ @@ -24554,7 +24584,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ - case TX79_MMI_CLASS_MMI3: /* TODO: TX79_MMI_CLASS_MMI3 */ case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */ case TX79_MMI_PSLLH: /* TODO: TX79_MMI_PSLLH */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540388860418739.7632379845849; Wed, 24 Oct 2018 06:47:40 -0700 (PDT) Received: from localhost ([::1]:48550 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJVV-0001zF-Vo for importer@patchew.org; Wed, 24 Oct 2018 09:47:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQM-0004uQ-OP for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQK-0001sk-UA for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49941 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQK-0001qP-GC for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:12 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id AECD71A457E; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 8B70A1A4580; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:30 +0200 Message-Id: <1540388447-27062-17-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 16/33] target/mips: Support R5900 three-operand MULT and MULTU instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring The three-operand MULT and MULTU are the only R5900-specific instructions emitted by GCC 7.3. The R5900 also implements the three- operand MADD and MADDU instructions, but they are omitted in QEMU for now since they are absent in programs compiled by current GCC versions. Likewise, the R5900-specific pipeline 1 instruction variants MULT1, MULTU1, DIV1, DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1 are omitted here as well. Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 74 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 74 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 1c0400c..3dc6d80 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4766,6 +4766,78 @@ static void gen_muldiv(DisasContext *ctx, uint32_t o= pc, tcg_temp_free(t1); } =20 +/* + * These MULT and MULTU instructions implemented in for example the + * Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core + * architectures are special three-operand variants with the syntax + * + * MULT[U] rd, rs, rt + * + * such that + * + * (rd, LO, HI) <- rs * rt + * + * where the low-order 32-bits of the result is placed into both the + * GPR rd and the special register LO. The high-order 32-bits of the + * result is placed into the special register HI. + * + * If the GPR rd is omitted in assembly language, it is taken to be 0, + * which is the zero register that always reads as 0. + */ +static void gen_mul_txx9(DisasContext *ctx, uint32_t opc, + int rd, int rs, int rt) +{ + TCGv t0 =3D tcg_temp_new(); + TCGv t1 =3D tcg_temp_new(); + int acc =3D 0; + + gen_load_gpr(t0, rs); + gen_load_gpr(t1, rt); + + switch (opc) { + case OPC_MULT: + { + TCGv_i32 t2 =3D tcg_temp_new_i32(); + TCGv_i32 t3 =3D tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t2, t0); + tcg_gen_trunc_tl_i32(t3, t1); + tcg_gen_muls2_i32(t2, t3, t2, t3); + if (rd) { + tcg_gen_ext_i32_tl(cpu_gpr[rd], t2); + } + tcg_gen_ext_i32_tl(cpu_LO[acc], t2); + tcg_gen_ext_i32_tl(cpu_HI[acc], t3); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + } + break; + case OPC_MULTU: + { + TCGv_i32 t2 =3D tcg_temp_new_i32(); + TCGv_i32 t3 =3D tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t2, t0); + tcg_gen_trunc_tl_i32(t3, t1); + tcg_gen_mulu2_i32(t2, t3, t2, t3); + if (rd) { + tcg_gen_ext_i32_tl(cpu_gpr[rd], t2); + } + tcg_gen_ext_i32_tl(cpu_LO[acc], t2); + tcg_gen_ext_i32_tl(cpu_HI[acc], t3); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + } + break; + default: + MIPS_INVAL("mul TXx9"); + generate_exception_end(ctx, EXCP_RI); + goto out; + } + + out: + tcg_temp_free(t0); + tcg_temp_free(t1); +} + static void gen_mul_vr54xx (DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) { @@ -23490,6 +23562,8 @@ static void decode_opc_special_legacy(CPUMIPSState = *env, DisasContext *ctx) check_insn(ctx, INSN_VR54XX); op1 =3D MASK_MUL_VR54XX(ctx->opcode); gen_mul_vr54xx(ctx, op1, rd, rs, rt); + } else if (ctx->insn_flags & INSN_R5900) { + gen_mul_txx9(ctx, op1, rd, rs, rt); } else { gen_muldiv(ctx, op1, rd & 3, rs, rt); } --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389235276406.7890364941386; Wed, 24 Oct 2018 06:53:55 -0700 (PDT) Received: from localhost ([::1]:48579 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJbY-0000BA-AS for importer@patchew.org; Wed, 24 Oct 2018 09:53:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058i-3d for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zQ-RD for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49949 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001rS-FJ for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id B5CA81A4583; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 953781A457A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:31 +0200 Message-Id: <1540388447-27062-18-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 17/33] target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add support for MULT1 and MULTU1 instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3dc6d80..6d89002 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4771,7 +4771,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t op= c, * Toshiba/Sony R5900 and the Toshiba TX19, TX39 and TX79 core * architectures are special three-operand variants with the syntax * - * MULT[U] rd, rs, rt + * MULT[U][1] rd, rs, rt * * such that * @@ -4795,6 +4795,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t = opc, gen_load_gpr(t1, rt); =20 switch (opc) { + case TX79_MMI_MULT1: + acc =3D 1; + /* Fall through */ case OPC_MULT: { TCGv_i32 t2 =3D tcg_temp_new_i32(); @@ -4811,6 +4814,9 @@ static void gen_mul_txx9(DisasContext *ctx, uint32_t = opc, tcg_temp_free_i32(t3); } break; + case TX79_MMI_MULTU1: + acc =3D 1; + /* Fall through */ case OPC_MULTU: { TCGv_i32 t2 =3D tcg_temp_new_i32(); @@ -24631,6 +24637,9 @@ static void decode_tx79_mmi3(CPUMIPSState *env, Dis= asContext *ctx) static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc =3D MASK_TX79_MMI(ctx->opcode); + int rs =3D extract32(ctx->opcode, 21, 5); + int rt =3D extract32(ctx->opcode, 16, 5); + int rd =3D extract32(ctx->opcode, 11, 5); =20 switch (opc) { case TX79_MMI_CLASS_MMI0: @@ -24645,6 +24654,10 @@ static void decode_tx79_mmi(CPUMIPSState *env, Dis= asContext *ctx) case TX79_MMI_CLASS_MMI3: decode_tx79_mmi3(env, ctx); break; + case TX79_MMI_MULT1: + case TX79_MMI_MULTU1: + gen_mul_txx9(ctx, opc, rd, rs, rt); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ @@ -24652,8 +24665,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ case TX79_MMI_MTLO1: /* TODO: TX79_MMI_MTLO1 */ - case TX79_MMI_MULT1: /* TODO: TX79_MMI_MULT1 */ - case TX79_MMI_MULTU1: /* TODO: TX79_MMI_MULTU1 */ case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15403894063098.061882642637215; Wed, 24 Oct 2018 06:56:46 -0700 (PDT) Received: from localhost ([::1]:48596 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJeP-0002b4-4H for importer@patchew.org; Wed, 24 Oct 2018 09:56:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60087) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058k-3s for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQZ-0001zl-1o for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49948 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001rQ-Is for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id C0D9B1A4588; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 9EF7D1A4575; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:32 +0200 Message-Id: <1540388447-27062-19-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 18/33] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add support for MFLO1, MTLO1, MFHI1 and MTHI1 instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 6d89002..d7d7145 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4229,17 +4229,21 @@ static void gen_shift(DisasContext *ctx, uint32_t o= pc, /* Arithmetic on HI/LO registers */ static void gen_HILO(DisasContext *ctx, uint32_t opc, int acc, int reg) { - if (reg =3D=3D 0 && (opc =3D=3D OPC_MFHI || opc =3D=3D OPC_MFLO)) { + if (reg =3D=3D 0 && (opc =3D=3D OPC_MFHI || opc =3D=3D TX79_MMI_MFHI1 = || + opc =3D=3D OPC_MFLO || opc =3D=3D TX79_MMI_MFLO1)) { /* Treat as NOP. */ return; } =20 if (acc !=3D 0) { - check_dsp(ctx); + if (!(ctx->insn_flags & INSN_R5900)) { + check_dsp(ctx); + } } =20 switch (opc) { case OPC_MFHI: + case TX79_MMI_MFHI1: #if defined(TARGET_MIPS64) if (acc !=3D 0) { tcg_gen_ext32s_tl(cpu_gpr[reg], cpu_HI[acc]); @@ -4250,6 +4254,7 @@ static void gen_HILO(DisasContext *ctx, uint32_t opc,= int acc, int reg) } break; case OPC_MFLO: + case TX79_MMI_MFLO1: #if defined(TARGET_MIPS64) if (acc !=3D 0) { tcg_gen_ext32s_tl(cpu_gpr[reg], cpu_LO[acc]); @@ -4260,6 +4265,7 @@ static void gen_HILO(DisasContext *ctx, uint32_t opc,= int acc, int reg) } break; case OPC_MTHI: + case TX79_MMI_MTHI1: if (reg !=3D 0) { #if defined(TARGET_MIPS64) if (acc !=3D 0) { @@ -4274,6 +4280,7 @@ static void gen_HILO(DisasContext *ctx, uint32_t opc,= int acc, int reg) } break; case OPC_MTLO: + case TX79_MMI_MTLO1: if (reg !=3D 0) { #if defined(TARGET_MIPS64) if (acc !=3D 0) { @@ -24658,13 +24665,17 @@ static void decode_tx79_mmi(CPUMIPSState *env, Di= sasContext *ctx) case TX79_MMI_MULTU1: gen_mul_txx9(ctx, opc, rd, rs, rt); break; + case TX79_MMI_MTLO1: + case TX79_MMI_MTHI1: + gen_HILO(ctx, opc, 1, rs); + break; + case TX79_MMI_MFLO1: + case TX79_MMI_MFHI1: + gen_HILO(ctx, opc, 1, rd); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ - case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ - case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ - case TX79_MMI_MTLO1: /* TODO: TX79_MMI_MTLO1 */ case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390121868524.3870688970732; Wed, 24 Oct 2018 07:08:41 -0700 (PDT) Received: from localhost ([::1]:48662 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJpv-0005wa-SJ for importer@patchew.org; Wed, 24 Oct 2018 10:08:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60237) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005GH-EP for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQb-000213-0c for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:35 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49950 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001ra-HF for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id DF45D1A458C; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id A86351A4581; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:33 +0200 Message-Id: <1540388447-27062-20-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 19/33] target/mips: Support R5900 DIV1 and DIVU1 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add support for DIV1 and DIVU1 instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index d7d7145..f2aeaf4 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4593,11 +4593,14 @@ static void gen_muldiv(DisasContext *ctx, uint32_t = opc, gen_load_gpr(t1, rt); =20 if (acc !=3D 0) { - check_dsp(ctx); + if (!(ctx->insn_flags & INSN_R5900)) { + check_dsp(ctx); + } } =20 switch (opc) { case OPC_DIV: + case TX79_MMI_DIV1: { TCGv t2 =3D tcg_temp_new(); TCGv t3 =3D tcg_temp_new(); @@ -4619,6 +4622,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t op= c, } break; case OPC_DIVU: + case TX79_MMI_DIVU1: { TCGv t2 =3D tcg_const_tl(0); TCGv t3 =3D tcg_const_tl(1); @@ -24665,6 +24669,10 @@ static void decode_tx79_mmi(CPUMIPSState *env, Dis= asContext *ctx) case TX79_MMI_MULTU1: gen_mul_txx9(ctx, opc, rd, rs, rt); break; + case TX79_MMI_DIV1: + case TX79_MMI_DIVU1: + gen_muldiv(ctx, opc, 1, rs, rt); + break; case TX79_MMI_MTLO1: case TX79_MMI_MTHI1: gen_HILO(ctx, opc, 1, rs); @@ -24676,8 +24684,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ - case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389763154263.3183394888621; Wed, 24 Oct 2018 07:02:43 -0700 (PDT) Received: from localhost ([::1]:48632 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJk9-0008IN-7p for importer@patchew.org; Wed, 24 Oct 2018 10:02:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60086) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058j-3j for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQW-0001yW-Hq for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49951 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQV-0001rb-U9 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:24 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id D83721A458B; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B21E81A4586; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:34 +0200 Message-Id: <1540388447-27062-21-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 20/33] target/mips: Support R5900 MOVN, MOVZ and PREF instructions from MIPS IV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring The R5900 is taken to be MIPS III with certain modifications. From MIPS IV it implements the instructions MOVN, MOVZ and PREF. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index f2aeaf4..551928d 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -23552,7 +23552,7 @@ static void decode_opc_special_legacy(CPUMIPSState = *env, DisasContext *ctx) case OPC_MOVN: /* Conditional move */ case OPC_MOVZ: check_insn(ctx, ISA_MIPS4 | ISA_MIPS32 | - INSN_LOONGSON2E | INSN_LOONGSON2F); + INSN_LOONGSON2E | INSN_LOONGSON2F | INSN_R5900); gen_cond_move(ctx, op1, rd, rs, rt); break; case OPC_MFHI: /* Move from HI/LO */ @@ -26388,7 +26388,8 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) break; case OPC_PREF: check_insn_opc_removed(ctx, ISA_MIPS32R6); - check_insn(ctx, ISA_MIPS4 | ISA_MIPS32); + check_insn(ctx, ISA_MIPS4 | ISA_MIPS32 | + INSN_R5900); /* Treat as NOP. */ break; =20 --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154038963307617.28533291068311; Wed, 24 Oct 2018 07:00:33 -0700 (PDT) Received: from localhost ([::1]:48614 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJi3-0006id-TJ for importer@patchew.org; Wed, 24 Oct 2018 10:00:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60158) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQd-0005AU-5y for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQb-00021A-0g for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49957 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001s0-Pn for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id EAC931A4527; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B9B061A4587; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:35 +0200 Message-Id: <1540388447-27062-22-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 21/33] target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring The Linux kernel traps certain reserved instruction exceptions to emulate the corresponding instructions. QEMU plays the role of the kernel in user mode, so those traps are emulated by accepting the instructions. This change adds the function check_insn_opc_user_only to signal a reserved instruction exception for flagged CPUs in QEMU system mode. The MIPS III instructions DMULT[U], DDIV[U], LL[D] and SC[D] are not implemented in R5900 hardware. They are trapped and emulated by the Linux kernel and, accordingly, therefore QEMU user only instructions. Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 551928d..6c50485 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2872,6 +2872,21 @@ static inline void check_insn_opc_removed(DisasConte= xt *ctx, uint64_t flags) } } =20 +/* + * The Linux kernel traps certain reserved instruction exceptions to + * emulate the corresponding instructions. QEMU is the kernel in user + * mode, so those traps are emulated by accepting the instructions. + * + * A reserved instruction exception is generated for flagged CPUs if + * QEMU runs in system mode. + */ +static inline void check_insn_opc_user_only(DisasContext *ctx, uint64_t fl= ags) +{ +#ifndef CONFIG_USER_ONLY + check_insn_opc_removed(ctx, flags); +#endif +} + /* This code generates a "reserved instruction" exception if the CPU does not support 64-bit paired-single (PS) floating point data type= */ static inline void check_ps(DisasContext *ctx) @@ -23595,6 +23610,7 @@ static void decode_opc_special_legacy(CPUMIPSState = *env, DisasContext *ctx) case OPC_DDIV: case OPC_DDIVU: check_insn(ctx, ISA_MIPS3); + check_insn_opc_user_only(ctx, INSN_R5900); check_mips_64(ctx); gen_muldiv(ctx, op1, 0, rs, rt); break; @@ -26350,6 +26366,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) break; case OPC_LL: /* Load and stores */ check_insn(ctx, ISA_MIPS2); + check_insn_opc_user_only(ctx, INSN_R5900); /* Fallthrough */ case OPC_LWL: case OPC_LWR: @@ -26375,6 +26392,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) case OPC_SC: check_insn(ctx, ISA_MIPS2); check_insn_opc_removed(ctx, ISA_MIPS32R6); + check_insn_opc_user_only(ctx, INSN_R5900); gen_st_cond(ctx, op, rt, rs, imm); break; case OPC_CACHE: @@ -26641,9 +26659,11 @@ static void decode_opc(CPUMIPSState *env, DisasCon= text *ctx) =20 #if defined(TARGET_MIPS64) /* MIPS64 opcodes */ + case OPC_LLD: + check_insn_opc_user_only(ctx, INSN_R5900); + /* fall through */ case OPC_LDL: case OPC_LDR: - case OPC_LLD: check_insn_opc_removed(ctx, ISA_MIPS32R6); /* fall through */ case OPC_LWU: @@ -26664,6 +26684,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) case OPC_SCD: check_insn_opc_removed(ctx, ISA_MIPS32R6); check_insn(ctx, ISA_MIPS3); + check_insn_opc_user_only(ctx, INSN_R5900); check_mips_64(ctx); gen_st_cond(ctx, op, rt, rs, imm); break; --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389469109307.5388564258079; Wed, 24 Oct 2018 06:57:49 -0700 (PDT) Received: from localhost ([::1]:48599 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJfL-0003Qm-WD for importer@patchew.org; Wed, 24 Oct 2018 09:57:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60156) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQd-0005AS-6C for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQa-00020h-Vt for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49956 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001rw-Ox for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 0F27A1A4580; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id C27C21A458A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:36 +0200 Message-Id: <1540388447-27062-23-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 22/33] tests/tcg/mips: Add tests for R5900 three-operand MULT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MULT. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 25 +++++++++++++++++++++ tests/tcg/mips/mipsr5900/mult.c | 47 +++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 72 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/Makefile create mode 100644 tests/tcg/mips/mipsr5900/mult.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile new file mode 100644 index 0000000..6757168 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -0,0 +1,25 @@ +-include ../../config-host.mak + +CROSS=3Dmipsr5900el-unknown-linux-gnu- + +SIM=3Dqemu-mipsel +SIM_FLAGS=3D-cpu R5900 + +CC =3D $(CROSS)gcc +CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static + +TESTCASES =3D mult.tst + +all: $(TESTCASES) + +%.tst: %.c + $(CC) $(CFLAGS) $< -o $@ + +check: $(TESTCASES) + @for case in $(TESTCASES); do \ + echo $(SIM) $(SIM_FLAGS) ./$$case;\ + $(SIM) $(SIM_FLAGS) ./$$case; \ + done + +clean: + $(RM) -rf $(TESTCASES) diff --git a/tests/tcg/mips/mipsr5900/mult.c b/tests/tcg/mips/mipsr5900/mul= t.c new file mode 100644 index 0000000..2c0c16d --- /dev/null +++ b/tests/tcg/mips/mipsr5900/mult.c @@ -0,0 +1,47 @@ +/* + * Test R5900-specific three-operand MULT. + */ + +#include +#include +#include + +static int64_t mult(int32_t rs, int32_t rt) +{ + int32_t rd, lo, hi; + int64_t r; + + __asm__ __volatile__ ( + " mult %0, %3, %4\n" + " mflo %1\n" + " mfhi %2\n" + : "=3Dr" (rd), "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + r =3D ((int64_t)hi << 32) | (uint32_t)lo; + + assert((int64_t)rs * rt =3D=3D r); + assert(rd =3D=3D lo); + + return r; +} + +static void verify_mult_negations(int32_t rs, int32_t rt, int64_t expected) +{ + assert(mult(rs, rt) =3D=3D expected); + assert(mult(-rs, rt) =3D=3D -expected); + assert(mult(rs, -rt) =3D=3D -expected); + assert(mult(-rs, -rt) =3D=3D expected); +} + +int main() +{ + verify_mult_negations(17, 19, 323); + verify_mult_negations(77773, 99991, 7776600043); + verify_mult_negations(12207031, 305175781, 3725290219116211); + + assert(mult(-0x80000000, 0x7FFFFFFF) =3D=3D -0x3FFFFFFF80000000); + assert(mult(-0x80000000, -0x7FFFFFFF) =3D=3D 0x3FFFFFFF80000000); + assert(mult(-0x80000000, -0x80000000) =3D=3D 0x4000000000000000); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389956685353.8766212275706; Wed, 24 Oct 2018 07:05:56 -0700 (PDT) Received: from localhost ([::1]:48650 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJnH-0003K7-6U for importer@patchew.org; Wed, 24 Oct 2018 10:05:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60166) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQd-0005AZ-7S for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQa-00020S-RR for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49958 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001sZ-Jw for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 20D461A4596; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id CBF281A4575; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:37 +0200 Message-Id: <1540388447-27062-24-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 23/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MULTU. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/multu.c | 39 +++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 40 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/multu.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile index 6757168..b3ddb9a 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -9,6 +9,7 @@ CC =3D $(CROSS)gcc CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static =20 TESTCASES =3D mult.tst +TESTCASES +=3D multu.tst =20 all: $(TESTCASES) =20 diff --git a/tests/tcg/mips/mipsr5900/multu.c b/tests/tcg/mips/mipsr5900/mu= ltu.c new file mode 100644 index 0000000..3a59675 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/multu.c @@ -0,0 +1,39 @@ +/* + * Test R5900-specific three-operand MULTU. + */ + +#include +#include +#include + +static uint64_t multu(uint32_t rs, uint32_t rt) +{ + uint32_t rd, lo, hi; + uint64_t r; + + __asm__ __volatile__ ( + " multu %0, %3, %4\n" + " mflo %1\n" + " mfhi %2\n" + : "=3Dr" (rd), "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + r =3D ((uint64_t)hi << 32) | (uint32_t)lo; + + assert((uint64_t)rs * rt =3D=3D r); + assert(rd =3D=3D lo); + + return r; +} + +int main() +{ + assert(multu(17, 19) =3D=3D 323); + assert(multu(77773, 99991) =3D=3D 7776600043); + assert(multu(12207031, 305175781) =3D=3D 3725290219116211); + + assert(multu(0x80000000U, 0x7FFFFFFF) =3D=3D 0x3FFFFFFF80000000); + assert(multu(0x80000000U, 0x80000000U) =3D=3D 0x4000000000000000); + assert(multu(0xFFFFFFFFU, 0xFFFFFFFFU) =3D=3D 0xFFFFFFFE00000001U); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 154038905402099.26705287564732; Wed, 24 Oct 2018 06:50:54 -0700 (PDT) Received: from localhost ([::1]:48566 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJYi-0005KP-Ce for importer@patchew.org; Wed, 24 Oct 2018 09:50:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058n-4X for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zC-E2 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49959 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQW-0001sb-FM for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:25 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2FCBD1A2249; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id D50F11A457A; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:38 +0200 Message-Id: <1540388447-27062-25-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 24/33] tests/tcg/mips: Add tests for R5900 three-operand MULT1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MULT1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/mult.c | 45 +++++++++++++++++++++++++++++++++----= ---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/mult.c b/tests/tcg/mips/mipsr5900/mul= t.c index 2c0c16d..5710b39 100644 --- a/tests/tcg/mips/mipsr5900/mult.c +++ b/tests/tcg/mips/mipsr5900/mult.c @@ -1,5 +1,5 @@ /* - * Test R5900-specific three-operand MULT. + * Test R5900-specific three-operand MULT and MULT1. */ =20 #include @@ -25,12 +25,41 @@ static int64_t mult(int32_t rs, int32_t rt) return r; } =20 +static int64_t mult1(int32_t rs, int32_t rt) +{ + int32_t rd, lo, hi; + int64_t r; + + __asm__ __volatile__ ( + " mult1 %0, %3, %4\n" + " mflo1 %1\n" + " mfhi1 %2\n" + : "=3Dr" (rd), "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + r =3D ((int64_t)hi << 32) | (uint32_t)lo; + + assert((int64_t)rs * rt =3D=3D r); + assert(rd =3D=3D lo); + + return r; +} + +static int64_t mult_variants(int32_t rs, int32_t rt) +{ + int64_t rd =3D mult(rs, rt); + int64_t rd1 =3D mult1(rs, rt); + + assert(rd =3D=3D rd1); + + return rd; +} + static void verify_mult_negations(int32_t rs, int32_t rt, int64_t expected) { - assert(mult(rs, rt) =3D=3D expected); - assert(mult(-rs, rt) =3D=3D -expected); - assert(mult(rs, -rt) =3D=3D -expected); - assert(mult(-rs, -rt) =3D=3D expected); + assert(mult_variants(rs, rt) =3D=3D expected); + assert(mult_variants(-rs, rt) =3D=3D -expected); + assert(mult_variants(rs, -rt) =3D=3D -expected); + assert(mult_variants(-rs, -rt) =3D=3D expected); } =20 int main() @@ -39,9 +68,9 @@ int main() verify_mult_negations(77773, 99991, 7776600043); verify_mult_negations(12207031, 305175781, 3725290219116211); =20 - assert(mult(-0x80000000, 0x7FFFFFFF) =3D=3D -0x3FFFFFFF80000000); - assert(mult(-0x80000000, -0x7FFFFFFF) =3D=3D 0x3FFFFFFF80000000); - assert(mult(-0x80000000, -0x80000000) =3D=3D 0x4000000000000000); + assert(mult_variants(-0x80000000, 0x7FFFFFFF) =3D=3D -0x3FFFFFFF80000= 000); + assert(mult_variants(-0x80000000, -0x7FFFFFFF) =3D=3D 0x3FFFFFFF80000= 000); + assert(mult_variants(-0x80000000, -0x80000000) =3D=3D 0x4000000000000= 000); =20 return 0; } --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389572468334.18262651296914; Wed, 24 Oct 2018 06:59:32 -0700 (PDT) Received: from localhost ([::1]:48609 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJh1-0005PB-7I for importer@patchew.org; Wed, 24 Oct 2018 09:59:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60157) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQd-0005AT-6B for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zZ-Rw for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49960 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001se-Fi for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 3B36F1A452F; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id E11E01A458E; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:39 +0200 Message-Id: <1540388447-27062-26-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MULTU1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/multu.c | 43 +++++++++++++++++++++++++++++++++---= ---- 1 file changed, 36 insertions(+), 7 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/multu.c b/tests/tcg/mips/mipsr5900/mu= ltu.c index 3a59675..f043904 100644 --- a/tests/tcg/mips/mipsr5900/multu.c +++ b/tests/tcg/mips/mipsr5900/multu.c @@ -1,5 +1,5 @@ /* - * Test R5900-specific three-operand MULTU. + * Test R5900-specific three-operand MULTU and MULTU1. */ =20 #include @@ -25,15 +25,44 @@ static uint64_t multu(uint32_t rs, uint32_t rt) return r; } =20 +static uint64_t multu1(uint32_t rs, uint32_t rt) +{ + uint32_t rd, lo, hi; + uint64_t r; + + __asm__ __volatile__ ( + " multu1 %0, %3, %4\n" + " mflo1 %1\n" + " mfhi1 %2\n" + : "=3Dr" (rd), "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + r =3D ((uint64_t)hi << 32) | (uint32_t)lo; + + assert((uint64_t)rs * rt =3D=3D r); + assert(rd =3D=3D lo); + + return r; +} + +static uint64_t multu_variants(uint32_t rs, uint32_t rt) +{ + uint64_t rd =3D multu(rs, rt); + uint64_t rd1 =3D multu1(rs, rt); + + assert(rd =3D=3D rd1); + + return rd; +} + int main() { - assert(multu(17, 19) =3D=3D 323); - assert(multu(77773, 99991) =3D=3D 7776600043); - assert(multu(12207031, 305175781) =3D=3D 3725290219116211); + assert(multu_variants(17, 19) =3D=3D 323); + assert(multu_variants(77773, 99991) =3D=3D 7776600043); + assert(multu_variants(12207031, 305175781) =3D=3D 3725290219116211); =20 - assert(multu(0x80000000U, 0x7FFFFFFF) =3D=3D 0x3FFFFFFF80000000); - assert(multu(0x80000000U, 0x80000000U) =3D=3D 0x4000000000000000); - assert(multu(0xFFFFFFFFU, 0xFFFFFFFFU) =3D=3D 0xFFFFFFFE00000001U); + assert(multu_variants(0x80000000U, 0x7FFFFFFF) =3D=3D 0x3FFFFFFF800000= 00); + assert(multu_variants(0x80000000U, 0x80000000U) =3D=3D 0x400000000000= 0000); + assert(multu_variants(0xFFFFFFFFU, 0xFFFFFFFFU) =3D=3D 0xFFFFFFFE0000= 0001U); =20 return 0; } --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389233869745.2810206270225; Wed, 24 Oct 2018 06:53:53 -0700 (PDT) Received: from localhost ([::1]:48580 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJbc-0000Dl-5n for importer@patchew.org; Wed, 24 Oct 2018 09:53:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60090) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058m-3y for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zY-S0 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49961 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001sh-FM for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:26 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 464761A4592; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id EC9101A457C; Wed, 24 Oct 2018 15:40:54 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:40 +0200 Message-Id: <1540388447-27062-27-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 26/33] tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MFLO1 and MFHI1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 3 ++- tests/tcg/mips/mipsr5900/mflohi1.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/mips/mipsr5900/mflohi1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile index b3ddb9a..fd8ee6b 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -8,7 +8,8 @@ SIM_FLAGS=3D-cpu R5900 CC =3D $(CROSS)gcc CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static =20 -TESTCASES =3D mult.tst +TESTCASES =3D mflohi1.tst +TESTCASES +=3D mult.tst TESTCASES +=3D multu.tst =20 all: $(TESTCASES) diff --git a/tests/tcg/mips/mipsr5900/mflohi1.c b/tests/tcg/mips/mipsr5900/= mflohi1.c new file mode 100644 index 0000000..eed3683 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/mflohi1.c @@ -0,0 +1,35 @@ +/* + * Test R5900-specific MFLO1 and MFHI1. + */ + +#include +#include +#include + +int main() +{ + int32_t rs =3D 12207031, rt =3D 305175781; + int32_t rs1 =3D 32452867, rt1 =3D 49979687; + int64_t lo, hi, lo1, hi1; + int64_t r, r1; + + /* Test both LO/HI and LO1/HI1 to verify separation. */ + __asm__ __volatile__ ( + " mult $0, %4, %5\n" + " mult1 $0, %6, %7\n" + " mflo %0\n" + " mfhi %1\n" + " mflo1 %2\n" + " mfhi1 %3\n" + : "=3Dr" (lo), "=3Dr" (hi), + "=3Dr" (lo1), "=3Dr" (hi1) + : "r" (rs), "r" (rt), + "r" (rs1), "r" (rt1)); + r =3D ((int64_t)hi << 32) | (uint32_t)lo; + r1 =3D ((int64_t)hi1 << 32) | (uint32_t)lo1; + + assert(r =3D=3D 3725290219116211); + assert(r1 =3D=3D 1621984134912629); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15403899539381023.2639803285929; Wed, 24 Oct 2018 07:05:53 -0700 (PDT) Received: from localhost ([::1]:48649 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJnE-0003HQ-JI for importer@patchew.org; Wed, 24 Oct 2018 10:05:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60233) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005GD-DX for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQa-00020c-Vh for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:35 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49963 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001sm-R3 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 6B1E01A457A; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 02E851A4581; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:41 +0200 Message-Id: <1540388447-27062-28-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 27/33] tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for MTLO1 and MTHI1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/mtlohi1.c | 40 ++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 41 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/mtlohi1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile index fd8ee6b..287c248 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -9,6 +9,7 @@ CC =3D $(CROSS)gcc CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static =20 TESTCASES =3D mflohi1.tst +TESTCASES +=3D mtlohi1.tst TESTCASES +=3D mult.tst TESTCASES +=3D multu.tst =20 diff --git a/tests/tcg/mips/mipsr5900/mtlohi1.c b/tests/tcg/mips/mipsr5900/= mtlohi1.c new file mode 100644 index 0000000..7f3e728 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/mtlohi1.c @@ -0,0 +1,40 @@ +/* + * Test R5900-specific MTLO1 and MTHI1. + */ + +#include +#include +#include + +int main() +{ + int32_t tlo =3D 12207031, thi =3D 305175781; + int32_t tlo1 =3D 32452867, thi1 =3D 49979687; + int32_t flo, fhi, flo1, fhi1; + + /* Test both LO/HI and LO1/HI1 to verify separation. */ + __asm__ __volatile__ ( + " mtlo %4\n" + " mthi %5\n" + " mtlo1 %6\n" + " mthi1 %7\n" + " move %0, $0\n" + " move %1, $0\n" + " move %2, $0\n" + " move %3, $0\n" + " mflo %0\n" + " mfhi %1\n" + " mflo1 %2\n" + " mfhi1 %3\n" + : "=3Dr" (flo), "=3Dr" (fhi), + "=3Dr" (flo1), "=3Dr" (fhi1) + : "r" (tlo), "r" (thi), + "r" (tlo1), "r" (thi1)); + + assert(flo =3D=3D 12207031); + assert(fhi =3D=3D 305175781); + assert(flo1 =3D=3D 32452867); + assert(fhi1 =3D=3D 49979687); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389771806375.84466287800944; Wed, 24 Oct 2018 07:02:51 -0700 (PDT) Received: from localhost ([::1]:48633 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJkH-0008OY-U6 for importer@patchew.org; Wed, 24 Oct 2018 10:02:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60232) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005GC-Di for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQd-00023L-3P for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:35 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49962 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQa-0001sp-S0 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 595731A4599; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 0CEEB1A4585; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:42 +0200 Message-Id: <1540388447-27062-29-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 28/33] tests/tcg/mips: Add tests for R5900 DIV1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for DIV1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 3 +- tests/tcg/mips/mipsr5900/div1.c | 73 +++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 75 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/mips/mipsr5900/div1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile index 287c248..757eb83 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -8,7 +8,8 @@ SIM_FLAGS=3D-cpu R5900 CC =3D $(CROSS)gcc CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static =20 -TESTCASES =3D mflohi1.tst +TESTCASES =3D div1.tst +TESTCASES +=3D mflohi1.tst TESTCASES +=3D mtlohi1.tst TESTCASES +=3D mult.tst TESTCASES +=3D multu.tst diff --git a/tests/tcg/mips/mipsr5900/div1.c b/tests/tcg/mips/mipsr5900/div= 1.c new file mode 100644 index 0000000..83dafa0 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/div1.c @@ -0,0 +1,73 @@ +/* + * Test R5900-specific DIV1. + */ + +#include +#include +#include + +struct quotient_remainder { int32_t quotient, remainder; }; + +static struct quotient_remainder div1(int32_t rs, int32_t rt) +{ + int32_t lo, hi; + + __asm__ __volatile__ ( + " div1 $0, %2, %3\n" + " mflo1 %0\n" + " mfhi1 %1\n" + : "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + + assert(rs / rt =3D=3D lo); + assert(rs % rt =3D=3D hi); + + return (struct quotient_remainder) { .quotient =3D lo, .remainder =3D = hi }; +} + +static void verify_div1(int32_t rs, int32_t rt, + int32_t expected_quotient, + int32_t expected_remainder) +{ + struct quotient_remainder qr =3D div1(rs, rt); + + assert(qr.quotient =3D=3D expected_quotient); + assert(qr.remainder =3D=3D expected_remainder); +} + +static void verify_div1_negations(int32_t rs, int32_t rt, + int32_t expected_quotient, + int32_t expected_remainder) +{ + verify_div1(rs, rt, expected_quotient, expected_remainder); + verify_div1(rs, -rt, -expected_quotient, expected_remainder); + verify_div1(-rs, rt, -expected_quotient, -expected_remainder); + verify_div1(-rs, -rt, expected_quotient, -expected_remainder); +} + +int main() +{ + verify_div1_negations(0, 1, 0, 0); + verify_div1_negations(1, 1, 1, 0); + verify_div1_negations(1, 2, 0, 1); + verify_div1_negations(17, 19, 0, 17); + verify_div1_negations(19, 17, 1, 2); + verify_div1_negations(77773, 101, 770, 3); + + verify_div1(-0x80000000, 1, -0x80000000, 0); + + /* + * Supplementary explanation from the Toshiba TX System RISC TX79 Core + * Architecture manual, A-38 and B-7, https://wiki.qemu.org/File:C790.= pdf + * + * Normally, when 0x80000000 (-2147483648) the signed minimum value is + * divided by 0xFFFFFFFF (-1), the operation will result in an overflo= w. + * However, in this instruction an overflow exception doesn't occur and + * the result will be as follows: + * + * Quotient is 0x80000000 (-2147483648), and remainder is 0x00000000 (= 0). + */ + verify_div1(-0x80000000, -1, -0x80000000, 0); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540388860349463.5446173429732; Wed, 24 Oct 2018 06:47:40 -0700 (PDT) Received: from localhost ([::1]:48551 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJVX-00022E-DF for importer@patchew.org; Wed, 24 Oct 2018 09:47:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60089) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQb-00058l-3p for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQY-0001zI-F9 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49965 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQW-0001st-H5 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:25 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 94BA71A4581; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 162071A4587; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:43 +0200 Message-Id: <1540388447-27062-30-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 29/33] tests/tcg/mips: Add tests for R5900 DIVU1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add a test for DIVU1. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/divu1.c | 48 +++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 49 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/divu1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/M= akefile index 757eb83..a1c388b 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -9,6 +9,7 @@ CC =3D $(CROSS)gcc CFLAGS =3D -Wall -mabi=3D32 -march=3Dr5900 -static =20 TESTCASES =3D div1.tst +TESTCASES +=3D divu1.tst TESTCASES +=3D mflohi1.tst TESTCASES +=3D mtlohi1.tst TESTCASES +=3D mult.tst diff --git a/tests/tcg/mips/mipsr5900/divu1.c b/tests/tcg/mips/mipsr5900/di= vu1.c new file mode 100644 index 0000000..72aeed3 --- /dev/null +++ b/tests/tcg/mips/mipsr5900/divu1.c @@ -0,0 +1,48 @@ +/* + * Test R5900-specific DIVU1. + */ + +#include +#include +#include + +struct quotient_remainder { uint32_t quotient, remainder; }; + +static struct quotient_remainder divu1(uint32_t rs, uint32_t rt) +{ + uint32_t lo, hi; + + __asm__ __volatile__ ( + " divu1 $0, %2, %3\n" + " mflo1 %0\n" + " mfhi1 %1\n" + : "=3Dr" (lo), "=3Dr" (hi) + : "r" (rs), "r" (rt)); + + assert(rs / rt =3D=3D lo); + assert(rs % rt =3D=3D hi); + + return (struct quotient_remainder) { .quotient =3D lo, .remainder =3D = hi }; +} + +static void verify_divu1(uint32_t rs, uint32_t rt, + uint32_t expected_quotient, + uint32_t expected_remainder) +{ + struct quotient_remainder qr =3D divu1(rs, rt); + + assert(qr.quotient =3D=3D expected_quotient); + assert(qr.remainder =3D=3D expected_remainder); +} + +int main() +{ + verify_divu1(0, 1, 0, 0); + verify_divu1(1, 1, 1, 0); + verify_divu1(1, 2, 0, 1); + verify_divu1(17, 19, 0, 17); + verify_divu1(19, 17, 1, 2); + verify_divu1(77773, 101, 770, 3); + + return 0; +} --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389405689768.2411002042699; Wed, 24 Oct 2018 06:56:45 -0700 (PDT) Received: from localhost ([::1]:48597 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJeO-0002bZ-Cd for importer@patchew.org; Wed, 24 Oct 2018 09:56:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60160) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQd-0005AV-6M for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQa-00020m-Vg for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49966 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQY-0001ss-MU for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:28 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8244C1A457C; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 27CB31A4594; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:44 +0200 Message-Id: <1540388447-27062-31-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 30/33] target/mips: Define the R5900 CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring The primary purpose of this change is to support programs compiled by GCC for the R5900 target and thereby run R5900 Linux distributions, for example Gentoo. GCC in version 7.3, by itself, by inspection of the GCC source code and inspection of the generated machine code, for the R5900 target, only emits two instructions that are specific to the R5900: the three- operand MULT and MULTU. GCC and libc also emit certain MIPS III instructions that are not part of the R5900 ISA. They are normally trapped and emulated by the Linux kernel, and therefore need to be treated accordingly by QEMU. A program compiled by GCC is taken to mean source code compiled by GCC under the restrictions above. One can, with the apparent limitations, with a bit of effort obtain a fully functioning operating system such as R5900 Gentoo. Strictly speaking, programs need not be compiled by GCC to make use of this change. Instructions and other facilities of the R5900 not implemented by this change are intended to signal provisional exceptions. One such example is the FPU that is not compliant with IEEE 754-1985 in system mode. It is therefore provisionally disabled. In user space the FPU is trapped and emulated by IEEE 754-1985 compliant software in the kernel, and this is handled accordingly by QEMU. Another example is the 93 multimedia instructions specific to the R5900 that generate provisional reserved instruction exception signals. One of the benefits of running a Linux distribution under QEMU is that programs can be compiled with a native compiler, where the host and target are the same, as opposed to a cross-compiler, where they are not the same. This is especially important in cases where the target hardware does not have the resources to run a native compiler. Problems with cross-compilation are often related to host and target differences in integer sizes, pointer sizes, endianness, machine code, ABI, etc. Sometimes cross-compilation is not even supported by the build script for a given package. One effective way to avoid those problems is to replace the cross-compiler with a native compiler. This change of compilation methods does not resolve the inherent problems with cross-compilation. The native compiler naturally replaces the cross-compiler, because one typically uses one or the other, and preferably the native compiler when the circumstances admit this. The native compiler is also a good test case for the R5900 QEMU user mode. Additionally, Gentoo is well- known for compiling and installing its packages from sources. This change has been tested with Gentoo compiled for R5900, including native compilation of several packages under QEMU. Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate_init.inc.c | 59 ++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 59 insertions(+) diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.= inc.c index acab097..85da4a2 100644 --- a/target/mips/translate_init.inc.c +++ b/target/mips/translate_init.inc.c @@ -411,6 +411,65 @@ const mips_def_t mips_defs[] =3D .mmu_type =3D MMU_TYPE_R4000, }, { + /* + * The Toshiba TX System RISC TX79 Core Architecture manual + * + * https://wiki.qemu.org/File:C790.pdf + * + * describes the C790 processor that is a follow-up to the R5900. + * There are a few notable differences in that the R5900 FPU + * + * - is not IEEE 754-1985 compliant, + * - does not implement double format, and + * - its machine code is nonstandard. + */ + .name =3D "R5900", + .CP0_PRid =3D 0x00002E00, + /* No L2 cache, icache size 32k, dcache size 32k, uncached coheren= cy. */ + .CP0_Config0 =3D (0x3 << 9) | (0x3 << 6) | (0x2 << CP0C0_K0), + .CP0_Status_rw_bitmask =3D 0xF4C79C1F, +#ifdef CONFIG_USER_ONLY + /* + * R5900 hardware traps to the Linux kernel for IEEE 754-1985 and = LL/SC + * emulation. For user only, QEMU is the kernel, so we emulate the= traps + * by simply emulating the instructions directly. + * + * Note: Config1 is only used internally, the R5900 has only Confi= g0. + */ + .CP0_Config1 =3D (1 << CP0C1_FP) | (47 << CP0C1_MMU), + .CP0_LLAddr_rw_bitmask =3D 0xFFFFFFFF, + .CP0_LLAddr_shift =3D 4, + .CP1_fcr0 =3D (0x38 << FCR0_PRID) | (0x0 << FCR0_REV), + .CP1_fcr31 =3D 0, + .CP1_fcr31_rw_bitmask =3D 0x0183FFFF, +#else + /* + * The R5900 COP1 FPU implements single-precision floating-point + * operations but is not entirely IEEE 754-1985 compatible. In + * particular, + * + * - NaN (not a number) and +/- infinities are not supported; + * - exception mechanisms are not fully supported; + * - denormalized numbers are not supported; + * - rounding towards nearest and +/- infinities are not supported; + * - computed results usually differs in the least significant bit; + * - saturations can differ more than the least significant bit. + * + * Since only rounding towards zero is supported, the two least + * significant bits of FCR31 are hardwired to 01. + * + * FPU emulation is disabled here until it is implemented. + * + * Note: Config1 is only used internally, the R5900 has only Confi= g0. + */ + .CP0_Config1 =3D (47 << CP0C1_MMU), +#endif /* !CONFIG_USER_ONLY */ + .SEGBITS =3D 32, + .PABITS =3D 32, + .insn_flags =3D CPU_R5900 | ASE_MMI, + .mmu_type =3D MMU_TYPE_R4000, + }, + { /* A generic CPU supporting MIPS32 Release 6 ISA. FIXME: Support IEEE 754-2008 FP. Eventually this should be replaced by a real CPU model. = */ --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540389762019693.652042879904; Wed, 24 Oct 2018 07:02:42 -0700 (PDT) Received: from localhost ([::1]:48631 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJk8-0008Ho-05 for importer@patchew.org; Wed, 24 Oct 2018 10:02:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60224) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005G1-81 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQd-00022w-2s for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:33 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49967 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQa-0001t1-Sk for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 900401A4589; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 338AC1A452A; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:45 +0200 Message-Id: <1540388447-27062-32-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 31/33] linux-user/mips: Recognize the R5900 CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU. The R5900 FPU hardware is noncompliant and it is therefore emulated in software by the Linux kernel. QEMU emulates a compliant FPU accordingly. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- linux-user/mips/target_elf.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index fa5d30b..a98c9bd 100644 --- a/linux-user/mips/target_elf.h +++ b/linux-user/mips/target_elf.h @@ -12,6 +12,9 @@ static inline const char *cpu_get_model(uint32_t eflags) if ((eflags & EF_MIPS_ARCH) =3D=3D EF_MIPS_ARCH_32R6) { return "mips32r6-generic"; } + if ((eflags & EF_MIPS_MACH) =3D=3D EF_MIPS_MACH_5900) { + return "R5900"; + } return "24Kf"; } #endif --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390244223337.40962213847126; Wed, 24 Oct 2018 07:10:44 -0700 (PDT) Received: from localhost ([::1]:48677 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJrr-00081Q-4x for importer@patchew.org; Wed, 24 Oct 2018 10:10:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60222) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQh-0005Fz-7o for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQd-000234-2f for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:33 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:49968 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQa-0001t2-Um for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:30 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A188C1A458A; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3D0BF1A4575; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:46 +0200 Message-Id: <1540388447-27062-33-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 32/33] target/mips: Fix the title of translate.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Replace MIPS32 with MIPS, since the file covers all generations of MIPS architectures. Reviewed-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 6c50485..fa29c1e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1,5 +1,5 @@ /* - * MIPS32 emulation for qemu: main translation routines. + * MIPS emulation for QEMU - main translation routines * * Copyright (c) 2004-2005 Jocelyn Mayer * Copyright (c) 2006 Marius Groeger (FPU operations) --=20 2.7.4 From nobody Thu Nov 6 08:26:15 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540390356479918.988724078465; Wed, 24 Oct 2018 07:12:36 -0700 (PDT) Received: from localhost ([::1]:48682 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJtc-0000ln-9E for importer@patchew.org; Wed, 24 Oct 2018 10:12:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60304) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFJQk-0005JQ-HY for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFJQi-00026R-D1 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:38 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:50093 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFJQi-0001yd-0A for qemu-devel@nongnu.org; Wed, 24 Oct 2018 09:42:36 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A87301A452A; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 456D81A4590; Wed, 24 Oct 2018 15:40:55 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 15:40:47 +0200 Message-Id: <1540388447-27062-34-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540388447-27062-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 33/33] target/mips: Fix decoding of ALIGN and DALIGN instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Opcode for ALIGN and DALIGN must be in fact ranges of opcodes, to allow paremeter 'bp' to occupy two and three bits, respectively. Reviewed-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 40 ++++++++++++++++++++++++++++++++-------- 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index fa29c1e..c44a751 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -463,8 +463,10 @@ enum { OPC_WSBH =3D (0x02 << 6) | OPC_BSHFL, OPC_SEB =3D (0x10 << 6) | OPC_BSHFL, OPC_SEH =3D (0x18 << 6) | OPC_BSHFL, - OPC_ALIGN =3D (0x08 << 6) | OPC_BSHFL, /* 010.bp */ - OPC_ALIGN_END =3D (0x0B << 6) | OPC_BSHFL, /* 010.00 to 010.11 */ + OPC_ALIGN =3D (0x08 << 6) | OPC_BSHFL, /* 010.bp (010.00 to 010.11= ) */ + OPC_ALIGN_1 =3D (0x09 << 6) | OPC_BSHFL, + OPC_ALIGN_2 =3D (0x0A << 6) | OPC_BSHFL, + OPC_ALIGN_3 =3D (0x0B << 6) | OPC_BSHFL, OPC_BITSWAP =3D (0x00 << 6) | OPC_BSHFL /* 00000 */ }; =20 @@ -474,8 +476,14 @@ enum { enum { OPC_DSBH =3D (0x02 << 6) | OPC_DBSHFL, OPC_DSHD =3D (0x05 << 6) | OPC_DBSHFL, - OPC_DALIGN =3D (0x08 << 6) | OPC_DBSHFL, /* 01.bp */ - OPC_DALIGN_END =3D (0x0F << 6) | OPC_DBSHFL, /* 01.000 to 01.111 */ + OPC_DALIGN =3D (0x08 << 6) | OPC_DBSHFL, /* 01.bp (01.000 to 01.11= 1) */ + OPC_DALIGN_1 =3D (0x09 << 6) | OPC_DBSHFL, + OPC_DALIGN_2 =3D (0x0A << 6) | OPC_DBSHFL, + OPC_DALIGN_3 =3D (0x0B << 6) | OPC_DBSHFL, + OPC_DALIGN_4 =3D (0x0C << 6) | OPC_DBSHFL, + OPC_DALIGN_5 =3D (0x0D << 6) | OPC_DBSHFL, + OPC_DALIGN_6 =3D (0x0E << 6) | OPC_DBSHFL, + OPC_DALIGN_7 =3D (0x0F << 6) | OPC_DBSHFL, OPC_DBITSWAP =3D (0x00 << 6) | OPC_DBSHFL, /* 00000 */ }; =20 @@ -23957,7 +23965,9 @@ static void decode_opc_special3_r6(CPUMIPSState *en= v, DisasContext *ctx) op2 =3D MASK_BSHFL(ctx->opcode); switch (op2) { case OPC_ALIGN: - case OPC_ALIGN_END: + case OPC_ALIGN_1: + case OPC_ALIGN_2: + case OPC_ALIGN_3: gen_align(ctx, 32, rd, rs, rt, sa & 3); break; case OPC_BITSWAP: @@ -23983,7 +23993,13 @@ static void decode_opc_special3_r6(CPUMIPSState *e= nv, DisasContext *ctx) op2 =3D MASK_DBSHFL(ctx->opcode); switch (op2) { case OPC_DALIGN: - case OPC_DALIGN_END: + case OPC_DALIGN_1: + case OPC_DALIGN_2: + case OPC_DALIGN_3: + case OPC_DALIGN_4: + case OPC_DALIGN_5: + case OPC_DALIGN_6: + case OPC_DALIGN_7: gen_align(ctx, 64, rd, rs, rt, sa & 7); break; case OPC_DBITSWAP: @@ -24843,7 +24859,9 @@ static void decode_opc_special3(CPUMIPSState *env, = DisasContext *ctx) op2 =3D MASK_BSHFL(ctx->opcode); switch (op2) { case OPC_ALIGN: - case OPC_ALIGN_END: + case OPC_ALIGN_1: + case OPC_ALIGN_2: + case OPC_ALIGN_3: case OPC_BITSWAP: check_insn(ctx, ISA_MIPS32R6); decode_opc_special3_r6(env, ctx); @@ -24869,7 +24887,13 @@ static void decode_opc_special3(CPUMIPSState *env,= DisasContext *ctx) op2 =3D MASK_DBSHFL(ctx->opcode); switch (op2) { case OPC_DALIGN: - case OPC_DALIGN_END: + case OPC_DALIGN_1: + case OPC_DALIGN_2: + case OPC_DALIGN_3: + case OPC_DALIGN_4: + case OPC_DALIGN_5: + case OPC_DALIGN_6: + case OPC_DALIGN_7: case OPC_DBITSWAP: check_insn(ctx, ISA_MIPS32R6); decode_opc_special3_r6(env, ctx); --=20 2.7.4