From nobody Thu Nov 6 10:28:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540384613129907.2355956565926; Wed, 24 Oct 2018 05:36:53 -0700 (PDT) Received: from localhost ([::1]:48167 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFIP5-0006L2-9f for importer@patchew.org; Wed, 24 Oct 2018 08:36:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59623) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFIAb-0002Ay-Di for qemu-devel@nongnu.org; Wed, 24 Oct 2018 08:21:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFIAa-0004Cu-HS for qemu-devel@nongnu.org; Wed, 24 Oct 2018 08:21:53 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:42232 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFIAa-0004BS-87 for qemu-devel@nongnu.org; Wed, 24 Oct 2018 08:21:52 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id B98D71A450E; Wed, 24 Oct 2018 14:21:49 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 89DBE1A497D; Wed, 24 Oct 2018 14:21:33 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Wed, 24 Oct 2018 14:18:42 +0200 Message-Id: <1540383527-7923-16-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540383527-7923-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540383527-7923-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v7 15/20] target/mips: Add emulation of MXU instruction D16MUL X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jancraig@amazon.com, smarkovic@wavecomp.com, richard.henderson@linaro.org, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Craig Janeczek Add support for emulating the D16MUL MXU instruction. Signed-off-by: Craig Janeczek Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Markovic --- target/mips/translate.c | 66 +++++++++++++++++++++++++++++++++++++++++++++= +--- 1 file changed, 63 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index a9915c4..fec5163 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24040,6 +24040,68 @@ static void gen_mxu_s8ldd(DisasContext *ctx) tcg_temp_free(t1); } =20 +/* + * D16MUL XRa, XRb, XRc, XRd, optn2 - Signed 16 bit pattern multiplication + */ +static void gen_mxu_d16mul(DisasContext *ctx) +{ + TCGv t0, t1, t2, t3; + TCGLabel *l0; + uint32_t XRa, XRb, XRc, XRd, optn2; + + t0 =3D tcg_temp_new(); + t1 =3D tcg_temp_new(); + t2 =3D tcg_temp_new(); + t3 =3D tcg_temp_new(); + + l0 =3D gen_new_label(); + + XRa =3D extract32(ctx->opcode, 6, 4); + XRb =3D extract32(ctx->opcode, 10, 4); + XRc =3D extract32(ctx->opcode, 14, 4); + XRd =3D extract32(ctx->opcode, 18, 4); + optn2 =3D extract32(ctx->opcode, 22, 2); + + gen_load_mxu_cr(t0); + tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN); + tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0); + + gen_load_mxu_gpr(t1, XRb); + tcg_gen_sextract_tl(t0, t1, 0, 16); + tcg_gen_sextract_tl(t1, t1, 16, 16); + gen_load_mxu_gpr(t3, XRc); + tcg_gen_sextract_tl(t2, t3, 0, 16); + tcg_gen_sextract_tl(t3, t3, 16, 16); + + switch (optn2) { + case MXU_OPTN2_WW: /* XRB.H*XRC.H =3D=3D lop, XRB.L*XRC.L =3D=3D rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_LW: /* XRB.L*XRC.H =3D=3D lop, XRB.L*XRC.L =3D=3D rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_HW: /* XRB.H*XRC.H =3D=3D lop, XRB.H*XRC.L =3D=3D rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + case MXU_OPTN2_XW: /* XRB.L*XRC.H =3D=3D lop, XRB.H*XRC.L =3D=3D rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + } + gen_store_mxu_gpr(t3, XRa); + gen_store_mxu_gpr(t2, XRd); + + gen_set_label(l0); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + tcg_temp_free(t3); +} + =20 /* * Decoding engine for MXU @@ -24999,9 +25061,7 @@ static void decode_opc_mxu(CPUMIPSState *env, Disas= Context *ctx) decode_opc_mxu__pool02(env, ctx); break; case OPC_MXU_D16MUL: - /* TODO: Implement emulation of D16MUL instruction. */ - MIPS_INVAL("OPC_MXU_D16MUL"); - generate_exception_end(ctx, EXCP_RI); + gen_mxu_d16mul(ctx); break; case OPC_MXU__POOL03: decode_opc_mxu__pool03(env, ctx); --=20 2.7.4