From nobody Thu Nov 6 10:37:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540213602698945.215272957656; Mon, 22 Oct 2018 06:06:42 -0700 (PDT) Received: from localhost ([::1]:34936 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEZum-0007dq-Ny for importer@patchew.org; Mon, 22 Oct 2018 09:06:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45856) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEZmc-0008O2-K4 for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEZmZ-000849-7L for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:10 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:33333 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gEZmY-00083B-Rq for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:07 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id CACE81A22AA; Mon, 22 Oct 2018 14:58:03 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 9C60D1A21A9; Mon, 22 Oct 2018 14:58:03 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 22 Oct 2018 14:57:31 +0200 Message-Id: <1540213077-15211-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540213077-15211-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540213077-15211-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 08/34] target/mips: Define R5900 MMI2 opcode constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 48 +++++++++++++++++++++++++++++++++++++++++++++= +++ 1 file changed, 48 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index e233b87..bd51443 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2275,6 +2275,54 @@ enum { TX79_MMI1_QFSRV =3D (0x1B << 6) | TX79_MMI_CLASS_MMI1, }; =20 +/* + * TX79 Multimedia Instructions with opcode field =3D MMI and bits 5..0 = =3D MMI2: + * + * 31 26 10 6 5 0 + * +--------+----------------------+--------+--------+ + * | MMI | |function| MMI2 | + * +--------+----------------------+--------+--------+ + * + * function bits 7..6 + * bits | 0 | 1 | 2 | 3 + * 10..8 | 00 | 01 | 10 | 11 + * -------+-------+-------+-------+------- + * 0 000 | PMADDW| * | PSLLVW| PSRLVW + * 1 001 | PMSUBW| * | * | * + * 2 010 | PMFHI | PMFLO | PINTH | * + * 3 011 | PMULTW| PDIVW | PCPYLD| * + * 4 100 | PMADDH| PHMADH| PAND | PXOR + * 5 101 | PMSUBH| PHMSBH| * | * + * 6 110 | * | * | PEXEH | PREVH + * 7 111 | PMULTH| PDIVBW| PEXEW | PROT3W + */ + +#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF)) +enum { + TX79_MMI2_PMADDW =3D (0x00 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PSLLVW =3D (0x02 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PSRLVW =3D (0x03 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMSUBW =3D (0x04 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMFHI =3D (0x08 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMFLO =3D (0x09 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PINTH =3D (0x0A << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMULTW =3D (0x0C << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PDIVW =3D (0x0D << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PCPYLD =3D (0x0E << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMADDH =3D (0x10 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PHMADH =3D (0x11 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PAND =3D (0x12 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PXOR =3D (0x13 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMSUBH =3D (0x14 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PHMSBH =3D (0x15 << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PEXEH =3D (0x1A << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PREVH =3D (0x1B << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PMULTH =3D (0x1C << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PDIVBW =3D (0x1D << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PEXEW =3D (0x1E << 6) | TX79_MMI_CLASS_MMI2, + TX79_MMI2_PROT3W =3D (0x1F << 6) | TX79_MMI_CLASS_MMI2, +}; + /* global register indices */ static TCGv cpu_gpr[32], cpu_PC; static TCGv cpu_HI[MIPS_DSP_ACC], cpu_LO[MIPS_DSP_ACC]; --=20 2.7.4