From nobody Thu Nov 6 10:28:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1540214321445554.0914124712372; Mon, 22 Oct 2018 06:18:41 -0700 (PDT) Received: from localhost ([::1]:35016 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEa6S-0003tW-4y for importer@patchew.org; Mon, 22 Oct 2018 09:18:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46025) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gEZmp-0000Bg-J6 for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gEZmo-0008Bp-0Q for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:23 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:33439 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gEZmk-00084f-H7 for qemu-devel@nongnu.org; Mon, 22 Oct 2018 08:58:20 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 4C9D41A4154; Mon, 22 Oct 2018 14:58:04 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 080F01A22B0; Mon, 22 Oct 2018 14:58:04 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 22 Oct 2018 14:57:43 +0200 Message-Id: <1540213077-15211-21-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540213077-15211-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540213077-15211-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL 20/34] target/mips: Support R5900 DIV1 and DIVU1 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fredrik Noring Add support for DIV1 and DIVU1 instructions. Reviewed-by: Aleksandar Markovic Signed-off-by: Fredrik Noring Signed-off-by: Aleksandar Markovic --- disas/mips.c | 4 ++++ target/mips/translate.c | 12 +++++++++--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index c29817f..a3206e0 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2323,6 +2323,8 @@ const struct mips_opcode mips_builtin_opcodes[] =3D {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, 0,= I1 }, {"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, 0, I1 }, {"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, 0, I1 }, +{"div1", "z,s,t", 0x7000001a, 0xfc00ffff, RD_s | RD_t | WR_HILO, 0, EE= }, +{"div1", "z,t", 0x7000001a, 0xffe0ffff, RD_s | RD_t | WR_HILO, 0, EE= }, {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, 0, I1 }, {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, 0, I1 }, {"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, 0, SB1 = }, @@ -2331,6 +2333,8 @@ const struct mips_opcode mips_builtin_opcodes[] =3D {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, 0,= I1 }, {"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, 0, I1 }, {"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, 0, I1 }, +{"divu1", "z,s,t", 0x7000001b, 0xfc00ffff, RD_s | RD_t | WR_HILO, 0, EE= }, +{"divu1", "z,t", 0x7000001b, 0xffe0ffff, RD_s | WR_HILO , 0, EE= }, {"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, 0, I3 }, {"dlca", "t,A(b)", 0, (int) M_DLCA_AB, INSN_MACRO, 0, I3 }, {"dli", "t,j", 0x24000000, 0xffe00000, WR_t, 0, I3 }, /* addiu= */ diff --git a/target/mips/translate.c b/target/mips/translate.c index d7d7145..f2aeaf4 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4593,11 +4593,14 @@ static void gen_muldiv(DisasContext *ctx, uint32_t = opc, gen_load_gpr(t1, rt); =20 if (acc !=3D 0) { - check_dsp(ctx); + if (!(ctx->insn_flags & INSN_R5900)) { + check_dsp(ctx); + } } =20 switch (opc) { case OPC_DIV: + case TX79_MMI_DIV1: { TCGv t2 =3D tcg_temp_new(); TCGv t3 =3D tcg_temp_new(); @@ -4619,6 +4622,7 @@ static void gen_muldiv(DisasContext *ctx, uint32_t op= c, } break; case OPC_DIVU: + case TX79_MMI_DIVU1: { TCGv t2 =3D tcg_const_tl(0); TCGv t3 =3D tcg_const_tl(1); @@ -24665,6 +24669,10 @@ static void decode_tx79_mmi(CPUMIPSState *env, Dis= asContext *ctx) case TX79_MMI_MULTU1: gen_mul_txx9(ctx, opc, rd, rs, rt); break; + case TX79_MMI_DIV1: + case TX79_MMI_DIVU1: + gen_muldiv(ctx, opc, 1, rs, rt); + break; case TX79_MMI_MTLO1: case TX79_MMI_MTHI1: gen_HILO(ctx, opc, 1, rs); @@ -24676,8 +24684,6 @@ static void decode_tx79_mmi(CPUMIPSState *env, Disa= sContext *ctx) case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_DIV1: /* TODO: TX79_MMI_DIV1 */ - case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */ case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */ case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */ case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */ --=20 2.7.4