From nobody Tue Feb 10 01:32:40 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1539363141151839.8770635785698; Fri, 12 Oct 2018 09:52:21 -0700 (PDT) Received: from localhost ([::1]:41678 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB0fg-0007AA-9G for importer@patchew.org; Fri, 12 Oct 2018 12:52:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gB0XZ-0001AU-Fj for qemu-devel@nongnu.org; Fri, 12 Oct 2018 12:43:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gB0XW-00059x-2D for qemu-devel@nongnu.org; Fri, 12 Oct 2018 12:43:53 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:46856 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gB0XV-00057w-Lm for qemu-devel@nongnu.org; Fri, 12 Oct 2018 12:43:49 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 39C561A4142; Fri, 12 Oct 2018 18:43:48 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 0D6BB1A4131; Fri, 12 Oct 2018 18:43:48 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 12 Oct 2018 18:39:26 +0200 Message-Id: <1539362376-12010-19-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539362376-12010-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1539362376-12010-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 18/28] target/mips: Add availability control for DSP R3 ASE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add infrastructure for availability control for DSP R3 ASE MIPS instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but this is likely to be changed in near future. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/internal.h | 11 ++++++++--- target/mips/translate.c | 13 ++++++++++++- target/mips/translate_init.inc.c | 3 ++- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 54bf39f..e367d7e 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -310,8 +310,8 @@ static inline void compute_hflags(CPUMIPSState *env) env->hflags &=3D ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU | MIPS_HFLAG_AWRAP | MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2 | - MIPS_HFLAG_SBRI | MIPS_HFLAG_MSA | MIPS_HFLAG_FRE | - MIPS_HFLAG_ELPA | MIPS_HFLAG_ERL); + MIPS_HFLAG_DSPR3 | MIPS_HFLAG_SBRI | MIPS_HFLAG_MSA | + MIPS_HFLAG_FRE | MIPS_HFLAG_ELPA | MIPS_HFLAG_ERL); if (env->CP0_Status & (1 << CP0St_ERL)) { env->hflags |=3D MIPS_HFLAG_ERL; } @@ -358,7 +358,12 @@ static inline void compute_hflags(CPUMIPSState *env) (env->CP0_Config5 & (1 << CP0C5_SBRI))) { env->hflags |=3D MIPS_HFLAG_SBRI; } - if (env->insn_flags & ASE_DSPR2) { + if (env->insn_flags & ASE_DSPR3) { + if (env->CP0_Status & (1 << CP0St_MX)) { + env->hflags |=3D MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2 | + MIPS_HFLAG_DSPR3; + } + } else if (env->insn_flags & ASE_DSPR2) { /* Enables access MIPS DSP resources, now our cpu is DSP ASER2, so enable to access DSPR2 resources. */ if (env->CP0_Status & (1 << CP0St_MX)) { diff --git a/target/mips/translate.c b/target/mips/translate.c index e9c3a14..c3ad65c 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1869,6 +1869,17 @@ static inline void check_dspr2(DisasContext *ctx) } } =20 +static inline void check_dspr3(DisasContext *ctx) +{ + if (unlikely(!(ctx->hflags & MIPS_HFLAG_DSPR3))) { + if (ctx->insn_flags & ASE_DSP) { + generate_exception_end(ctx, EXCP_DSPDIS); + } else { + generate_exception_end(ctx, EXCP_RI); + } + } +} + /* This code generates a "reserved instruction" exception if the CPU does not support the instruction set corresponding to flags. */ static inline void check_insn(DisasContext *ctx, int flags) @@ -20285,7 +20296,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) gen_compute_branch_cp1_nm(ctx, OPC_BC1NEZ, rt, s); break; case NM_BPOSGE32C: - check_dspr2(ctx); + check_dspr3(ctx); { int32_t imm =3D extract32(ctx->opcode, 1, 13) | extract32(ctx->opcode, 0, 1) << 13; diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.= inc.c index b3320b9..d7cd4ee 100644 --- a/target/mips/translate_init.inc.c +++ b/target/mips/translate_init.inc.c @@ -485,7 +485,8 @@ const mips_def_t mips_defs[] =3D .CP1_fcr31 =3D (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008), .SEGBITS =3D 32, .PABITS =3D 32, - .insn_flags =3D CPU_NANOMIPS32 | ASE_DSP | ASE_DSPR2 | ASE_MT, + .insn_flags =3D CPU_NANOMIPS32 | ASE_DSP | ASE_DSPR2 | ASE_DSPR3 | + ASE_MT, .mmu_type =3D MMU_TYPE_R4000, }, #if defined(TARGET_MIPS64) --=20 2.7.4