From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538753158093581.6867861142368; Fri, 5 Oct 2018 08:25:58 -0700 (PDT) Received: from localhost ([::1]:35610 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8RzJ-0003Dz-33 for importer@patchew.org; Fri, 05 Oct 2018 11:25:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47727) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rv3-0008Ah-K8 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8Ruw-0006Gx-Uv for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:32 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:40679 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8Run-0005bD-UG for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:18 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8F76B1A22C8; Fri, 5 Oct 2018 17:20:14 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 72C4B1A2261; Fri, 5 Oct 2018 17:20:14 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:47 +0200 Message-Id: <1538752793-6875-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 1/7] elf: Fix PT_MIPS_XXX constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Fix existing and add missing PT_MIPS_XXX constants in elf.h. This is copied from kernel header arch/mips/include/asm/elf.h. Signed-off-by: Aleksandar Markovic --- include/elf.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/elf.h b/include/elf.h index 312f68a..decf210 100644 --- a/include/elf.h +++ b/include/elf.h @@ -28,8 +28,11 @@ typedef int64_t Elf64_Sxword; #define PT_PHDR 6 #define PT_LOPROC 0x70000000 #define PT_HIPROC 0x7fffffff -#define PT_MIPS_REGINFO 0x70000000 -#define PT_MIPS_OPTIONS 0x70000001 + +#define PT_MIPS_REGINFO 0x70000000 +#define PT_MIPS_RTPROC 0x70000001 +#define PT_MIPS_OPTIONS 0x70000002 +#define PT_MIPS_ABIFLAGS 0x70000003 =20 /* Flags in the e_flags field of the header */ /* MIPS architecture level. */ --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15387532686271003.4696266251558; Fri, 5 Oct 2018 08:27:48 -0700 (PDT) Received: from localhost ([::1]:35616 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8S15-0004X3-Gl for importer@patchew.org; Fri, 05 Oct 2018 11:27:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47803) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rv7-0008GG-CN for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8Rv6-0006R4-Kd for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:37 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:41565 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8Rv6-0005n7-Ca for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:36 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 846931A241C; Fri, 5 Oct 2018 17:20:33 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 62FEF1A2418; Fri, 5 Oct 2018 17:20:33 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:48 +0200 Message-Id: <1538752793-6875-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 2/7] elf: Add MIPS_ABI_FP_XXX constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add MIPS_ABI_FP_XXX constants to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Signed-off-by: Aleksandar Markovic --- include/elf.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/elf.h b/include/elf.h index decf210..eb5958d 100644 --- a/include/elf.h +++ b/include/elf.h @@ -87,6 +87,14 @@ typedef int64_t Elf64_Sxword; #define EF_MIPS_MACH_LS3A 0x00a20000 /* ST Microelectronics Loongson = 3A */ #define EF_MIPS_MACH 0x00ff0000 /* EF_MIPS_MACH_xxx selection ma= sk */ =20 +#define MIPS_ABI_FP_ANY 0x0 /* FP ABI doesn't matter = */ +#define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float = */ +#define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float = */ +#define MIPS_ABI_FP_SOFT 0x3 /* -msoft-float = */ +#define MIPS_ABI_FP_OLD_64 0x4 /* -mips32r2 -mfp64 = */ +#define MIPS_ABI_FP_XX 0x5 /* -mfpxx = */ +#define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 = */ +#define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spr= eg */ =20 /* These constants define the different elf file types */ #define ET_NONE 0 --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538753268426788.2162204446701; Fri, 5 Oct 2018 08:27:48 -0700 (PDT) Received: from localhost ([::1]:35617 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8S15-0004XF-9H for importer@patchew.org; Fri, 05 Oct 2018 11:27:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47888) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8RvS-0008W3-KQ for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8RvM-0006cn-LE for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:58 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:42343 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8RvM-00065x-Ck for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:52 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 725821A22D5; Fri, 5 Oct 2018 17:20:50 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 557001A2261; Fri, 5 Oct 2018 17:20:50 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:49 +0200 Message-Id: <1538752793-6875-4-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 3/7] elf: Add Mips_elf_abiflags_v0 structure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add Mips_elf_abiflags_v0 structure to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Signed-off-by: Aleksandar Markovic --- include/elf.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/elf.h b/include/elf.h index eb5958d..75c60cc 100644 --- a/include/elf.h +++ b/include/elf.h @@ -96,6 +96,21 @@ typedef int64_t Elf64_Sxword; #define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 = */ #define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spr= eg */ =20 +typedef struct mips_elf_abiflags_v0 { + uint16_t version; /* Version of flags structure = */ + uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 = */ + uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and bel= ow,*/ + /* 1-n otherwise = */ + uint8_t gpr_size; /* The size of general purpose registers = */ + uint8_t cpr1_size; /* The size of co-processor 1 registers = */ + uint8_t cpr2_size; /* The size of co-processor 2 registers = */ + uint8_t fp_abi; /* The floating-point ABI = */ + uint32_t isa_ext; /* Mask of processor-specific extensions = */ + uint32_t ases; /* Mask of ASEs used = */ + uint32_t flags1; /* Mask of general flags = */ + uint32_t flags2; +} Mips_elf_abiflags_v0; + /* These constants define the different elf file types */ #define ET_NONE 0 #define ET_REL 1 --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 153875305457617.170761817173002; Fri, 5 Oct 2018 08:24:14 -0700 (PDT) Received: from localhost ([::1]:35598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rxd-0001ar-Bc for importer@patchew.org; Fri, 05 Oct 2018 11:24:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47901) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8RvW-00007I-Fd for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:22:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8RvU-0006fh-DQ for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:22:02 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:42722 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8RvT-00068R-Rq for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:22:00 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 0C10C1A23AD; Fri, 5 Oct 2018 17:20:58 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id E3DAB1A2261; Fri, 5 Oct 2018 17:20:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:50 +0200 Message-Id: <1538752793-6875-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 4/7] target/mips: Add bit definitions for DSP R3 ASE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add DSP R3 ASE related bit definition for insn_flags and hflags. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/mips-defs.h | 1 + 2 files changed, 2 insertions(+) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 28af4d1..4160699 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -598,6 +598,7 @@ struct CPUMIPSState { /* MIPS DSP resources access. */ #define MIPS_HFLAG_DSP 0x080000 /* Enable access to MIPS DSP resources.= */ #define MIPS_HFLAG_DSPR2 0x100000 /* Enable access to MIPS DSPR2 resource= s. */ +#define MIPS_HFLAG_DSPR3 0x20000000 /* Enable access to MIPS DSPR3 resourc= es.*/ /* Extra flag about HWREna register. */ #define MIPS_HFLAG_HWRENA_ULR 0x200000 /* ULR bit from HWREna is set. */ #define MIPS_HFLAG_SBRI 0x400000 /* R6 SDBBP causes RI excpt. in user mod= e */ diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index c8e9979..b27b7ae 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -47,6 +47,7 @@ #define ASE_MDMX 0x00040000 #define ASE_DSP 0x00080000 #define ASE_DSPR2 0x00100000 +#define ASE_DSPR3 0x02000000 #define ASE_MT 0x00200000 #define ASE_SMARTMIPS 0x00400000 #define ASE_MICROMIPS 0x00800000 --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538753027908434.0765426676371; Fri, 5 Oct 2018 08:23:47 -0700 (PDT) Received: from localhost ([::1]:35597 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8RxA-00018J-5H for importer@patchew.org; Fri, 05 Oct 2018 11:23:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47726) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rv3-0008Ag-K5 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8Ruw-0006Gu-Un for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:32 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:43518 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8Run-0006D7-P5 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:18 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 948E61A23E7; Fri, 5 Oct 2018 17:21:07 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 768651A2261; Fri, 5 Oct 2018 17:21:07 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:51 +0200 Message-Id: <1538752793-6875-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 5/7] target/mips: Add availability control for DSP R3 ASE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add infrastructure for availability control for DSP R3 ASE MIPS instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but this is likely to be changed in near future. Signed-off-by: Aleksandar Markovic Reviewed-by: Aleksandar Markovic --- target/mips/internal.h | 11 ++++++++--- target/mips/translate.c | 13 ++++++++++++- target/mips/translate_init.inc.c | 3 ++- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index e41051f..3c5867e 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -307,8 +307,8 @@ static inline void compute_hflags(CPUMIPSState *env) env->hflags &=3D ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 | MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU | MIPS_HFLAG_AWRAP | MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2 | - MIPS_HFLAG_SBRI | MIPS_HFLAG_MSA | MIPS_HFLAG_FRE | - MIPS_HFLAG_ELPA | MIPS_HFLAG_ERL); + MIPS_HFLAG_DSPR3 | MIPS_HFLAG_SBRI | MIPS_HFLAG_MSA | + MIPS_HFLAG_FRE | MIPS_HFLAG_ELPA | MIPS_HFLAG_ERL); if (env->CP0_Status & (1 << CP0St_ERL)) { env->hflags |=3D MIPS_HFLAG_ERL; } @@ -355,7 +355,12 @@ static inline void compute_hflags(CPUMIPSState *env) (env->CP0_Config5 & (1 << CP0C5_SBRI))) { env->hflags |=3D MIPS_HFLAG_SBRI; } - if (env->insn_flags & ASE_DSPR2) { + if (env->insn_flags & ASE_DSPR3) { + if (env->CP0_Status & (1 << CP0St_MX)) { + env->hflags |=3D MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2 | + MIPS_HFLAG_DSPR3; + } + } else if (env->insn_flags & ASE_DSPR2) { /* Enables access MIPS DSP resources, now our cpu is DSP ASER2, so enable to access DSPR2 resources. */ if (env->CP0_Status & (1 << CP0St_MX)) { diff --git a/target/mips/translate.c b/target/mips/translate.c index ab16cdb..d64a1da 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1868,6 +1868,17 @@ static inline void check_dspr2(DisasContext *ctx) } } =20 +static inline void check_dspr3(DisasContext *ctx) +{ + if (unlikely(!(ctx->hflags & MIPS_HFLAG_DSPR3))) { + if (ctx->insn_flags & ASE_DSP) { + generate_exception_end(ctx, EXCP_DSPDIS); + } else { + generate_exception_end(ctx, EXCP_RI); + } + } +} + /* This code generates a "reserved instruction" exception if the CPU does not support the instruction set corresponding to flags. */ static inline void check_insn(DisasContext *ctx, int flags) @@ -20098,7 +20109,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *= env, DisasContext *ctx) gen_compute_branch_cp1_nm(ctx, OPC_BC1NEZ, rt, s); break; case NM_BPOSGE32C: - check_dspr2(ctx); + check_dspr3(ctx); { int32_t imm =3D extract32(ctx->opcode, 1, 13) | extract32(ctx->opcode, 0, 1) << 13; diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.= inc.c index b3320b9..d7cd4ee 100644 --- a/target/mips/translate_init.inc.c +++ b/target/mips/translate_init.inc.c @@ -485,7 +485,8 @@ const mips_def_t mips_defs[] =3D .CP1_fcr31 =3D (1 << FCR31_ABS2008) | (1 << FCR31_NAN2008), .SEGBITS =3D 32, .PABITS =3D 32, - .insn_flags =3D CPU_NANOMIPS32 | ASE_DSP | ASE_DSPR2 | ASE_MT, + .insn_flags =3D CPU_NANOMIPS32 | ASE_DSP | ASE_DSPR2 | ASE_DSPR3 | + ASE_MT, .mmu_type =3D MMU_TYPE_R4000, }, #if defined(TARGET_MIPS64) --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538753026334827.1382225141009; Fri, 5 Oct 2018 08:23:46 -0700 (PDT) Received: from localhost ([::1]:35595 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rx2-00014f-7V for importer@patchew.org; Fri, 05 Oct 2018 11:23:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47674) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Ruz-0008AD-TR for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8Ruo-0006Dx-L7 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:21 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:43508 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8Run-0006D3-93 for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:17 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 433351A2409; Fri, 5 Oct 2018 17:21:13 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 266671A2261; Fri, 5 Oct 2018 17:21:13 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:52 +0200 Message-Id: <1538752793-6875-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 6/7] target/mips: Add opcodes for nanoMIPS EVA instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dimitrije Nikolic Add opcodes for nanoMIPS EVA instructions: CACHEE, LBE, LBUE, LHE, LHUE, LLE, LLWPE, LWE, PREFE, SBE, SCE, SCWPE, SHE, SWE. Signed-off-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/translate.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index d64a1da..b0b2f40 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -16499,6 +16499,22 @@ enum { NM_P_SC =3D 0x0b, }; =20 +/* P.LS.E0 instruction pool */ +enum { + NM_LBE =3D 0x00, + NM_SBE =3D 0x01, + NM_LBUE =3D 0x02, + NM_P_PREFE =3D 0x03, + NM_LHE =3D 0x04, + NM_SHE =3D 0x05, + NM_LHUE =3D 0x06, + NM_CACHEE =3D 0x07, + NM_LWE =3D 0x08, + NM_SWE =3D 0x09, + NM_P_LLE =3D 0x0a, + NM_P_SCE =3D 0x0b, +}; + /* P.LS.WM instruction pool */ enum { NM_LWM =3D 0x00, --=20 2.7.4 From nobody Thu Nov 6 01:36:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538753158894190.72855547947609; Fri, 5 Oct 2018 08:25:58 -0700 (PDT) Received: from localhost ([::1]:35611 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8RzJ-0003Fv-OW for importer@patchew.org; Fri, 05 Oct 2018 11:25:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47772) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g8Rv5-0008CY-6s for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g8Rv4-0006Nm-9E for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:35 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:43720 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g8Rv2-0006EF-7s for qemu-devel@nongnu.org; Fri, 05 Oct 2018 11:21:34 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 60FEE1A240F; Fri, 5 Oct 2018 17:21:16 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 43B6A1A2261; Fri, 5 Oct 2018 17:21:16 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 5 Oct 2018 17:19:53 +0200 Message-Id: <1538752793-6875-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1538752793-6875-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 7/7] target/mips: Implement emulation of nanoMIPS EVA instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dimitrije Nikolic Implement emulation of nanoMIPS EVA instructions. They are all part of P.LS.E0 instruction pool, or one of its subpools. Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 79 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 79 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index b0b2f40..3adf31f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1979,6 +1979,17 @@ static inline void check_nms(DisasContext *ctx) } } =20 +/* + * This code generates a "reserved instruction" exception if the + * Config5 EVA bit is NOT set. + */ +static inline void check_eva(DisasContext *ctx) +{ + if (!unlikely(ctx->CP0_Config5 & (1 << CP0C5_EVA))) { + generate_exception_end(ctx, EXCP_RI); + } +} + =20 /* Define small wrappers for gen_load_fpr* so that we have a uniform calling interface for 32 and 64-bit FPRs. No sense in changing @@ -20011,6 +20022,74 @@ static int decode_nanomips_32_48_opc(CPUMIPSState = *env, DisasContext *ctx) break; } break; + case NM_P_LS_E0: + check_eva(ctx); + switch (extract32(ctx->opcode, 11, 4)) { + case NM_LBE: + gen_ld(ctx, OPC_LBE, rt, rs, s); + break; + case NM_SBE: + gen_st(ctx, OPC_SBE, rt, rs, s); + break; + case NM_LBUE: + gen_ld(ctx, OPC_LBUE, rt, rs, s); + break; + case NM_P_PREFE: + if (rt =3D=3D 31) { + /* SYNCIE */ + /* Break the TB to be able to sync copied instruct= ions + immediately */ + ctx->base.is_jmp =3D DISAS_STOP; + } else { + /* PREF */ + /* Treat as NOP. */ + } + break; + case NM_LHE: + gen_ld(ctx, OPC_LHE, rt, rs, s); + break; + case NM_SHE: + gen_st(ctx, OPC_SHE, rt, rs, s); + break; + case NM_LHUE: + gen_ld(ctx, OPC_LHUE, rt, rs, s); + break; + case NM_CACHEE: + /* Treat as no-op */ + if (ctx->hflags & MIPS_HFLAG_ITC_CACHE) { + gen_cache_operation(ctx, rt, rs, s); + } + break; + case NM_LWE: + gen_ld(ctx, OPC_LWE, rt, rs, s); + break; + case NM_SWE: + gen_st(ctx, OPC_SWE, rt, rs, s); + break; + case NM_P_LLE: + switch (extract32(ctx->opcode, 2, 2)) { + case NM_LL: + gen_ld(ctx, OPC_LLE, rt, rs, s); + break; + case NM_LLWP: + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + case NM_P_SCE: + switch (extract32(ctx->opcode, 2, 2)) { + case NM_SC: + gen_st_cond(ctx, OPC_SCE, rt, rs, s); + break; + case NM_SCWP: + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + } + break; case NM_P_LS_WM: case NM_P_LS_UAWM: check_nms(ctx); --=20 2.7.4