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helo=lists.gnu.org; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: Oo7lIaW7uPw1QdePQdI+MJ8xfy37RjKuaTywvuWhBHGDHH9ym2inl/driFsa+O4gBZY6/zBqzjFVHGUAgWc9IUW+BCSmo/JeL1JvehvjIunG3xX5nk42gAdmf8V1+ok6k1B2r8ww5ef/UrDcJfQSDx7P1UOqVT0kvD1mFOGvqLw/7IyMg1+t5QA6+VIWmdQE6UqQ6VM9Qaf6PAyXscSlbLnNLZ++B0//jze3IeMSBGkI+1YTWSjITFRsMk7H3C5vx9PE3UU3t3N/1gadA8hi8O5wMCSWlmG/2rdCKtmKbmNv5jI9WJVt6dAc8O32+X6TvUtk4g+FECx2xco7fYs8Z1dXzMlpTqxiF+XPTwIy7KA= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: d8f2058e-f0fb-44b7-5b6f-08d627d656d0 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2018 19:44:45.6957 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2649 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 2a01:111:f400:fe48::606 Subject: [Qemu-devel] [PATCH v5 9/9] x86_iommu/amd: Enable Guest virtual APIC support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Lendacky, Thomas" , "Singh, Brijesh" , Eduardo Habkost , "Michael S. Tsirkin" , Peter Xu , Paolo Bonzini , "Suthikulpanit, Suravee" , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Now that amd-iommu support interrupt remapping, enable the GASup in IVRS table and GASup in extended feature register to indicate that IOMMU support guest virtual APIC mode. GASup provides option to guest OS to make use of 128-bit IRTE. Note that the GAMSup is set to zero to indicate that amd-iommu does not support guest virtual APIC mode (aka AVIC) which would be used for the nested VMs. See Table 21 from IOMMU spec for interrupt virtualization controls Signed-off-by: Brijesh Singh Reviewed-by: Peter Xu Cc: Peter Xu Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Marcel Apfelbaum Cc: Tom Lendacky Cc: Suravee Suthikulpanit --- hw/i386/acpi-build.c | 3 ++- hw/i386/amd_iommu.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 1ef396d..236a20e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2518,7 +2518,8 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linke= r) build_append_int_noprefix(table_data, (48UL << 30) | /* HATS */ (48UL << 28) | /* GATS */ - (1UL << 2), /* GTSup */ + (1UL << 2) | /* GTSup */ + (1UL << 6), /* GASup */ 4); /* * Type 1 device entry reporting all devices diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index 8061e9c..687fcd8 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -176,7 +176,7 @@ /* extended feature support */ #define AMDVI_EXT_FEATURES (AMDVI_FEATURE_PREFETCH | AMDVI_FEATURE_PPR | \ AMDVI_FEATURE_IA | AMDVI_FEATURE_GT | AMDVI_FEATURE_HE | \ - AMDVI_GATS_MODE | AMDVI_HATS_MODE) + AMDVI_GATS_MODE | AMDVI_HATS_MODE | AMDVI_FEATURE_GA) =20 /* capabilities header */ #define AMDVI_CAPAB_FEATURES (AMDVI_CAPAB_FLAT_EXT | \ --=20 2.7.4