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[94.36.187.248]) by smtp.gmail.com with ESMTPSA id u76-v6sm11369194wmd.10.2018.09.30.01.14.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 30 Sep 2018 01:14:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=TJ2p0/DjWbH6zUkB3teGgITTkc3xHQ0DS9FGJkroi8U=; b=CpiuLSpe1LGHOCeIrmSpGAfQgJRoL4quOOLSgKjBM37jhrMZNrYjT+MmC8kZHbPAhT q9Wj1iKZSd5gIoHZ1xECAOShLUc9QDK/7oxzJQCpHbevFM+5w9NR323z7DvwfJTVWsmt wOqIcOuInwfkrplanRm2lVdY0Q0SnW6lvBhQMdP2CSUkq2l8ha5owyLj6q3s8DqgCcdu fjlAi1488R+9APlIw2oB+1SaUTXpbDpwvLZOWvtmEb4PTMpBCCe3em9B0VNeX4P1fRWb c9lOM1m6o8gnhPImXp2AqFcvHv3QQuaQB03davftqwSp0G9abPBGs/M0qQPKURTF7frA yzpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=TJ2p0/DjWbH6zUkB3teGgITTkc3xHQ0DS9FGJkroi8U=; b=ho8irD7Sl0SBJSwI7Rn8ra/Y09b/2WSlp3sIhgTHEUab7eXD7ZOFy/01Xmt4TViYVg xR3ZZx1WWHVq0bJQnvEJJEbjaPdE1zczZBpEm7wMhpXMi1SyPpyt7atlRUgYCAO0DVO9 wgjdONRcHYs2mu9cIf65aH9noC9OPbRgTMzWeu9TjeZI7wqXNTzjl8BTw6cU2f/8bRqI OYwmKIl3CmjNgxjSX/IURkKC04Lo4Dr38AG2wp1tBb6nevDcBZL2pemBn1PRgU/mhOWT FXXDRZblbXSzHLj6YhgwnnC2I6e0hpYNxLtjGQ3tK49gdY1Lwa2MV/SyG3Hy/GxCvbgu gFWQ== X-Gm-Message-State: ABuFfoiIApypNb9DbBmHVqj4sYwAACwdpS6UanZLIVS/ki9VonDo8fCW lPQSglBd0JvDf2SPOi3RZH1kk6OQ X-Google-Smtp-Source: ACcGV61mOkhiXNKKDYeokQz1bCl+UoJ4PEH4TH5JNtnmpy/xnigC40icvatxYDjmCPc6oIf8bp0d4w== X-Received: by 2002:adf:fa92:: with SMTP id h18-v6mr125475wrr.74.1538295280577; Sun, 30 Sep 2018 01:14:40 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Sun, 30 Sep 2018 10:13:17 +0200 Message-Id: <1538295197-23704-80-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1538295197-23704-1-git-send-email-pbonzini@redhat.com> References: <1538295197-23704-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d Subject: [Qemu-devel] [PULL 79/79] hw/scsi/mptendian: Avoid taking address of fields in packed structs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Taking the address of a field in a packed struct is a bad idea, because it might not be actually aligned enough for that pointer type (and thus cause a crash on dereference on some host architectures). Newer versions of clang warn about this. Avoid the bug by not using the "modify in place" byte swapping functions. This patch was produced with the following simple spatch script: @@ expression E; @@ -le16_to_cpus(&E); +E =3D le16_to_cpu(E); @@ expression E; @@ -le32_to_cpus(&E); +E =3D le32_to_cpu(E); @@ expression E; @@ -le64_to_cpus(&E); +E =3D le64_to_cpu(E); @@ expression E; @@ -cpu_to_le16s(&E); +E =3D cpu_to_le16(E); @@ expression E; @@ -cpu_to_le32s(&E); +E =3D cpu_to_le32(E); @@ expression E; @@ -cpu_to_le64s(&E); +E =3D cpu_to_le64(E); followed by some minor tidying of overlong lines and bad indent. Signed-off-by: Peter Maydell Message-Id: <20180927134852.21490-1-peter.maydell@linaro.org> Reviewed-by: Fam Zheng Signed-off-by: Paolo Bonzini --- hw/scsi/mptendian.c | 163 ++++++++++++++++++++++++++----------------------= ---- 1 file changed, 83 insertions(+), 80 deletions(-) diff --git a/hw/scsi/mptendian.c b/hw/scsi/mptendian.c index 8ae39a7..79f9973 100644 --- a/hw/scsi/mptendian.c +++ b/hw/scsi/mptendian.c @@ -35,152 +35,155 @@ =20 static void mptsas_fix_sgentry_endianness(MPISGEntry *sge) { - le32_to_cpus(&sge->FlagsLength); + sge->FlagsLength =3D le32_to_cpu(sge->FlagsLength); if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) { - le64_to_cpus(&sge->u.Address64); + sge->u.Address64 =3D le64_to_cpu(sge->u.Address64); } else { - le32_to_cpus(&sge->u.Address32); + sge->u.Address32 =3D le32_to_cpu(sge->u.Address32); } } =20 static void mptsas_fix_sgentry_endianness_reply(MPISGEntry *sge) { if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) { - cpu_to_le64s(&sge->u.Address64); + sge->u.Address64 =3D cpu_to_le64(sge->u.Address64); } else { - cpu_to_le32s(&sge->u.Address32); + sge->u.Address32 =3D cpu_to_le32(sge->u.Address32); } - cpu_to_le32s(&sge->FlagsLength); + sge->FlagsLength =3D cpu_to_le32(sge->FlagsLength); } =20 void mptsas_fix_scsi_io_endianness(MPIMsgSCSIIORequest *req) { - le32_to_cpus(&req->MsgContext); - le32_to_cpus(&req->Control); - le32_to_cpus(&req->DataLength); - le32_to_cpus(&req->SenseBufferLowAddr); + req->MsgContext =3D le32_to_cpu(req->MsgContext); + req->Control =3D le32_to_cpu(req->Control); + req->DataLength =3D le32_to_cpu(req->DataLength); + req->SenseBufferLowAddr =3D le32_to_cpu(req->SenseBufferLowAddr); } =20 void mptsas_fix_scsi_io_reply_endianness(MPIMsgSCSIIOReply *reply) { - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); - cpu_to_le32s(&reply->TransferCount); - cpu_to_le32s(&reply->SenseCount); - cpu_to_le32s(&reply->ResponseInfo); - cpu_to_le16s(&reply->TaskTag); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); + reply->TransferCount =3D cpu_to_le32(reply->TransferCount); + reply->SenseCount =3D cpu_to_le32(reply->SenseCount); + reply->ResponseInfo =3D cpu_to_le32(reply->ResponseInfo); + reply->TaskTag =3D cpu_to_le16(reply->TaskTag); } =20 void mptsas_fix_scsi_task_mgmt_endianness(MPIMsgSCSITaskMgmt *req) { - le32_to_cpus(&req->MsgContext); - le32_to_cpus(&req->TaskMsgContext); + req->MsgContext =3D le32_to_cpu(req->MsgContext); + req->TaskMsgContext =3D le32_to_cpu(req->TaskMsgContext); } =20 void mptsas_fix_scsi_task_mgmt_reply_endianness(MPIMsgSCSITaskMgmtReply *r= eply) { - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); - cpu_to_le32s(&reply->TerminationCount); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); + reply->TerminationCount =3D cpu_to_le32(reply->TerminationCount); } =20 void mptsas_fix_ioc_init_endianness(MPIMsgIOCInit *req) { - le32_to_cpus(&req->MsgContext); - le16_to_cpus(&req->ReplyFrameSize); - le32_to_cpus(&req->HostMfaHighAddr); - le32_to_cpus(&req->SenseBufferHighAddr); - le32_to_cpus(&req->ReplyFifoHostSignalingAddr); + req->MsgContext =3D le32_to_cpu(req->MsgContext); + req->ReplyFrameSize =3D le16_to_cpu(req->ReplyFrameSize); + req->HostMfaHighAddr =3D le32_to_cpu(req->HostMfaHighAddr); + req->SenseBufferHighAddr =3D le32_to_cpu(req->SenseBufferHighAddr); + req->ReplyFifoHostSignalingAddr =3D + le32_to_cpu(req->ReplyFifoHostSignalingAddr); mptsas_fix_sgentry_endianness(&req->HostPageBufferSGE); - le16_to_cpus(&req->MsgVersion); - le16_to_cpus(&req->HeaderVersion); + req->MsgVersion =3D le16_to_cpu(req->MsgVersion); + req->HeaderVersion =3D le16_to_cpu(req->HeaderVersion); } =20 void mptsas_fix_ioc_init_reply_endianness(MPIMsgIOCInitReply *reply) { - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); } =20 void mptsas_fix_ioc_facts_endianness(MPIMsgIOCFacts *req) { - le32_to_cpus(&req->MsgContext); + req->MsgContext =3D le32_to_cpu(req->MsgContext); } =20 void mptsas_fix_ioc_facts_reply_endianness(MPIMsgIOCFactsReply *reply) { - cpu_to_le16s(&reply->MsgVersion); - cpu_to_le16s(&reply->HeaderVersion); - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCExceptions); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); - cpu_to_le16s(&reply->ReplyQueueDepth); - cpu_to_le16s(&reply->RequestFrameSize); - cpu_to_le16s(&reply->ProductID); - cpu_to_le32s(&reply->CurrentHostMfaHighAddr); - cpu_to_le16s(&reply->GlobalCredits); - cpu_to_le32s(&reply->CurrentSenseBufferHighAddr); - cpu_to_le16s(&reply->CurReplyFrameSize); - cpu_to_le32s(&reply->FWImageSize); - cpu_to_le32s(&reply->IOCCapabilities); - cpu_to_le16s(&reply->HighPriorityQueueDepth); + reply->MsgVersion =3D cpu_to_le16(reply->MsgVersion); + reply->HeaderVersion =3D cpu_to_le16(reply->HeaderVersion); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCExceptions =3D cpu_to_le16(reply->IOCExceptions); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); + reply->ReplyQueueDepth =3D cpu_to_le16(reply->ReplyQueueDepth); + reply->RequestFrameSize =3D cpu_to_le16(reply->RequestFrameSize); + reply->ProductID =3D cpu_to_le16(reply->ProductID); + reply->CurrentHostMfaHighAddr =3D cpu_to_le32(reply->CurrentHostMfaHig= hAddr); + reply->GlobalCredits =3D cpu_to_le16(reply->GlobalCredits); + reply->CurrentSenseBufferHighAddr =3D + cpu_to_le32(reply->CurrentSenseBufferHighAddr); + reply->CurReplyFrameSize =3D cpu_to_le16(reply->CurReplyFrameSize); + reply->FWImageSize =3D cpu_to_le32(reply->FWImageSize); + reply->IOCCapabilities =3D cpu_to_le32(reply->IOCCapabilities); + reply->HighPriorityQueueDepth =3D cpu_to_le16(reply->HighPriorityQueue= Depth); mptsas_fix_sgentry_endianness_reply(&reply->HostPageBufferSGE); - cpu_to_le32s(&reply->ReplyFifoHostSignalingAddr); + reply->ReplyFifoHostSignalingAddr =3D + cpu_to_le32(reply->ReplyFifoHostSignalingAddr); } =20 void mptsas_fix_config_endianness(MPIMsgConfig *req) { - le16_to_cpus(&req->ExtPageLength); - le32_to_cpus(&req->MsgContext); - le32_to_cpus(&req->PageAddress); + req->ExtPageLength =3D le16_to_cpu(req->ExtPageLength); + req->MsgContext =3D le32_to_cpu(req->MsgContext); + req->PageAddress =3D le32_to_cpu(req->PageAddress); mptsas_fix_sgentry_endianness(&req->PageBufferSGE); } =20 void mptsas_fix_config_reply_endianness(MPIMsgConfigReply *reply) { - cpu_to_le16s(&reply->ExtPageLength); - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); + reply->ExtPageLength =3D cpu_to_le16(reply->ExtPageLength); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); } =20 void mptsas_fix_port_facts_endianness(MPIMsgPortFacts *req) { - le32_to_cpus(&req->MsgContext); + req->MsgContext =3D le32_to_cpu(req->MsgContext); } =20 void mptsas_fix_port_facts_reply_endianness(MPIMsgPortFactsReply *reply) { - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); - cpu_to_le16s(&reply->MaxDevices); - cpu_to_le16s(&reply->PortSCSIID); - cpu_to_le16s(&reply->ProtocolFlags); - cpu_to_le16s(&reply->MaxPostedCmdBuffers); - cpu_to_le16s(&reply->MaxPersistentIDs); - cpu_to_le16s(&reply->MaxLanBuckets); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); + reply->MaxDevices =3D cpu_to_le16(reply->MaxDevices); + reply->PortSCSIID =3D cpu_to_le16(reply->PortSCSIID); + reply->ProtocolFlags =3D cpu_to_le16(reply->ProtocolFlags); + reply->MaxPostedCmdBuffers =3D cpu_to_le16(reply->MaxPostedCmdBuffers); + reply->MaxPersistentIDs =3D cpu_to_le16(reply->MaxPersistentIDs); + reply->MaxLanBuckets =3D cpu_to_le16(reply->MaxLanBuckets); } =20 void mptsas_fix_port_enable_endianness(MPIMsgPortEnable *req) { - le32_to_cpus(&req->MsgContext); + req->MsgContext =3D le32_to_cpu(req->MsgContext); } =20 void mptsas_fix_port_enable_reply_endianness(MPIMsgPortEnableReply *reply) { - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); } =20 void mptsas_fix_event_notification_endianness(MPIMsgEventNotify *req) { - le32_to_cpus(&req->MsgContext); + req->MsgContext =3D le32_to_cpu(req->MsgContext); } =20 void mptsas_fix_event_notification_reply_endianness(MPIMsgEventNotifyReply= *reply) @@ -188,16 +191,16 @@ void mptsas_fix_event_notification_reply_endianness(M= PIMsgEventNotifyReply *repl int length =3D reply->EventDataLength; int i; =20 - cpu_to_le16s(&reply->EventDataLength); - cpu_to_le32s(&reply->MsgContext); - cpu_to_le16s(&reply->IOCStatus); - cpu_to_le32s(&reply->IOCLogInfo); - cpu_to_le32s(&reply->Event); - cpu_to_le32s(&reply->EventContext); + reply->EventDataLength =3D cpu_to_le16(reply->EventDataLength); + reply->MsgContext =3D cpu_to_le32(reply->MsgContext); + reply->IOCStatus =3D cpu_to_le16(reply->IOCStatus); + reply->IOCLogInfo =3D cpu_to_le32(reply->IOCLogInfo); + reply->Event =3D cpu_to_le32(reply->Event); + reply->EventContext =3D cpu_to_le32(reply->EventContext); =20 /* Really depends on the event kind. This will do for now. */ for (i =3D 0; i < length; i++) { - cpu_to_le32s(&reply->Data[i]); + reply->Data[i] =3D cpu_to_le32(reply->Data[i]); } } =20 --=20 1.8.3.1