From nobody Thu Nov 6 01:12:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1538298575591405.9905341862176; Sun, 30 Sep 2018 02:09:35 -0700 (PDT) Received: from localhost ([::1]:54529 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g6XjK-0004v8-56 for importer@patchew.org; Sun, 30 Sep 2018 05:09:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41927) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g6WsI-0003C3-VG for qemu-devel@nongnu.org; Sun, 30 Sep 2018 04:14:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g6WsB-0001Gj-HJ for qemu-devel@nongnu.org; Sun, 30 Sep 2018 04:14:45 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:43541) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1g6WsA-000190-Q0 for qemu-devel@nongnu.org; Sun, 30 Sep 2018 04:14:39 -0400 Received: by mail-wr1-x441.google.com with SMTP id n1-v6so331599wrt.10 for ; Sun, 30 Sep 2018 01:14:28 -0700 (PDT) Received: from 640k.lan (94-36-187-248.adsl-ull.clienti.tiscali.it. [94.36.187.248]) by smtp.gmail.com with ESMTPSA id u76-v6sm11369194wmd.10.2018.09.30.01.14.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 30 Sep 2018 01:14:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ziaUMIMRPeyBkjkwSvnvrAc02mLC+ljNTyxxWIfh7+U=; b=TRG/8hElMGFxFdgEk/8uuVa/FSQedYas09kB8h6s0xjh+8xyA0g4FcMjvJe/EhDIXk F/JaDB4Z5urFUpdfOA3aQ880pQns2lTVyRZP6yJS1rRLGckfSo5etroEwtJYPv0ALoDV e3XlpKB1ey8copFt8mcnS8UDtcpGVVPXy0HXI85l55ZaSz3tw+9t7zN19XQI5lxvpL5t SeVZoiKce1Yhbc0or0ieJY2/dGotukfdvpwbpGpJ+5mRbGjvCtQNJVzID9itnwIhzXbt QPocEbCLTiy5FzwfEUeaxwWt1daQR23emNHxP3y5h77aWvk03qxh46ewVG8if0U6/sMo iuHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=ziaUMIMRPeyBkjkwSvnvrAc02mLC+ljNTyxxWIfh7+U=; b=IDxb23KT2VrPNiudY/rIYAyNWlFmsbj+nYCE6w6GxGmcElISRhOqTbRuPuYFExHYjG Dv9AJdwGfZyZrnK5MvxUIFFP5sNj+faSIYqDYXbEhjLHkwFqfRq13gzajymBVqFiUXRh 9q+7zTezWWrFzePi0lSRlp1jCVwGgtI+CKinUKuVy9foM5N9H+1N9c0uYQETT48PxfQD 5MYrly0A6eucXaCPYwNddWVe8vflZGfzJNE8WfIqJkOUihxAg3b8nBhJNzQ18wMljcaJ dZ8LNhMHf2lrhbJLdyF1QirjfDikwa1r99k0qa5D6KmbNIiRzmD1mHNq2ftA/qSm6B80 s5PA== X-Gm-Message-State: ABuFfohCrKyY5wsvrX6ezirI7II2dBCt6W7k44HuMDyIL5RcmLy6s8fr 6zoD9a7sXt8Uej4AgwaWw/mY8X7N X-Google-Smtp-Source: ACcGV63cfCYnbmavw5/vFVTUeVmArBcvB1E71/a5ABc43nodrq011lJSnjr7w6O6J4Oad0cZqhG6vA== X-Received: by 2002:adf:fa92:: with SMTP id h18-v6mr124983wrr.74.1538295266834; Sun, 30 Sep 2018 01:14:26 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Sun, 30 Sep 2018 10:13:02 +0200 Message-Id: <1538295197-23704-65-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1538295197-23704-1-git-send-email-pbonzini@redhat.com> References: <1538295197-23704-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PULL 64/79] lsi53c895a: convert to trace-events X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland Signed-off-by: Mark Cave-Ayland Message-Id: <20180917053229.4853-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini --- hw/scsi/lsi53c895a.c | 214 +++++++++++++++++++++++++----------------------= ---- hw/scsi/trace-events | 62 +++++++++++++++ 2 files changed, 165 insertions(+), 111 deletions(-) diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 996b406..d1e6534 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -20,20 +20,7 @@ #include "hw/scsi/scsi.h" #include "sysemu/dma.h" #include "qemu/log.h" - -//#define DEBUG_LSI -//#define DEBUG_LSI_REG - -#ifdef DEBUG_LSI -#define DPRINTF(fmt, ...) \ -do { printf("lsi_scsi: " fmt , ## __VA_ARGS__); } while (0) -#define BADF(fmt, ...) \ -do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__); exit(1);} = while (0) -#else -#define DPRINTF(fmt, ...) do {} while(0) -#define BADF(fmt, ...) \ -do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0) -#endif +#include "trace.h" =20 static const char *names[] =3D { "SCNTL0", "SCNTL1", "SCNTL2", "SCNTL3", "SCID", "SXFER", "SDID", "GPRE= G", @@ -313,7 +300,7 @@ static inline int lsi_irq_on_rsl(LSIState *s) =20 static void lsi_soft_reset(LSIState *s) { - DPRINTF("Reset\n"); + trace_lsi_reset(); s->carry =3D 0; =20 s->msg_action =3D 0; @@ -484,15 +471,13 @@ static void lsi_update_irq(LSIState *s) level =3D 1; =20 if (level !=3D last_level) { - DPRINTF("Update IRQ level %d dstat %02x sist %02x%02x\n", - level, s->dstat, s->sist1, s->sist0); + trace_lsi_update_irq(level, s->dstat, s->sist1, s->sist0); last_level =3D level; } lsi_set_irq(s, level); =20 if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) { - DPRINTF("Handled IRQs & disconnected, looking for pending " - "processes\n"); + trace_lsi_update_irq_disconnected(); QTAILQ_FOREACH(p, &s->queue, next) { if (p->pending) { lsi_reselect(s, p); @@ -508,8 +493,7 @@ static void lsi_script_scsi_interrupt(LSIState *s, int = stat0, int stat1) uint32_t mask0; uint32_t mask1; =20 - DPRINTF("SCSI Interrupt 0x%02x%02x prev 0x%02x%02x\n", - stat1, stat0, s->sist1, s->sist0); + trace_lsi_script_scsi_interrupt(stat1, stat0, s->sist1, s->sist0); s->sist0 |=3D stat0; s->sist1 |=3D stat1; /* Stop processor on fatal or unmasked interrupt. As a special hack @@ -527,7 +511,7 @@ static void lsi_script_scsi_interrupt(LSIState *s, int = stat0, int stat1) /* Stop SCRIPTS execution and raise a DMA interrupt. */ static void lsi_script_dma_interrupt(LSIState *s, int stat) { - DPRINTF("DMA Interrupt 0x%x prev 0x%x\n", stat, s->dstat); + trace_lsi_script_dma_interrupt(stat, s->dstat); s->dstat |=3D stat; lsi_update_irq(s); lsi_stop_script(s); @@ -547,9 +531,9 @@ static void lsi_bad_phase(LSIState *s, int out, int new= _phase) } else { s->dsp =3D (s->scntl2 & LSI_SCNTL2_WSR ? s->pmjad2 : s->pmjad1= ); } - DPRINTF("Data phase mismatch jump to %08x\n", s->dsp); + trace_lsi_bad_phase_jump(s->dsp); } else { - DPRINTF("Phase mismatch interrupt\n"); + trace_lsi_bad_phase_interrupt(); lsi_script_scsi_interrupt(s, LSI_SIST0_MA, 0); lsi_stop_script(s); } @@ -576,7 +560,7 @@ static void lsi_disconnect(LSIState *s) =20 static void lsi_bad_selection(LSIState *s, uint32_t id) { - DPRINTF("Selected absent target %d\n", id); + trace_lsi_bad_selection(id); lsi_script_scsi_interrupt(s, 0, LSI_SIST1_STO); lsi_disconnect(s); } @@ -591,7 +575,7 @@ static void lsi_do_dma(LSIState *s, int out) assert(s->current); if (!s->current->dma_len) { /* Wait until data is available. */ - DPRINTF("DMA no data available\n"); + trace_lsi_do_dma_unavailable(); return; } =20 @@ -611,7 +595,7 @@ static void lsi_do_dma(LSIState *s, int out) else if (s->sbms) addr |=3D ((uint64_t)s->sbms << 32); =20 - DPRINTF("DMA addr=3D0x" DMA_ADDR_FMT " len=3D%d\n", addr, count); + trace_lsi_do_dma(addr, count); s->csbc +=3D count; s->dnad +=3D count; s->dbc -=3D count; @@ -640,7 +624,7 @@ static void lsi_queue_command(LSIState *s) { lsi_request *p =3D s->current; =20 - DPRINTF("Queueing tag=3D0x%x\n", p->tag); + trace_lsi_queue_command(p->tag); assert(s->current !=3D NULL); assert(s->current->dma_len =3D=3D 0); QTAILQ_INSERT_TAIL(&s->queue, s->current, next); @@ -654,9 +638,9 @@ static void lsi_queue_command(LSIState *s) static void lsi_add_msg_byte(LSIState *s, uint8_t data) { if (s->msg_len >=3D LSI_MAX_MSGIN_LEN) { - BADF("MSG IN data too long\n"); + trace_lsi_add_msg_byte_error(); } else { - DPRINTF("MSG IN 0x%02x\n", data); + trace_lsi_add_msg_byte(data); s->msg[s->msg_len++] =3D data; } } @@ -676,7 +660,7 @@ static void lsi_reselect(LSIState *s, lsi_request *p) if (!(s->dcntl & LSI_DCNTL_COM)) { s->sfbr =3D 1 << (id & 0x7); } - DPRINTF("Reselected target %d\n", id); + trace_lsi_reselect(id); s->scntl1 |=3D LSI_SCNTL1_CON; lsi_set_phase(s, PHASE_MI); s->msg_action =3D p->out ? 2 : 3; @@ -732,7 +716,7 @@ static int lsi_queue_req(LSIState *s, SCSIRequest *req,= uint32_t len) lsi_request *p =3D req->hba_private; =20 if (p->pending) { - BADF("Multiple IO pending for request %p\n", p); + trace_lsi_queue_req_error(p); } p->pending =3D len; /* Reselect if waiting for it, or if reselection triggers an IRQ @@ -747,7 +731,7 @@ static int lsi_queue_req(LSIState *s, SCSIRequest *req,= uint32_t len) lsi_reselect(s, p); return 0; } else { - DPRINTF("Queueing IO tag=3D0x%x\n", p->tag); + trace_lsi_queue_req(p->tag); p->pending =3D len; return 1; } @@ -760,7 +744,7 @@ static void lsi_command_complete(SCSIRequest *req, uint= 32_t status, size_t resid int out; =20 out =3D (s->sstat1 & PHASE_MASK) =3D=3D PHASE_DO; - DPRINTF("Command complete status=3D%d\n", (int)status); + trace_lsi_command_complete(status); s->status =3D status; s->command_complete =3D 2; if (s->waiting && s->dbc !=3D 0) { @@ -795,7 +779,7 @@ static void lsi_transfer_data(SCSIRequest *req, uint32_= t len) out =3D (s->sstat1 & PHASE_MASK) =3D=3D PHASE_DO; =20 /* host adapter (re)connected */ - DPRINTF("Data ready tag=3D0x%x len=3D%d\n", req->tag, len); + trace_lsi_transfer_data(req->tag, len); s->current->dma_len =3D len; s->command_complete =3D 1; if (s->waiting) { @@ -814,7 +798,7 @@ static void lsi_do_command(LSIState *s) uint32_t id; int n; =20 - DPRINTF("Send command len=3D%d\n", s->dbc); + trace_lsi_do_command(s->dbc); if (s->dbc > 16) s->dbc =3D 16; pci_dma_read(PCI_DEVICE(s), s->dnad, buf, s->dbc); @@ -862,9 +846,10 @@ static void lsi_do_command(LSIState *s) static void lsi_do_status(LSIState *s) { uint8_t status; - DPRINTF("Get status len=3D%d status=3D%d\n", s->dbc, s->status); - if (s->dbc !=3D 1) - BADF("Bad Status move\n"); + trace_lsi_do_status(s->dbc, s->status); + if (s->dbc !=3D 1) { + trace_lsi_do_status_error(); + } s->dbc =3D 1; status =3D s->status; s->sfbr =3D status; @@ -877,7 +862,7 @@ static void lsi_do_status(LSIState *s) static void lsi_do_msgin(LSIState *s) { int len; - DPRINTF("Message in len=3D%d/%d\n", s->dbc, s->msg_len); + trace_lsi_do_msgin(s->dbc, s->msg_len); s->sfbr =3D s->msg[0]; len =3D s->msg_len; if (len > s->dbc) @@ -942,36 +927,36 @@ static void lsi_do_msgout(LSIState *s) current_req =3D lsi_find_by_tag(s, current_tag); } =20 - DPRINTF("MSG out len=3D%d\n", s->dbc); + trace_lsi_do_msgout(s->dbc); while (s->dbc) { msg =3D lsi_get_msgbyte(s); s->sfbr =3D msg; =20 switch (msg) { case 0x04: - DPRINTF("MSG: Disconnect\n"); + trace_lsi_do_msgout_disconnect(); lsi_disconnect(s); break; case 0x08: - DPRINTF("MSG: No Operation\n"); + trace_lsi_do_msgout_noop(); lsi_set_phase(s, PHASE_CMD); break; case 0x01: len =3D lsi_get_msgbyte(s); msg =3D lsi_get_msgbyte(s); (void)len; /* avoid a warning about unused variable*/ - DPRINTF("Extended message 0x%x (len %d)\n", msg, len); + trace_lsi_do_msgout_extended(msg, len); switch (msg) { case 1: - DPRINTF("SDTR (ignored)\n"); + trace_lsi_do_msgout_ignored("SDTR"); lsi_skip_msgbytes(s, 2); break; case 3: - DPRINTF("WDTR (ignored)\n"); + trace_lsi_do_msgout_ignored("WDTR"); lsi_skip_msgbytes(s, 1); break; case 4: - DPRINTF("PPR (ignored)\n"); + trace_lsi_do_msgout_ignored("PPR"); lsi_skip_msgbytes(s, 5); break; default: @@ -980,19 +965,20 @@ static void lsi_do_msgout(LSIState *s) break; case 0x20: /* SIMPLE queue */ s->select_tag |=3D lsi_get_msgbyte(s) | LSI_TAG_VALID; - DPRINTF("SIMPLE queue tag=3D0x%x\n", s->select_tag & 0xff); + trace_lsi_do_msgout_simplequeue(s->select_tag & 0xff); break; case 0x21: /* HEAD of queue */ - BADF("HEAD queue not implemented\n"); + qemu_log_mask(LOG_UNIMP, "lsi_scsi: HEAD queue not implemented= \n"); s->select_tag |=3D lsi_get_msgbyte(s) | LSI_TAG_VALID; break; case 0x22: /* ORDERED queue */ - BADF("ORDERED queue not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: ORDERED queue not implemented\n"); s->select_tag |=3D lsi_get_msgbyte(s) | LSI_TAG_VALID; break; case 0x0d: /* The ABORT TAG message clears the current I/O process only. = */ - DPRINTF("MSG: ABORT TAG tag=3D0x%x\n", current_tag); + trace_lsi_do_msgout_abort(current_tag); if (current_req) { scsi_req_cancel(current_req->req); } @@ -1004,17 +990,17 @@ static void lsi_do_msgout(LSIState *s) /* The ABORT message clears all I/O processes for the selecting initiator on the specified logical unit of the target. */ if (msg =3D=3D 0x06) { - DPRINTF("MSG: ABORT tag=3D0x%x\n", current_tag); + trace_lsi_do_msgout_abort(current_tag); } /* The CLEAR QUEUE message clears all I/O processes for all initiators on the specified logical unit of the target. */ if (msg =3D=3D 0x0e) { - DPRINTF("MSG: CLEAR QUEUE tag=3D0x%x\n", current_tag); + trace_lsi_do_msgout_clearqueue(current_tag); } /* The BUS DEVICE RESET message clears all I/O processes for a= ll initiators on all logical units of the target. */ if (msg =3D=3D 0x0c) { - DPRINTF("MSG: BUS DEVICE RESET tag=3D0x%x\n", current_tag); + trace_lsi_do_msgout_busdevicereset(current_tag); } =20 /* clear the current I/O process */ @@ -1042,14 +1028,14 @@ static void lsi_do_msgout(LSIState *s) goto bad; } s->current_lun =3D msg & 7; - DPRINTF("Select LUN %d\n", s->current_lun); + trace_lsi_do_msgout_select(s->current_lun); lsi_set_phase(s, PHASE_CMD); break; } } return; bad: - BADF("Unimplemented message 0x%02x\n", msg); + qemu_log_mask(LOG_UNIMP, "Unimplemented message 0x%02x\n", msg); lsi_set_phase(s, PHASE_MI); lsi_add_msg_byte(s, 7); /* MESSAGE REJECT */ s->msg_action =3D 0; @@ -1061,7 +1047,7 @@ static void lsi_memcpy(LSIState *s, uint32_t dest, ui= nt32_t src, int count) int n; uint8_t buf[LSI_BUF_SIZE]; =20 - DPRINTF("memcpy dest 0x%08x src 0x%08x count %d\n", dest, src, count); + trace_lsi_memcpy(dest, src, count); while (count) { n =3D (count > LSI_BUF_SIZE) ? LSI_BUF_SIZE : count; lsi_mem_read(s, src, buf, n); @@ -1076,7 +1062,7 @@ static void lsi_wait_reselect(LSIState *s) { lsi_request *p; =20 - DPRINTF("Wait Reselect\n"); + trace_lsi_wait_reselect(); =20 QTAILQ_FOREACH(p, &s->queue, next) { if (p->pending) { @@ -1109,14 +1095,14 @@ again: } addr =3D read_dword(s, s->dsp + 4); addr_high =3D 0; - DPRINTF("SCRIPTS dsp=3D%08x opcode %08x arg %08x\n", s->dsp, insn, add= r); + trace_lsi_execute_script(s->dsp, insn, addr); s->dsps =3D addr; s->dcmd =3D insn >> 24; s->dsp +=3D 8; switch (insn >> 30) { case 0: /* Block move. */ if (s->sist1 & LSI_SIST1_STO) { - DPRINTF("Delayed select timeout\n"); + trace_lsi_execute_script_blockmove_delayed(); lsi_stop_script(s); break; } @@ -1171,8 +1157,9 @@ again: addr_high =3D s->dbms; break; default: - BADF("Illegal selector specified (0x%x > 0x15)" - " for 64-bit DMA block move", selector); + qemu_log_mask(LOG_GUEST_ERROR, + "lsi_scsi: Illegal selector specified (0x%x > 0x= 15) " + "for 64-bit DMA block move", selector); break; } } @@ -1184,8 +1171,8 @@ again: s->ia =3D s->dsp - 12; } if ((s->sstat1 & PHASE_MASK) !=3D ((insn >> 24) & 7)) { - DPRINTF("Wrong phase got %d expected %d\n", - s->sstat1 & PHASE_MASK, (insn >> 24) & 7); + trace_lsi_execute_script_blockmove_badphase(s->sstat1 & PHASE_= MASK, + (insn >> 24) & 7); lsi_script_scsi_interrupt(s, LSI_SIST0_MA, 0); break; } @@ -1217,8 +1204,8 @@ again: lsi_do_msgin(s); break; default: - BADF("Unimplemented phase %d\n", s->sstat1 & PHASE_MASK); - exit(1); + qemu_log_mask(LOG_UNIMP, "lsi_scsi: Unimplemented phase %d\n", + s->sstat1 & PHASE_MASK); } s->dfifo =3D s->dbc & 0xff; s->ctest5 =3D (s->ctest5 & 0xfc) | ((s->dbc >> 8) & 3); @@ -1246,7 +1233,7 @@ again: case 0: /* Select */ s->sdid =3D id; if (s->scntl1 & LSI_SCNTL1_CON) { - DPRINTF("Already reselected, jumping to alternative ad= dress\n"); + trace_lsi_execute_script_io_alreadyreselected(); s->dsp =3D s->dnad; break; } @@ -1256,8 +1243,8 @@ again: lsi_bad_selection(s, id); break; } - DPRINTF("Selected target %d%s\n", - id, insn & (1 << 3) ? " ATN" : ""); + trace_lsi_execute_script_io_selected(id, + insn & (1 << 3) ? " ATN" : ""= ); /* ??? Linux drivers compain when this is set. Maybe it only applies in low-level mode (unimplemented). lsi_script_scsi_interrupt(s, LSI_SIST0_CMP, 0); */ @@ -1269,7 +1256,7 @@ again: lsi_set_phase(s, PHASE_MO); break; case 1: /* Disconnect */ - DPRINTF("Wait Disconnect\n"); + trace_lsi_execute_script_io_disconnect(); s->scntl1 &=3D ~LSI_SCNTL1_CON; break; case 2: /* Wait Reselect */ @@ -1278,7 +1265,7 @@ again: } break; case 3: /* Set */ - DPRINTF("Set%s%s%s%s\n", + trace_lsi_execute_script_io_set( insn & (1 << 3) ? " ATN" : "", insn & (1 << 6) ? " ACK" : "", insn & (1 << 9) ? " TM" : "", @@ -1288,14 +1275,14 @@ again: lsi_set_phase(s, PHASE_MO); } if (insn & (1 << 9)) { - BADF("Target mode not implemented\n"); - exit(1); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: Target mode not implemented\n"); } if (insn & (1 << 10)) s->carry =3D 1; break; case 4: /* Clear */ - DPRINTF("Clear%s%s%s%s\n", + trace_lsi_execute_script_io_clear( insn & (1 << 3) ? " ATN" : "", insn & (1 << 6) ? " ACK" : "", insn & (1 << 9) ? " TM" : "", @@ -1313,18 +1300,17 @@ again: uint8_t data8; int reg; int operator; -#ifdef DEBUG_LSI + static const char *opcode_names[3] =3D {"Write", "Read", "Read-Modify-Write"}; static const char *operator_names[8] =3D {"MOV", "SHL", "OR", "XOR", "AND", "SHR", "ADD", "ADC"}; -#endif =20 reg =3D ((insn >> 16) & 0x7f) | (insn & 0x80); data8 =3D (insn >> 8) & 0xff; opcode =3D (insn >> 27) & 7; operator =3D (insn >> 24) & 7; - DPRINTF("%s reg 0x%x %s data8=3D0x%02x sfbr=3D0x%02x%s\n", + trace_lsi_execute_script_io_opcode( opcode_names[opcode - 5], reg, operator_names[operator], data8, s->sfbr, (insn & (1 << 23)) ? " SFBR" : ""); @@ -1404,21 +1390,21 @@ again: int jmp; =20 if ((insn & 0x002e0000) =3D=3D 0) { - DPRINTF("NOP\n"); + trace_lsi_execute_script_tc_nop(); break; } if (s->sist1 & LSI_SIST1_STO) { - DPRINTF("Delayed select timeout\n"); + trace_lsi_execute_script_tc_delayedselect_timeout(); lsi_stop_script(s); break; } cond =3D jmp =3D (insn & (1 << 19)) !=3D 0; if (cond =3D=3D jmp && (insn & (1 << 21))) { - DPRINTF("Compare carry %d\n", s->carry =3D=3D jmp); + trace_lsi_execute_script_tc_compc(s->carry =3D=3D jmp); cond =3D s->carry !=3D 0; } if (cond =3D=3D jmp && (insn & (1 << 17))) { - DPRINTF("Compare phase %d %c=3D %d\n", + trace_lsi_execute_script_tc_compp( (s->sstat1 & PHASE_MASK), jmp ? '=3D' : '!', ((insn >> 24) & 7)); @@ -1428,7 +1414,7 @@ again: uint8_t mask; =20 mask =3D (~insn >> 8) & 0xff; - DPRINTF("Compare data 0x%x & 0x%x %c=3D 0x%x\n", + trace_lsi_execute_script_tc_compd( s->sfbr, mask, jmp ? '=3D' : '!', insn & mask); cond =3D (s->sfbr & mask) =3D=3D (insn & mask); } @@ -1439,21 +1425,21 @@ again: } switch ((insn >> 27) & 7) { case 0: /* Jump */ - DPRINTF("Jump to 0x%08x\n", addr); + trace_lsi_execute_script_tc_jump(addr); s->adder =3D addr; s->dsp =3D addr; break; case 1: /* Call */ - DPRINTF("Call 0x%08x\n", addr); + trace_lsi_execute_script_tc_call(addr); s->temp =3D s->dsp; s->dsp =3D addr; break; case 2: /* Return */ - DPRINTF("Return to 0x%08x\n", s->temp); + trace_lsi_execute_script_tc_return(s->temp); s->dsp =3D s->temp; break; case 3: /* Interrupt */ - DPRINTF("Interrupt 0x%08x\n", s->dsps); + trace_lsi_execute_script_tc_interrupt(s->dsps); if ((insn & (1 << 20)) !=3D 0) { s->istat0 |=3D LSI_ISTAT0_INTF; lsi_update_irq(s); @@ -1462,12 +1448,12 @@ again: } break; default: - DPRINTF("Illegal transfer control\n"); + trace_lsi_execute_script_tc_illegal(); lsi_script_dma_interrupt(s, LSI_DSTAT_IID); break; } } else { - DPRINTF("Control condition failed\n"); + trace_lsi_execute_script_tc_cc_failed(); } } break; @@ -1495,13 +1481,12 @@ again: reg =3D (insn >> 16) & 0xff; if (insn & (1 << 24)) { pci_dma_read(pci_dev, addr, data, n); - DPRINTF("Load reg 0x%x size %d addr 0x%08x =3D %08x\n", re= g, n, - addr, *(int *)data); + trace_lsi_execute_script_mm_load(reg, n, addr, *(int *)dat= a); for (i =3D 0; i < n; i++) { lsi_reg_writeb(s, reg + i, data[i]); } } else { - DPRINTF("Store reg 0x%x size %d addr 0x%08x\n", reg, n, ad= dr); + trace_lsi_execute_script_mm_store(reg, n, addr); for (i =3D 0; i < n; i++) { data[i] =3D lsi_reg_readb(s, reg + i); } @@ -1515,8 +1500,10 @@ again: assume this is the case and force an unexpected device disconne= ct. This is apparently sufficient to beat the drivers into submissi= on. */ - if (!(s->sien0 & LSI_SIST0_UDC)) - fprintf(stderr, "inf. loop with UDC masked\n"); + if (!(s->sien0 & LSI_SIST0_UDC)) { + qemu_log_mask(LOG_GUEST_ERROR, + "lsi_scsi: inf. loop with UDC masked"); + } lsi_script_scsi_interrupt(s, LSI_SIST0_UDC, 0); lsi_disconnect(s); } else if (s->istat1 & LSI_ISTAT1_SRUN && !s->waiting) { @@ -1526,7 +1513,7 @@ again: goto again; } } - DPRINTF("SCRIPTS execution stopped\n"); + trace_lsi_execute_script_stop(); } =20 static uint8_t lsi_reg_readb(LSIState *s, int offset) @@ -1761,10 +1748,8 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset) #undef CASE_GET_REG24 #undef CASE_GET_REG32 =20 -#ifdef DEBUG_LSI_REG - DPRINTF("Read reg %s %x =3D %02x\n", - offset < ARRAY_SIZE(names) ? names[offset] : "???", offset, re= t); -#endif + trace_lsi_reg_read(offset < ARRAY_SIZE(names) ? names[offset] : "???", + offset, ret); =20 return ret; } @@ -1782,21 +1767,22 @@ static void lsi_reg_writeb(LSIState *s, int offset,= uint8_t val) case addr + 2: s->name &=3D 0xff00ffff; s->name |=3D val << 16; break;= \ case addr + 3: s->name &=3D 0x00ffffff; s->name |=3D val << 24; break; =20 -#ifdef DEBUG_LSI_REG - DPRINTF("Write reg %s %x =3D %02x\n", - offset < ARRAY_SIZE(names) ? names[offset] : "???", offset, va= l); -#endif + trace_lsi_reg_write(offset < ARRAY_SIZE(names) ? names[offset] : "???", + offset, val); + switch (offset) { case 0x00: /* SCNTL0 */ s->scntl0 =3D val; if (val & LSI_SCNTL0_START) { - BADF("Start sequence not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: Start sequence not implemented\n"); } break; case 0x01: /* SCNTL1 */ s->scntl1 =3D val & ~LSI_SCNTL1_SST; if (val & LSI_SCNTL1_IARB) { - BADF("Immediate Arbritration not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: Immediate Arbritration not implemented\n"= ); } if (val & LSI_SCNTL1_RST) { if (!(s->sstat0 & LSI_SSTAT0_RST)) { @@ -1823,7 +1809,8 @@ static void lsi_reg_writeb(LSIState *s, int offset, u= int8_t val) break; case 0x06: /* SDID */ if ((s->ssid & 0x80) && (val & 0xf) !=3D (s->ssid & 0xf)) { - BADF("Destination ID does not match SSID\n"); + qemu_log_mask(LOG_GUEST_ERROR, + "lsi_scsi: Destination ID does not match SSID\n"= ); } s->sdid =3D val & 0xf; break; @@ -1851,7 +1838,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, u= int8_t val) lsi_update_irq(s); } if (s->waiting =3D=3D 1 && val & LSI_ISTAT0_SIGP) { - DPRINTF("Woken by SIGP\n"); + trace_lsi_awoken(); s->waiting =3D 0; s->dsp =3D s->dnad; lsi_execute_script(s); @@ -1878,13 +1865,15 @@ static void lsi_reg_writeb(LSIState *s, int offset,= uint8_t val) CASE_SET_REG32(temp, 0x1c) case 0x21: /* CTEST4 */ if (val & 7) { - BADF("Unimplemented CTEST4-FBL 0x%x\n", val); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: Unimplemented CTEST4-FBL 0x%x\n", val= ); } s->ctest4 =3D val; break; case 0x22: /* CTEST5 */ if (val & (LSI_CTEST5_ADCK | LSI_CTEST5_BBCK)) { - BADF("CTEST5 DMA increment not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: CTEST5 DMA increment not implemented\= n"); } s->ctest5 =3D val; break; @@ -1941,7 +1930,8 @@ static void lsi_reg_writeb(LSIState *s, int offset, u= int8_t val) break; case 0x49: /* STIME1 */ if (val & 0xf) { - DPRINTF("General purpose timer not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: General purpose timer not implemented= \n"); /* ??? Raising the interrupt immediately seems to be sufficient to keep the FreeBSD driver happy. */ lsi_script_scsi_interrupt(s, 0, LSI_SIST1_GEN); @@ -1958,13 +1948,15 @@ static void lsi_reg_writeb(LSIState *s, int offset,= uint8_t val) break; case 0x4e: /* STEST2 */ if (val & 1) { - BADF("Low level mode not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: Low level mode not implemented\n"); } s->stest2 =3D val; break; case 0x4f: /* STEST3 */ if (val & 0x41) { - BADF("SCSI FIFO test mode not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "lsi_scsi: SCSI FIFO test mode not implemented\n= "); } s->stest3 =3D val; break; diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events index 6e299d0..0fb6a99 100644 --- a/hw/scsi/trace-events +++ b/hw/scsi/trace-events @@ -229,3 +229,65 @@ spapr_vscsi_process_login(void) "Got login, sending re= sponse !" spapr_vscsi_queue_cmd_no_drive(uint64_t lun) "Command for lun 0x%08" PRIx6= 4 " with no drive" spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lu= n, int ret) "Queued command tag 0x%"PRIx32" CMD 0x%x=3D%s LUN %d ret: %d" spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..." + +# hw/scsi/lsi53c895a.c +lsi_reset(void) "Reset" +lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) "Up= date IRQ level %d dstat 0x%02x sist 0x%02x0x%02x" +lsi_update_irq_disconnected(void) "Handled IRQs & disconnected, looking fo= r pending processes" +lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uin= t8_t sist0) "SCSI Interrupt 0x%02x0x%02x prev 0x%02x0x%02x" +lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) "DMA Interrupt 0x%x = prev 0x%x" +lsi_bad_phase_jump(uint32_t dsp) "Data phase mismatch jump to 0x%"PRIX32 +lsi_bad_phase_interrupt(void) "Phase mismatch interrupt" +lsi_bad_selection(uint32_t id) "Selected absent target %"PRIu32 +lsi_do_dma_unavailable(void) "DMA no data available" +lsi_do_dma(uint64_t addr, int len) "DMA addr=3D0x%"PRIx64" len=3D%d" +lsi_queue_command(uint32_t tag) "Queueing tag=3D0x%"PRId32 +lsi_add_msg_byte_error(void) "MSG IN data too long" +lsi_add_msg_byte(uint8_t data) "MSG IN 0x%02x" +lsi_reselect(int id) "Reselected target %d" +lsi_queue_req_error(void *p) "Multiple IO pending for request %p" +lsi_queue_req(uint32_t tag) "Queueing IO tag=3D0x%"PRIx32 +lsi_command_complete(uint32_t status) "Command complete status=3D%"PRId32 +lsi_transfer_data(uint32_t tag, uint32_t len) "Data ready tag=3D0x%"PRIx32= " len=3D%"PRId32 +lsi_do_command(uint32_t dbc) "Send command len=3D%"PRId32 +lsi_do_status(uint32_t dbc, uint8_t status) "Get status len=3D%"PRId32" st= atus=3D%d" +lsi_do_status_error(void) "Bad Status move" +lsi_do_msgin(uint32_t dbc, int len) "Message in len=3D%"PRId32" %d" +lsi_do_msgout(uint32_t dbc) "MSG out len=3D%"PRId32 +lsi_do_msgout_disconnect(void) "MSG: Disconnect" +lsi_do_msgout_noop(void) "MSG: No Operation" +lsi_do_msgout_extended(uint8_t msg, uint8_t len) "Extended message 0x%x (l= en %d)" +lsi_do_msgout_ignored(const char *msg) "%s (ignored)" +lsi_do_msgout_simplequeue(uint8_t select_tag) "SIMPLE queue tag=3D0x%x" +lsi_do_msgout_abort(uint32_t tag) "MSG: ABORT TAG tag=3D0x%"PRId32 +lsi_do_msgout_clearqueue(uint32_t tag) "MSG: CLEAR QUEUE tag=3D0x%"PRIx32 +lsi_do_msgout_busdevicereset(uint32_t tag) "MSG: BUS DEVICE RESET tag=3D0x= %"PRIx32 +lsi_do_msgout_select(int id) "Select LUN %d" +lsi_memcpy(uint32_t dest, uint32_t src, int count) "memcpy dest 0x%"PRIx32= " src 0x%"PRIx32" count %d" +lsi_wait_reselect(void) "Wait Reselect" +lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) "SCRIPTS ds= p=3D0x%"PRIx32" opcode 0x%"PRIx32" arg 0x%"PRIx32 +lsi_execute_script_blockmove_delayed(void) "Delayed select timeout" +lsi_execute_script_blockmove_badphase(uint8_t phase, uint8_t expected) "Wr= ong phase got %d expected %d" +lsi_execute_script_io_alreadyreselected(void) "Already reselected, jumping= to alternative address" +lsi_execute_script_io_selected(uint8_t id, const char *atn) "Selected targ= et %d%s" +lsi_execute_script_io_disconnect(void) "Wait Disconnect" +lsi_execute_script_io_set(const char *atn, const char *ack, const char *tm= , const char *cc) "Set%s%s%s%s" +lsi_execute_script_io_clear(const char *atn, const char *ack, const char *= tm, const char *cc) "Clear%s%s%s%s" +lsi_execute_script_io_opcode(const char *opcode, int reg, const char *opna= me, uint8_t data8, uint32_t sfbr, const char *ssfbr) "%s reg 0x%x %s data8= =3D0x%02x sfbr=3D0x%02x%s" +lsi_execute_script_tc_nop(void) "NOP" +lsi_execute_script_tc_delayedselect_timeout(void) "Delayed select timeout" +lsi_execute_script_tc_compc(int result) "Compare carry %d" +lsi_execute_script_tc_compp(uint8_t phase, int op, uint8_t insn_phase) "Co= mpare phase %d %c=3D %d" +lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, int op, int resul= t) "Compare data 0x%"PRIx32" & 0x%x %c=3D 0x%x" +lsi_execute_script_tc_jump(uint32_t addr) "Jump to 0x%"PRIx32 +lsi_execute_script_tc_call(uint32_t addr) "Call 0x%"PRIx32 +lsi_execute_script_tc_return(uint32_t addr) "Return to 0x%"PRIx32 +lsi_execute_script_tc_interrupt(uint32_t addr) "Interrupt 0x%"PRIx32 +lsi_execute_script_tc_illegal(void) "Illegal transfer control" +lsi_execute_script_tc_cc_failed(void) "Control condition failed" +lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) "Load = reg 0x%x size %d addr 0x%"PRIx32" =3D 0x%08x" +lsi_execute_script_mm_store(int reg, int n, uint32_t addr) "Store reg 0x%x= size %d addr 0x%"PRIx32 +lsi_execute_script_stop(void) "SCRIPTS execution stopped" +lsi_awoken(void) "Woken by SIGP" +lsi_reg_read(const char *name, int offset, uint8_t ret) "Read reg %s 0x%x = =3D 0x%02x" +lsi_reg_write(const char *name, int offset, uint8_t val) "Write reg %s 0x%= x =3D 0x%02x" --=20 1.8.3.1