From nobody Sat May 4 19:02:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1537965915272828.6345826450806; Wed, 26 Sep 2018 05:45:15 -0700 (PDT) Received: from localhost ([::1]:58726 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g59Bq-0003J9-3u for importer@patchew.org; Wed, 26 Sep 2018 08:45:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54947) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g59AP-0002KI-OQ for qemu-devel@nongnu.org; Wed, 26 Sep 2018 08:43:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g59AO-0003YZ-Ri for qemu-devel@nongnu.org; Wed, 26 Sep 2018 08:43:45 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2651 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g59AI-0003U8-Eu; Wed, 26 Sep 2018 08:43:38 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 4908E529372AE; Wed, 26 Sep 2018 20:43:30 +0800 (CST) Received: from localhost.localdomain (10.143.28.90) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.399.0; Wed, 26 Sep 2018 20:43:23 +0800 From: Dongjiu Geng To: , , , , , Date: Wed, 26 Sep 2018 16:47:30 -0400 Message-ID: <1537994851-36254-2-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1537994851-36254-1-git-send-email-gengdongjiu@huawei.com> References: <1537994851-36254-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.90] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 45.249.212.190 Subject: [Qemu-devel] [PATCH v10 1/2] linux-headers: Update to linux kernel 4.19-rc5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update our kernel headers to upstream 4.19-rc5 (kernel commit 6bf4ca7fbc85d80446ac0) Signed-off-by: Dongjiu Geng --- include/standard-headers/linux/input.h | 9 +++++---- linux-headers/asm-arm/kvm.h | 13 +++++++++++++ linux-headers/asm-arm64/kvm.h | 13 +++++++++++++ linux-headers/asm-x86/kvm.h | 1 + linux-headers/linux/kvm.h | 2 ++ linux-headers/linux/vhost.h | 2 +- 6 files changed, 35 insertions(+), 5 deletions(-) diff --git a/include/standard-headers/linux/input.h b/include/standard-head= ers/linux/input.h index 6d6128c..c0ad9fc 100644 --- a/include/standard-headers/linux/input.h +++ b/include/standard-headers/linux/input.h @@ -267,10 +267,11 @@ struct input_mask { /* * MT_TOOL types */ -#define MT_TOOL_FINGER 0 -#define MT_TOOL_PEN 1 -#define MT_TOOL_PALM 2 -#define MT_TOOL_MAX 2 +#define MT_TOOL_FINGER 0x00 +#define MT_TOOL_PEN 0x01 +#define MT_TOOL_PALM 0x02 +#define MT_TOOL_DIAL 0x0a +#define MT_TOOL_MAX 0x0f =20 /* * Values describing the status of a force-feedback effect diff --git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h index 72aa226..e1f8b74 100644 --- a/linux-headers/asm-arm/kvm.h +++ b/linux-headers/asm-arm/kvm.h @@ -27,6 +27,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM +#define __KVM_HAVE_VCPU_EVENTS =20 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 =20 @@ -125,6 +126,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; =20 +/* for KVM_GET/SET_VCPU_EVENTS */ +struct kvm_vcpu_events { + struct { + __u8 serror_pending; + __u8 serror_has_esr; + /* Align it to 8 bytes */ + __u8 pad[6]; + __u64 serror_esr; + } exception; + __u32 reserved[12]; +}; + /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index 99cb9ad..e6a98c1 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -39,6 +39,7 @@ #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_READONLY_MEM +#define __KVM_HAVE_VCPU_EVENTS =20 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 =20 @@ -154,6 +155,18 @@ struct kvm_sync_regs { struct kvm_arch_memory_slot { }; =20 +/* for KVM_GET/SET_VCPU_EVENTS */ +struct kvm_vcpu_events { + struct { + __u8 serror_pending; + __u8 serror_has_esr; + /* Align it to 8 bytes */ + __u8 pad[6]; + __u64 serror_esr; + } exception; + __u32 reserved[12]; +}; + /* If you need to interpret the index values, here is the key: */ #define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000 #define KVM_REG_ARM_COPROC_SHIFT 16 diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h index 86299ef..fd23d57 100644 --- a/linux-headers/asm-x86/kvm.h +++ b/linux-headers/asm-x86/kvm.h @@ -377,6 +377,7 @@ struct kvm_sync_regs { =20 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0) #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1) +#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2) =20 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002 diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 6679072..83ba4eb 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -951,6 +951,8 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_HYPERV_TLBFLUSH 155 #define KVM_CAP_S390_HPAGE_1M 156 #define KVM_CAP_NESTED_STATE 157 +#define KVM_CAP_ARM_INJECT_SERROR_ESR 158 +#define KVM_CAP_MSR_PLATFORM_INFO 159 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 diff --git a/linux-headers/linux/vhost.h b/linux-headers/linux/vhost.h index 94726cb..c8a8fbe 100644 --- a/linux-headers/linux/vhost.h +++ b/linux-headers/linux/vhost.h @@ -176,7 +176,7 @@ struct vhost_memory { #define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1 =20 #define VHOST_SET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x25, __u64) -#define VHOST_GET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x26, __u64) +#define VHOST_GET_BACKEND_FEATURES _IOR(VHOST_VIRTIO, 0x26, __u64) =20 /* VHOST_NET specific defines */ =20 --=20 2.7.4 From nobody Sat May 4 19:02:33 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1537966040940837.3499031545011; Wed, 26 Sep 2018 05:47:20 -0700 (PDT) Received: from localhost ([::1]:58742 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g59Dr-0006Ge-S5 for importer@patchew.org; Wed, 26 Sep 2018 08:47:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54973) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g59AR-0002LJ-02 for qemu-devel@nongnu.org; Wed, 26 Sep 2018 08:43:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g59AP-0003Yx-Ef for qemu-devel@nongnu.org; Wed, 26 Sep 2018 08:43:46 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:2650 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g59AI-0003Tc-Et; Wed, 26 Sep 2018 08:43:39 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 4DF58BDBB36A2; Wed, 26 Sep 2018 20:43:30 +0800 (CST) Received: from localhost.localdomain (10.143.28.90) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.399.0; Wed, 26 Sep 2018 20:43:24 +0800 From: Dongjiu Geng To: , , , , , Date: Wed, 26 Sep 2018 16:47:31 -0400 Message-ID: <1537994851-36254-3-git-send-email-gengdongjiu@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1537994851-36254-1-git-send-email-gengdongjiu@huawei.com> References: <1537994851-36254-1-git-send-email-gengdongjiu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.143.28.90] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 45.249.212.190 Subject: [Qemu-devel] [PATCH v10 2/2] target/arm: Add support for VCPU event states X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch extends the qemu-kvm state sync logic with support for KVM_GET/SET_VCPU_EVENTS, giving access to yet missing SError exception. And also it can support the exception state migration. The SError exception states include SError pending state and ESR value, the kvm_put/get_vcpu_events() will be called when set or get system registers. When do migration, if source machine has SError pending, QEMU will do this migration regardless whether the target machine supports to specify guest ESR value, because if target machine does not support that, it can also inject the SError with zero ESR value. Signed-off-by: Dongjiu Geng --- Because I do not have arm32 platform, only have arm64 platform, so I only test this patch in arm64, if somebody else can test this patch, I will very appreciate that. How to test this patch: 1. Apply this patch to enable 32 bit KVM vcpu events support: https://patchwork.kernel.org/patch/10612479/ 2. Source machine is pending a SError, that is 'events.exception.serror_pen= ding =3D 1', then do migration, to see whether target machine will be also pending th= is SError. Change since V9: address Andrew's comments: 1. Remove the '=3D {}' in kvm_put_vcpu_events() 2. Remove a blank line in kvm_get_vcpu_events() 3. Add 32 bit KVM supports Change since v8: 1. Update the commit message Change since v7: address shannon's comments: 1. Change "pending" and "has_esr" from uint32_t to uint8_t for CPUARMState 2. Add error_report() in kvm_get_vcpu_events() Change since v6: address Peter's comments: 1. Add cover letter 2. Change name "cpu/ras" to "cpu/serror" 3. Add some comments and check the ioctl return value for kvm_put_vcpu_even= ts() Change since v5: address Peter's comments: 1. Move the "struct serror" before the "end_reset_fields" in CPUARMState 2. Remove ARM_FEATURE_RAS_EXT and add a variable have_inject_serror_esr 3. Use the variable have_inject_serror_esr to track whether the kernel has = state we need to migrate 4. Remove printf() in kvm_arch_put_registers() 5. ras_needed/vmstate_ras to serror_needed/vmstate_serror 6. Check to use "return env.serror.pending !=3D 0" instead of "arm_feature(= env, ARM_FEATURE_RAS_EXT)" in the ras_needed() Change since v4: 1. Rebase the code to latest --- target/arm/cpu.h | 7 ++++++ target/arm/kvm32.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++= ++++ target/arm/kvm64.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++= ++ target/arm/machine.c | 22 +++++++++++++++++ 4 files changed, 167 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 65c0fa0..a8454f5 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -530,6 +530,13 @@ typedef struct CPUARMState { */ } exception; =20 + /* Information associated with an SError */ + struct { + uint8_t pending; + uint8_t has_esr; + uint64_t esr; + } serror; + /* Thumb-2 EE state. */ uint32_t teecr; uint32_t teehbr; diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index 4e91c11..0b469d5 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -23,6 +23,8 @@ #include "hw/arm/arm.h" #include "qemu/log.h" =20 +static bool have_inject_serror_esr; + static inline void set_feature(uint64_t *features, int feature) { *features |=3D 1ULL << feature; @@ -217,6 +219,10 @@ int kvm_arch_init_vcpu(CPUState *cs) } cpu->mp_affinity =3D mpidr & ARM32_AFFINITY_MASK; =20 + /* Check whether userspace can specify guest syndrome value */ + have_inject_serror_esr =3D kvm_check_extension(cs->kvm_state, + KVM_CAP_ARM_INJECT_SERROR= _ESR); + return kvm_arm_init_cpreg_list(cpu); } =20 @@ -297,6 +303,60 @@ static const Reg regs[] =3D { VFPSYSREG(FPINST2), }; =20 +static int kvm_put_vcpu_events(ARMCPU *cpu) +{ + CPUARMState *env =3D &cpu->env; + struct kvm_vcpu_events events; + int ret; + + if (!kvm_has_vcpu_events()) { + return 0; + } + + memset(&events, 0, sizeof(events)); + events.exception.serror_pending =3D env->serror.pending; + + /* Inject SError to guest with specified syndrome if host kernel + * supports it, otherwise inject SError without syndrome. + */ + if (have_inject_serror_esr) { + events.exception.serror_has_esr =3D env->serror.has_esr; + events.exception.serror_esr =3D env->serror.esr; + } + + ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); + if (ret) { + error_report("failed to put vcpu events"); + } + + return ret; +} + +static int kvm_get_vcpu_events(ARMCPU *cpu) +{ + CPUARMState *env =3D &cpu->env; + struct kvm_vcpu_events events; + int ret; + + if (!kvm_has_vcpu_events()) { + return 0; + } + + memset(&events, 0, sizeof(events)); + ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); + if (ret) { + error_report("failed to get vcpu events"); + return ret; + } + + env->serror.pending =3D events.exception.serror_pending; + env->serror.has_esr =3D events.exception.serror_has_esr; + env->serror.esr =3D events.exception.serror_esr; + + return 0; +} + + int kvm_arch_put_registers(CPUState *cs, int level) { ARMCPU *cpu =3D ARM_CPU(cs); @@ -358,6 +418,11 @@ int kvm_arch_put_registers(CPUState *cs, int level) return ret; } =20 + ret =3D kvm_put_vcpu_events(cpu); + if (ret) { + return ret; + } + /* Note that we do not call write_cpustate_to_list() * here, so we are only writing the tuple list back to * KVM. This is safe because nothing can change the @@ -445,6 +510,11 @@ int kvm_arch_get_registers(CPUState *cs) } vfp_set_fpscr(env, fpscr); =20 + ret =3D kvm_get_vcpu_events(cpu); + if (ret) { + return ret; + } + if (!write_kvmstate_to_list(cpu)) { return EINVAL; } diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index e0b8246..e8c9c19 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -29,6 +29,7 @@ #include "hw/arm/arm.h" =20 static bool have_guest_debug; +static bool have_inject_serror_esr; =20 /* * Although the ARM implementation of hardware assisted debugging @@ -546,6 +547,10 @@ int kvm_arch_init_vcpu(CPUState *cs) =20 kvm_arm_init_debug(cs); =20 + /* Check whether userspace can specify guest syndrome value */ + have_inject_serror_esr =3D kvm_check_extension(cs->kvm_state, + KVM_CAP_ARM_INJECT_SERROR= _ESR); + return kvm_arm_init_cpreg_list(cpu); } =20 @@ -600,6 +605,59 @@ int kvm_arm_cpreg_level(uint64_t regidx) #define AARCH64_SIMD_CTRL_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U32 | \ KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x)) =20 +static int kvm_put_vcpu_events(ARMCPU *cpu) +{ + CPUARMState *env =3D &cpu->env; + struct kvm_vcpu_events events; + int ret; + + if (!kvm_has_vcpu_events()) { + return 0; + } + + memset(&events, 0, sizeof(events)); + events.exception.serror_pending =3D env->serror.pending; + + /* Inject SError to guest with specified syndrome if host kernel + * supports it, otherwise inject SError without syndrome. + */ + if (have_inject_serror_esr) { + events.exception.serror_has_esr =3D env->serror.has_esr; + events.exception.serror_esr =3D env->serror.esr; + } + + ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); + if (ret) { + error_report("failed to put vcpu events"); + } + + return ret; +} + +static int kvm_get_vcpu_events(ARMCPU *cpu) +{ + CPUARMState *env =3D &cpu->env; + struct kvm_vcpu_events events; + int ret; + + if (!kvm_has_vcpu_events()) { + return 0; + } + + memset(&events, 0, sizeof(events)); + ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); + if (ret) { + error_report("failed to get vcpu events"); + return ret; + } + + env->serror.pending =3D events.exception.serror_pending; + env->serror.has_esr =3D events.exception.serror_has_esr; + env->serror.esr =3D events.exception.serror_esr; + + return 0; +} + int kvm_arch_put_registers(CPUState *cs, int level) { struct kvm_one_reg reg; @@ -727,6 +785,11 @@ int kvm_arch_put_registers(CPUState *cs, int level) return ret; } =20 + ret =3D kvm_put_vcpu_events(cpu); + if (ret) { + return ret; + } + if (!write_list_to_kvmstate(cpu, level)) { return EINVAL; } @@ -863,6 +926,11 @@ int kvm_arch_get_registers(CPUState *cs) } vfp_set_fpcr(env, fpr); =20 + ret =3D kvm_get_vcpu_events(cpu); + if (ret) { + return ret; + } + if (!write_kvmstate_to_list(cpu)) { return EINVAL; } diff --git a/target/arm/machine.c b/target/arm/machine.c index ff4ec22..32bcde0 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -172,6 +172,27 @@ static const VMStateDescription vmstate_sve =3D { }; #endif /* AARCH64 */ =20 +static bool serror_needed(void *opaque) +{ + ARMCPU *cpu =3D opaque; + CPUARMState *env =3D &cpu->env; + + return env->serror.pending !=3D 0; +} + +static const VMStateDescription vmstate_serror =3D { + .name =3D "cpu/serror", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D serror_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(env.serror.pending, ARMCPU), + VMSTATE_UINT8(env.serror.has_esr, ARMCPU), + VMSTATE_UINT64(env.serror.esr, ARMCPU), + VMSTATE_END_OF_LIST() + } +}; + static bool m_needed(void *opaque) { ARMCPU *cpu =3D opaque; @@ -726,6 +747,7 @@ const VMStateDescription vmstate_arm_cpu =3D { #ifdef TARGET_AARCH64 &vmstate_sve, #endif + &vmstate_serror, NULL } }; --=20 2.7.4