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X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [RFC v5 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Zihan Yang , "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, add a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 86 +++++++++++++++++++++++++++++++++= ++-- 1 file changed, 82 insertions(+), 4 deletions(-) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index e62de42..a052c4c 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -15,10 +15,12 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" +#include "hw/pci/pcie_host.h" #include "hw/pci/pci_bridge.h" #include "qemu/range.h" #include "qemu/error-report.h" #include "sysemu/numa.h" +#include "qapi/visitor.h" =20 #define TYPE_PXB_BUS "pxb-bus" #define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS) @@ -40,6 +42,9 @@ typedef struct PXBBus { #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" #define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE) =20 +#define PROP_PXB_BUS_NR "bus_nr" +#define PROP_PXB_NUMA_NODE "numa_node" + typedef struct PXBDev { /*< private >*/ PCIDevice parent_obj; @@ -49,6 +54,16 @@ typedef struct PXBDev { uint16_t numa_node; } PXBDev; =20 +#define TYPE_PXB_PCIE_HOST "pxb-pcie-host" +#define PXB_PCIE_HOST_DEVICE(obj) \ + OBJECT_CHECK(PXBPCIEHost, (obj), TYPE_PXB_PCIE_HOST) + +typedef struct PXBPCIEHost { + /*< private >*/ + PCIExpressHost parent_obj; + /*< public >*/ +} PXBPCIEHost; + static PXBDev *convert_to_pxb(PCIDevice *dev) { return pci_bus_is_express(pci_get_bus(dev)) @@ -142,6 +157,40 @@ static char *pxb_host_ofw_unit_address(const SysBusDev= ice *dev) return NULL; } =20 +static void pxb_pcie_host_get_mmcfg_base(Object *obj, Visitor *v, const ch= ar *name, + void *opaque, Error **errp) +{ + PCIExpressHost *e =3D PCIE_HOST_BRIDGE(obj); + + visit_type_uint64(v, name, &e->size, errp); +} + +static void pxb_pcie_host_get_mmcfg_size(Object *obj, Visitor *v, const ch= ar *name, + void *opaque, Error **errp) +{ + PCIExpressHost *e =3D PCIE_HOST_BRIDGE(obj); + + visit_type_uint64(v, name, &e->size, errp); +} + +static void pxb_pcie_host_initfn(Object *obj) +{ + PCIHostState *phb =3D PCI_HOST_BRIDGE(obj); + + memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, + "pci-conf-idx", 4); + memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, + "pci-conf-data", 4); + + object_property_add(obj, PCIE_HOST_MCFG_BASE, "uint64", + pxb_pcie_host_get_mmcfg_base, + NULL, NULL, NULL, NULL); + + object_property_add(obj, PCIE_HOST_MCFG_SIZE, "uint64", + pxb_pcie_host_get_mmcfg_size, + NULL, NULL, NULL, NULL); +} + static void pxb_host_class_init(ObjectClass *class, void *data) { DeviceClass *dc =3D DEVICE_CLASS(class); @@ -161,6 +210,27 @@ static const TypeInfo pxb_host_info =3D { .class_init =3D pxb_host_class_init, }; =20 +static void pxb_pcie_host_class_init(ObjectClass *class, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(class); + SysBusDeviceClass *sbc =3D SYS_BUS_DEVICE_CLASS(class); + PCIHostBridgeClass *hc =3D PCI_HOST_BRIDGE_CLASS(class); + + dc->fw_name =3D "pcie"; + /* Reason: Internal part of the pxb/pxb-pcie device, not usable by its= elf */ + dc->user_creatable =3D false; + sbc->explicit_ofw_unit_address =3D pxb_host_ofw_unit_address; + hc->root_bus_path =3D pxb_host_root_bus_path; +} + +static const TypeInfo pxb_pcie_host_info =3D { + .name =3D TYPE_PXB_PCIE_HOST, + .parent =3D TYPE_PCIE_HOST_BRIDGE, + .instance_size =3D sizeof(PXBPCIEHost), + .instance_init =3D pxb_pcie_host_initfn, + .class_init =3D pxb_pcie_host_class_init, +}; + /* * Registers the PXB bus as a child of pci host root bus. */ @@ -228,10 +298,11 @@ static void pxb_dev_realize_common(PCIDevice *dev, bo= ol pcie, Error **errp) dev_name =3D dev->qdev.id; } =20 - ds =3D qdev_create(NULL, TYPE_PXB_HOST); if (pcie) { + ds =3D qdev_create(NULL, TYPE_PXB_PCIE_HOST); bus =3D pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCI= E_BUS); } else { + ds =3D qdev_create(NULL, TYPE_PXB_HOST); bus =3D pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_P= XB_BUS); bds =3D qdev_create(BUS(bus), "pci-bridge"); bds->id =3D dev_name; @@ -289,8 +360,14 @@ static void pxb_dev_exitfn(PCIDevice *pci_dev) =20 static Property pxb_dev_properties[] =3D { /* Note: 0 is not a legal PXB bus number. */ - DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0), - DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNE= D), + DEFINE_PROP_UINT8(PROP_PXB_BUS_NR, PXBDev, bus_nr, 0), + DEFINE_PROP_UINT16(PROP_PXB_NUMA_NODE, PXBDev, numa_node, NUMA_NODE_UN= ASSIGNED), + DEFINE_PROP_END_OF_LIST(), +}; + +static Property pxb_pcie_dev_properties[] =3D { + DEFINE_PROP_UINT8(PROP_PXB_BUS_NR, PXBDev, bus_nr, 0), + DEFINE_PROP_UINT16(PROP_PXB_NUMA_NODE, PXBDev, numa_node, NUMA_NODE_UN= ASSIGNED), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -344,7 +421,7 @@ static void pxb_pcie_dev_class_init(ObjectClass *klass,= void *data) k->class_id =3D PCI_CLASS_BRIDGE_HOST; =20 dc->desc =3D "PCI Express Expander Bridge"; - dc->props =3D pxb_dev_properties; + dc->props =3D pxb_pcie_dev_properties; dc->hotpluggable =3D false; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); } @@ -365,6 +442,7 @@ static void pxb_register_types(void) type_register_static(&pxb_bus_info); type_register_static(&pxb_pcie_bus_info); type_register_static(&pxb_host_info); + type_register_static(&pxb_pcie_host_info); type_register_static(&pxb_dev_info); type_register_static(&pxb_pcie_dev_info); } --=20 2.7.4