From nobody Mon Feb 9 08:20:22 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1534442510511311.16081723926527; Thu, 16 Aug 2018 11:01:50 -0700 (PDT) Received: from localhost ([::1]:57545 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqMae-00062C-D2 for importer@patchew.org; Thu, 16 Aug 2018 14:01:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54342) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqMRD-0003Em-Bg for qemu-devel@nongnu.org; Thu, 16 Aug 2018 13:52:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fqMRC-0008KI-G6 for qemu-devel@nongnu.org; Thu, 16 Aug 2018 13:51:59 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:56548 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fqMRC-0008Jx-5S for qemu-devel@nongnu.org; Thu, 16 Aug 2018 13:51:58 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 2331A1A23C0; Thu, 16 Aug 2018 19:51:57 +0200 (CEST) Received: from rtrkw774-lin.domain.local (unknown [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 0BDD41A23BC; Thu, 16 Aug 2018 19:51:57 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 16 Aug 2018 19:48:59 +0200 Message-Id: <1534441747-4197-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534441747-4197-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1534441747-4197-1-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PULL v2 07/15] target/mips: Add CP0 BadInstrX register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add CP0 BadInstrX register. This register will be used in nanoMIPS. Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Signed-off-by: Stefan Markovic Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/machine.c | 5 +++-- target/mips/translate.c | 22 +++++++++++++++++++++- 3 files changed, 25 insertions(+), 3 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 77c638c..009202c 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -323,6 +323,7 @@ struct CPUMIPSState { target_ulong CP0_BadVAddr; uint32_t CP0_BadInstr; uint32_t CP0_BadInstrP; + uint32_t CP0_BadInstrX; int32_t CP0_Count; target_ulong CP0_EntryHi; #define CP0EnHi_EHINV 10 diff --git a/target/mips/machine.c b/target/mips/machine.c index 20100d5..5ba78ac 100644 --- a/target/mips/machine.c +++ b/target/mips/machine.c @@ -212,8 +212,8 @@ const VMStateDescription vmstate_tlb =3D { =20 const VMStateDescription vmstate_mips_cpu =3D { .name =3D "cpu", - .version_id =3D 10, - .minimum_version_id =3D 10, + .version_id =3D 11, + .minimum_version_id =3D 11, .post_load =3D cpu_post_load, .fields =3D (VMStateField[]) { /* Active TC */ @@ -266,6 +266,7 @@ const VMStateDescription vmstate_mips_cpu =3D { VMSTATE_UINTTL(env.CP0_BadVAddr, MIPSCPU), VMSTATE_UINT32(env.CP0_BadInstr, MIPSCPU), VMSTATE_UINT32(env.CP0_BadInstrP, MIPSCPU), + VMSTATE_UINT32(env.CP0_BadInstrX, MIPSCPU), VMSTATE_INT32(env.CP0_Count, MIPSCPU), VMSTATE_UINTTL(env.CP0_EntryHi, MIPSCPU), VMSTATE_INT32(env.CP0_Compare, MIPSCPU), diff --git a/target/mips/translate.c b/target/mips/translate.c index 2b70d1b..ae3aaab 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5328,7 +5328,13 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); rn =3D "BadInstrP"; break; - default: + case 3: + CP0_CHECK(ctx->bi); + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX)); + tcg_gen_andi_tl(arg, arg, ~0xffff); + rn =3D "BadInstrX"; + break; + default: goto cp0_unimplemented; } break; @@ -6019,6 +6025,10 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) /* ignored */ rn =3D "BadInstrP"; break; + case 3: + /* ignored */ + rn =3D "BadInstrX"; + break; default: goto cp0_unimplemented; } @@ -6724,6 +6734,12 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP)); rn =3D "BadInstrP"; break; + case 3: + CP0_CHECK(ctx->bi); + gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX)); + tcg_gen_andi_tl(arg, arg, ~0xffff); + rn =3D "BadInstrX"; + break; default: goto cp0_unimplemented; } @@ -7398,6 +7414,10 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, i= nt reg, int sel) /* ignored */ rn =3D "BadInstrP"; break; + case 3: + /* ignored */ + rn =3D "BadInstrX"; + break; default: goto cp0_unimplemented; } --=20 2.7.4