From nobody Wed Nov 5 13:13:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1534432118081637.0996589470714; Thu, 16 Aug 2018 08:08:38 -0700 (PDT) Received: from localhost ([::1]:56235 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqJt7-0007Zu-1Y for importer@patchew.org; Thu, 16 Aug 2018 11:08:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55726) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqJks-0005Fd-Gc for qemu-devel@nongnu.org; Thu, 16 Aug 2018 11:00:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fqJkg-0000Vi-Dn for qemu-devel@nongnu.org; Thu, 16 Aug 2018 11:00:00 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:40302 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fqJke-0000UI-AF for qemu-devel@nongnu.org; Thu, 16 Aug 2018 10:59:54 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A92071A23B9; Thu, 16 Aug 2018 16:58:58 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 82E1B1A23B3; Thu, 16 Aug 2018 16:58:58 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 16 Aug 2018 16:57:01 +0200 Message-Id: <1534431497-1385-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534431497-1385-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1534431497-1385-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v9 08/84] target/mips: Implement CP0 Config1.WR bit functionality X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add testing Config1.WR bit into watch exception handling logic. Reviewed-by: Aleksandar Markovic Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Reviewed-by: Richard Henderson --- target/mips/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ae3aaab..395368b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -5521,6 +5521,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int= reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(mfc0_watchlo, arg, sel); rn =3D "WatchLo"; break; @@ -5538,6 +5539,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int= reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(mfc0_watchhi, arg, sel); rn =3D "WatchHi"; break; @@ -6220,6 +6222,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int= reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchlo, arg, sel); rn =3D "WatchLo"; break; @@ -6237,6 +6240,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int= reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchhi, arg, sel); rn =3D "WatchHi"; break; @@ -6923,6 +6927,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(dmfc0_watchlo, arg, sel); rn =3D "WatchLo"; break; @@ -6940,6 +6945,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_1e0i(mfc0_watchhi, arg, sel); rn =3D "WatchHi"; break; @@ -7604,6 +7610,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchlo, arg, sel); rn =3D "WatchLo"; break; @@ -7621,6 +7628,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, in= t reg, int sel) case 5: case 6: case 7: + CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR)); gen_helper_0e1i(mtc0_watchhi, arg, sel); rn =3D "WatchHi"; break; --=20 2.7.4