From nobody Wed Nov 5 13:13:25 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1534432644565928.3100833853879; Thu, 16 Aug 2018 08:17:24 -0700 (PDT) Received: from localhost ([::1]:56283 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqK1b-0006eB-8m for importer@patchew.org; Thu, 16 Aug 2018 11:17:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55981) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fqJl1-0005LS-FO for qemu-devel@nongnu.org; Thu, 16 Aug 2018 11:00:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fqJku-0000f2-Cb for qemu-devel@nongnu.org; Thu, 16 Aug 2018 11:00:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:43453 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fqJku-0000d4-0T for qemu-devel@nongnu.org; Thu, 16 Aug 2018 11:00:08 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id DA3C41A23DA; Thu, 16 Aug 2018 16:58:59 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B4CCE1A23BF; Thu, 16 Aug 2018 16:58:59 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 16 Aug 2018 16:57:19 +0200 Message-Id: <1534431497-1385-27-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534431497-1385-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1534431497-1385-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v9 26/84] target/mips: Add emulation of nanoMIPS 16-bit logic instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Yongbok Kim Add emulation of NOT16, AND16, XOR16, OR16 instructions. Reviewed-by: Richard Henderson Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/translate.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index d59b632..372e6f2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -16638,6 +16638,27 @@ static inline int decode_gpr_gpr4_zero(int r) #define NANOMIPS_EXTRACT_RS5(op) (op & 0x1f) =20 =20 +static void gen_pool16c_nanomips_insn(DisasContext *ctx) +{ + int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode)); + int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode)); + + switch (extract32(ctx->opcode, 2, 2)) { + case NM_NOT16: + gen_logic(ctx, OPC_NOR, rt, rs, 0); + break; + case NM_AND16: + gen_logic(ctx, OPC_AND, rt, rt, rs); + break; + case NM_XOR16: + gen_logic(ctx, OPC_XOR, rt, rt, rs); + break; + case NM_OR16: + gen_logic(ctx, OPC_OR, rt, rt, rs); + break; + } +} + static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx) { uint32_t op; @@ -16714,6 +16735,7 @@ static int decode_nanomips_opc(CPUMIPSState *env, D= isasContext *ctx) case NM_P16C: switch (ctx->opcode & 1) { case NM_POOL16C_0: + gen_pool16c_nanomips_insn(ctx); break; case NM_LWXS16: gen_ldxs(ctx, rt, rs, rd); @@ -16788,6 +16810,12 @@ static int decode_nanomips_opc(CPUMIPSState *env, = DisasContext *ctx) } break; case NM_ANDI16: + { + uint32_t u =3D extract32(ctx->opcode, 0, 4); + u =3D (u =3D=3D 12) ? 0xff : + (u =3D=3D 13) ? 0xffff : u; + gen_logic_imm(ctx, OPC_ANDI, rt, rs, u); + } break; case NM_P16_LB: offset =3D extract32(ctx->opcode, 0, 2); --=20 2.7.4