From nobody Wed Nov 5 10:13:07 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1534184936337985.0743657533876; Mon, 13 Aug 2018 11:28:56 -0700 (PDT) Received: from localhost ([::1]:40828 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fpHaJ-00072T-7i for importer@patchew.org; Mon, 13 Aug 2018 14:28:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59666) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fpH3D-0005Z3-WF for qemu-devel@nongnu.org; Mon, 13 Aug 2018 13:54:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fpH36-00079I-I6 for qemu-devel@nongnu.org; Mon, 13 Aug 2018 13:54:43 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:55805 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fpH36-00076t-41 for qemu-devel@nongnu.org; Mon, 13 Aug 2018 13:54:36 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 5963D1A22C5; Mon, 13 Aug 2018 19:54:12 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 349791A22C3; Mon, 13 Aug 2018 19:54:12 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 13 Aug 2018 19:53:18 +0200 Message-Id: <1534182832-554-54-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534182832-554-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1534182832-554-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v8 53/87] target/mips: Add updating BadInstr, BadInstrP, BadInstrX for nanoMIPS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Update BadInstr, BadInstrP,and BadInstrX registers for nanoMIPS. The same support for pre-nanoMIPS remains unimplemented. Reviewed-by: Aleksandar Markovic Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/helper.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/target/mips/helper.c b/target/mips/helper.c index e215af9..b25e000 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -682,6 +682,31 @@ static void set_hflags_for_handler (CPUMIPSState *env) =20 static inline void set_badinstr_registers(CPUMIPSState *env) { + if (env->insn_flags & ISA_NANOMIPS32) { + if (env->CP0_Config3 & (1 << CP0C3_BI)) { + uint32_t instr =3D (cpu_lduw_code(env, env->active_tc.PC)) << = 16; + if ((instr & 0x10000000) =3D=3D 0) { + instr |=3D cpu_lduw_code(env, env->active_tc.PC + 2); + } + env->CP0_BadInstr =3D instr; + + if ((instr & 0xFC000000) =3D=3D 0x60000000) { + instr =3D cpu_lduw_code(env, env->active_tc.PC + 4) << 16; + env->CP0_BadInstrX =3D instr; + } + } + if ((env->CP0_Config3 & (1 << CP0C3_BP)) && + (env->hflags & MIPS_HFLAG_BMASK)) { + if (!(env->hflags & MIPS_HFLAG_B16)) { + env->CP0_BadInstrP =3D cpu_ldl_code(env, env->active_tc.PC= - 4); + } else { + env->CP0_BadInstrP =3D + (cpu_lduw_code(env, env->active_tc.PC - 2)) << 16; + } + } + return; + } + if (env->hflags & MIPS_HFLAG_M16) { /* TODO: add BadInstr support for microMIPS */ return; --=20 2.7.4