From nobody Wed Nov 5 08:20:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533222151773986.058684592975; Thu, 2 Aug 2018 08:02:31 -0700 (PDT) Received: from localhost ([::1]:46132 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flF7W-0005uu-HZ for importer@patchew.org; Thu, 02 Aug 2018 11:02:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60495) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flEgl-0006O7-9A for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:34:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flEgh-00084z-BF for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:34:51 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:38723 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flEgh-00084R-3F for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:34:47 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id CE64E1A2046; Thu, 2 Aug 2018 16:34:45 +0200 (CEST) Received: from smarkovic.domain.local (smarkovic.domain.local [10.10.14.46]) by mail.rt-rk.com (Postfix) with ESMTPSA id A149B1A1DE4; Thu, 2 Aug 2018 16:34:45 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Markovic To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2018 16:16:30 +0200 Message-Id: <1533219424-7627-44-git-send-email-stefan.markovic@rt-rk.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> References: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 43/77] target/mips: Add emulation of DSP ASE for nanoMIPS - part 6 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, arikalo@wavecomp.com, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Markovic Add emulation of DSP ASE instructions for nanoMIPS - part 6. Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/translate.c | 64 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 64 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 2a45302..7e495d2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -17558,6 +17558,66 @@ static void gen_pool32axf_4_nanomips_insn(DisasCon= text *ctx, uint32_t opc, tcg_temp_free(v0_t); } =20 +static void gen_pool32axf_7_nanomips_insn(DisasContext *ctx, uint32_t opc, + int ret, int v1, int v2) +{ + if (ret =3D=3D 0) { + /* Treat as NOP. */ + return; + } + + int16_t imm; + + TCGv t0; + TCGv v1_t; + + t0 =3D tcg_temp_new(); + v1_t =3D tcg_temp_new(); + + gen_load_gpr(v1_t, v1); + + switch (opc) { + case NM_SHRA_R_QB: + tcg_gen_movi_tl(t0, v2 >> 2); + switch (extract32(ctx->opcode, 12, 1)) { + case 0: + /* NM_SHRA_QB */ + check_dspr2(ctx); + gen_helper_shra_qb(cpu_gpr[ret], t0, v1_t); + break; + case 1: + /* NM_SHRA_R_QB */ + check_dspr2(ctx); + gen_helper_shra_r_qb(cpu_gpr[ret], t0, v1_t); + break; + } + break; + case NM_SHRL_PH: + check_dspr2(ctx); + tcg_gen_movi_tl(t0, v2 >> 1); + gen_helper_shrl_ph(cpu_gpr[ret], t0, v1_t); + break; + case NM_REPL_QB: + { + check_dsp(ctx); + target_long result; + imm =3D extract32(ctx->opcode, 13, 8); + result =3D (uint32_t)imm << 24 | + (uint32_t)imm << 16 | + (uint32_t)imm << 8 | + (uint32_t)imm; + result =3D (int32_t)result; + tcg_gen_movi_tl(cpu_gpr[ret], result); + } + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + tcg_temp_free(t0); + tcg_temp_free(v1_t); +} + =20 static void gen_pool32axf_nanomips_insn(CPUMIPSState *env, DisasContext *c= tx) { @@ -17653,6 +17713,10 @@ static void gen_pool32axf_nanomips_insn(CPUMIPSSta= te *env, DisasContext *ctx) } break; case NM_POOL32AXF_7: + { + int32_t op1 =3D extract32(ctx->opcode, 9, 3); + gen_pool32axf_7_nanomips_insn(ctx, op1, rt, rs, rd); + } break; default: generate_exception_end(ctx, EXCP_RI); --=20 1.9.1