From nobody Wed Nov 5 08:25:20 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533219626789595.7637205807406; Thu, 2 Aug 2018 07:20:26 -0700 (PDT) Received: from localhost ([::1]:45878 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flESn-0001GD-Jl for importer@patchew.org; Thu, 02 Aug 2018 10:20:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54834) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flER7-0000Fx-Dh for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:18:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flER2-0004oH-Vt for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:18:41 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:35193 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flER2-0004nS-Ni for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:18:36 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8C20B1A1F92; Thu, 2 Aug 2018 16:18:35 +0200 (CEST) Received: from smarkovic.domain.local (smarkovic.domain.local [10.10.14.46]) by mail.rt-rk.com (Postfix) with ESMTPSA id 693401A118C; Thu, 2 Aug 2018 16:18:35 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Markovic To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2018 16:15:50 +0200 Message-Id: <1533219424-7627-4-git-send-email-stefan.markovic@rt-rk.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> References: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 03/77] target/mips: Mark switch fallthroughs with interpretable comments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, arikalo@wavecomp.com, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aleksandar Markovic Mark switch fallthroughs with comments, in cases fallthroughs are intentional. The comments "/* fall through */" are interpreted by compilers and other tools, and they will not issue warnings in such cases. For gcc, the warning is turnend on by -Wimplicit-fallthrough. With this patch, there will be no such warnings in target/mips directory. If such warning appears in future, it should be checked if it is intentional, and, if yes, marked with a comment similar to those from this patch. The comment must be just before next "case", otherwise gcc won't understand it. Reviewed-by: Richard Henderson Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 051dda5..e32fd5f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -14255,8 +14255,8 @@ static void decode_micromips32_opc(CPUMIPSState *en= v, DisasContext *ctx) case SDP: check_insn(ctx, ISA_MIPS3); check_mips_64(ctx); - /* Fallthrough */ #endif + /* fall through */ case LWP: case SWP: gen_ldst_pair(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12)); @@ -14266,8 +14266,8 @@ static void decode_micromips32_opc(CPUMIPSState *en= v, DisasContext *ctx) case SDM: check_insn(ctx, ISA_MIPS3); check_mips_64(ctx); - /* Fallthrough */ #endif + /* fall through */ case LWM32: case SWM32: gen_ldst_multiple(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12)= ); @@ -20023,6 +20023,7 @@ static void decode_opc(CPUMIPSState *env, DisasCont= ext *ctx) case OPC_MTHC1: check_cp1_enabled(ctx); check_insn(ctx, ISA_MIPS32R2); + /* fall through */ case OPC_MFC1: case OPC_CFC1: case OPC_MTC1: --=20 1.9.1