From nobody Wed Nov 5 08:16:08 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1533220891087586.661845247036; Thu, 2 Aug 2018 07:41:31 -0700 (PDT) Received: from localhost ([::1]:46007 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flEnB-0003M1-UQ for importer@patchew.org; Thu, 02 Aug 2018 10:41:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58727) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1flEc3-0002V2-GG for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:30:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1flEbz-00043f-Iw for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:29:59 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:60823 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1flEbz-00042u-7S for qemu-devel@nongnu.org; Thu, 02 Aug 2018 10:29:55 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id E8B911A20A3; Thu, 2 Aug 2018 16:29:53 +0200 (CEST) Received: from smarkovic.domain.local (smarkovic.domain.local [10.10.14.46]) by mail.rt-rk.com (Postfix) with ESMTPSA id C9A391A209E; Thu, 2 Aug 2018 16:29:53 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Markovic To: qemu-devel@nongnu.org Date: Thu, 2 Aug 2018 16:16:18 +0200 Message-Id: <1533219424-7627-32-git-send-email-stefan.markovic@rt-rk.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> References: <1533219424-7627-1-git-send-email-stefan.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 31/77] target/mips: Add emulation of misc nanoMIPS instructions (pool32axf) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, arikalo@wavecomp.com, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Yongbok Kim Add emulation of misc nanoMIPS instructions situated in pool32axf. Reviewed-by: Richard Henderson Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/translate.c | 89 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 89 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 19f011e..7cc1a92 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -16772,6 +16772,87 @@ static void gen_pool32a0_nanomips_insn(DisasContex= t *ctx) } } =20 +static void gen_pool32axf_nanomips_insn(CPUMIPSState *env, DisasContext *c= tx) +{ + int rt =3D extract32(ctx->opcode, 21, 5); + int rs =3D extract32(ctx->opcode, 16, 5); + + switch (extract32(ctx->opcode, 6, 3)) { + case NM_POOL32AXF_4: + case NM_POOL32AXF_5: + switch (extract32(ctx->opcode, 9, 7)) { +#ifndef CONFIG_USER_ONLY + case NM_TLBP: + gen_cp0(env, ctx, OPC_TLBP, 0, 0); + break; + case NM_TLBR: + gen_cp0(env, ctx, OPC_TLBR, 0, 0); + break; + case NM_TLBWI: + gen_cp0(env, ctx, OPC_TLBWI, 0, 0); + break; + case NM_TLBWR: + gen_cp0(env, ctx, OPC_TLBWR, 0, 0); + break; + case NM_TLBINV: + gen_cp0(env, ctx, OPC_TLBINV, 0, 0); + break; + case NM_TLBINVF: + gen_cp0(env, ctx, OPC_TLBINVF, 0, 0); + break; + case NM_DI: + check_cp0_enabled(ctx); + { + TCGv t0 =3D tcg_temp_new(); + + save_cpu_state(ctx, 1); + gen_helper_di(t0, cpu_env); + gen_store_gpr(t0, rt); + /* Stop translation as we may have switched the execution mode= */ + ctx->base.is_jmp =3D DISAS_STOP; + tcg_temp_free(t0); + } + break; + case NM_EI: + check_cp0_enabled(ctx); + { + TCGv t0 =3D tcg_temp_new(); + + save_cpu_state(ctx, 1); + gen_helper_ei(t0, cpu_env); + gen_store_gpr(t0, rt); + /* Stop translation as we may have switched the execution mode= */ + ctx->base.is_jmp =3D DISAS_STOP; + tcg_temp_free(t0); + } + break; + case NM_RDPGPR: + gen_load_srsgpr(rs, rt); + break; + case NM_WRPGPR: + gen_store_srsgpr(rs, rt); + break; + case NM_WAIT: + gen_cp0(env, ctx, OPC_WAIT, 0, 0); + break; + case NM_DERET: + gen_cp0(env, ctx, OPC_DERET, 0, 0); + break; + case NM_ERETX: + gen_cp0(env, ctx, OPC_ERET, 0, 0); + break; +#endif + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void gen_pool32f_nanomips_insn(DisasContext *ctx) { int rt, rs, rd; @@ -17141,6 +17222,14 @@ static int decode_nanomips_32_48_opc(CPUMIPSState = *env, DisasContext *ctx) gen_pool32a0_nanomips_insn(ctx); break; case NM_POOL32A7: + switch (extract32(ctx->opcode, 3, 3)) { + case NM_POOL32AXF: + gen_pool32axf_nanomips_insn(env, ctx); + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } break; default: generate_exception_end(ctx, EXCP_RI); --=20 1.9.1