From nobody Wed Nov 5 05:24:42 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1532971235627109.97934618238423; Mon, 30 Jul 2018 10:20:35 -0700 (PDT) Received: from localhost ([::1]:53692 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fkBAS-00037O-Nj for importer@patchew.org; Mon, 30 Jul 2018 12:37:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fkAtA-0004Mu-6L for qemu-devel@nongnu.org; Mon, 30 Jul 2018 12:19:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fkAt7-0006QC-Cu for qemu-devel@nongnu.org; Mon, 30 Jul 2018 12:19:16 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:54931 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fkAt7-0006Oy-1J for qemu-devel@nongnu.org; Mon, 30 Jul 2018 12:19:13 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id CE2151A1FC6; Mon, 30 Jul 2018 18:19:11 +0200 (CEST) Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B05941A1E6F; Mon, 30 Jul 2018 18:19:11 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Mon, 30 Jul 2018 18:11:52 +0200 Message-Id: <1532967169-22265-20-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532967169-22265-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1532967169-22265-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 19/76] target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Yongbok Kim Add emulation of nanoMIPS 16-bit arithmetic instructions. Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/translate.c | 124 ++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 124 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index aba42be..7e13df0 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -16522,6 +16522,130 @@ static inline int decode_gpr_gpr4_zero(int r) =20 static int decode_nanomips_opc(CPUMIPSState *env, DisasContext *ctx) { + uint32_t op; + int rt =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RD(ctx->opcode)); + int rs =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS(ctx->opcode)); + int rd =3D decode_gpr_gpr3(NANOMIPS_EXTRACT_RS1(ctx->opcode)); + + /* make sure instructions are on a halfword boundary */ + if (ctx->base.pc_next & 0x1) { + TCGv tmp =3D tcg_const_tl(ctx->base.pc_next); + tcg_gen_st_tl(tmp, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr)); + tcg_temp_free(tmp); + generate_exception_end(ctx, EXCP_AdEL); + return 2; + } + + op =3D extract32(ctx->opcode, 10, 6); + switch (op) { + case NM_P16_MV: + break; + case NM_P16_SHIFT: + break; + case NM_P16C: + break; + case NM_P16_A1: + switch (extract32(ctx->opcode, 6, 1)) { + case NM_ADDIUR1SP: + gen_arith_imm(ctx, OPC_ADDIU, rt, 29, + extract32(ctx->opcode, 0, 6) << 2); + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + case NM_P16_A2: + switch (extract32(ctx->opcode, 3, 1)) { + case NM_ADDIUR2: + rd =3D extract32(ctx->opcode, 0, 3) << 2; + gen_arith_imm(ctx, OPC_ADDIU, rt, rs, rd); + break; + case NM_P_ADDIURS5: + rt =3D extract32(ctx->opcode, 5, 5); + if (rt !=3D 0) { + rs =3D (sextract32(ctx->opcode, 4, 1) << 3) | + extract32(ctx->opcode, 0, 3); + /* s =3D sign_extend( s[3] . s[2:0] , from_nbits =3D 4)*/ + gen_arith_imm(ctx, OPC_ADDIU, rt, rt, rs); + } + break; + } + break; + case NM_P16_ADDU: + switch (ctx->opcode & 0x1) { + case NM_ADDU16: + gen_arith(ctx, OPC_ADDU, rd, rs, rt); + break; + case NM_SUBU16: + gen_arith(ctx, OPC_SUBU, rd, rs, rt); + break; + } + break; + case NM_P16_4X4: + rt =3D (extract32(ctx->opcode, 9, 1) << 3) | + extract32(ctx->opcode, 5, 3); + rs =3D (extract32(ctx->opcode, 4, 1) << 3) | + extract32(ctx->opcode, 0, 3); + rt =3D decode_gpr_gpr4(rt); + rs =3D decode_gpr_gpr4(rs); + switch ((extract32(ctx->opcode, 7, 2) & 0x2) | + (extract32(ctx->opcode, 3, 1))) { + case NM_ADDU4X4: + gen_arith(ctx, OPC_ADDU, rt, rs, rt); + break; + case NM_MUL4X4: + gen_r6_muldiv(ctx, R6_OPC_MUL, rt, rs, rt); + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + case NM_LI16: + break; + case NM_ANDI16: + break; + case NM_P16_LB: + break; + case NM_P16_LH: + break; + case NM_LW16: + break; + case NM_LWSP16: + break; + case NM_LW4X4: + break; + case NM_SW4X4: + break; + case NM_LWGP16: + break; + case NM_SWSP16: + break; + case NM_SW16: + break; + case NM_SWGP16: + break; + case NM_BC16: + break; + case NM_BALC16: + break; + case NM_BEQZC16: + break; + case NM_BNEZC16: + break; + case NM_P16_BR: + break; + case NM_P16_SR: + break; + case NM_MOVEP: + break; + case NM_MOVEPREV: + break; + default: + break; + } + return 2; } =20 --=20 2.7.4